* Why does x86 binutils use REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ? @ 2007-03-21 19:38 H. J. Lu 2007-03-21 21:20 ` PATCH: Replace REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ with REX_W/REX_R/REX_X/REX_B H. J. Lu 0 siblings, 1 reply; 6+ messages in thread From: H. J. Lu @ 2007-03-21 19:38 UTC (permalink / raw) To: binutils The hardware spec uses REX.W/REX.R/REX.X/REX.B. But x86 binutils uses REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ. I have to do a translation when I read the code. I suggest we repleace them with REX_W/REX_R/REX_X/REX_B. Dissassembler will print rexWRXB instead of rex64XYZ. H.J. ^ permalink raw reply [flat|nested] 6+ messages in thread
* PATCH: Replace REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ with REX_W/REX_R/REX_X/REX_B 2007-03-21 19:38 Why does x86 binutils use REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ? H. J. Lu @ 2007-03-21 21:20 ` H. J. Lu 2007-03-22 19:35 ` PATCH: Replace rex64XYZ with rex.WRXB H. J. Lu 0 siblings, 1 reply; 6+ messages in thread From: H. J. Lu @ 2007-03-21 21:20 UTC (permalink / raw) To: binutils On Wed, Mar 21, 2007 at 12:38:38PM -0700, H. J. Lu wrote: > The hardware spec uses REX.W/REX.R/REX.X/REX.B. But x86 binutils uses > REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ. I have to do a translation > when I read the code. I suggest we repleace them with > REX_W/REX_R/REX_X/REX_B. Dissassembler will print rexWRXB instead of > rex64XYZ. > I am checking in this patch. I am not sure what to do with rex64XYZ. If I use rexw, rexr, rexx and rexb, rexx will map to a different byte. Should I use rex_w, rex_r, rex_x and rex_b and leave the old rexX alone for backward compatibility? What about the disassembler output? Should I use rex_w, rex_r, rex_x and rex_b? The old one is hard to understand, especially when you are looking the spec at the same time. H.J. ---- gas/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively. include/opcode/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386.h (REX_MODE64): Renamed to ... (REX_W): This. (REX_EXTX): Renamed to ... (REX_R): This. (REX_EXTY): Renamed to ... (REX_X): This. (REX_EXTZ): Renamed to ... (REX_B): This. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REX_MODE64): Remove definition. (REX_EXTX): Likewise. (REX_EXTY): Likewise. (REX_EXTZ): Likewise. (USED_REX): Use REX_OPCODE instead of 0x40. Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively. --- binutils/gas/config/tc-i386.c.rex 2007-03-21 13:47:06.000000000 -0700 +++ binutils/gas/config/tc-i386.c 2007-03-21 13:57:48.000000000 -0700 @@ -991,9 +991,9 @@ add_prefix (unsigned int prefix) if (prefix >= REX_OPCODE && prefix < REX_OPCODE + 16 && flag_code == CODE_64BIT) { - if ((i.prefix[REX_PREFIX] & prefix & REX_MODE64) - || ((i.prefix[REX_PREFIX] & (REX_EXTX | REX_EXTY | REX_EXTZ)) - && (prefix & (REX_EXTX | REX_EXTY | REX_EXTZ)))) + if ((i.prefix[REX_PREFIX] & prefix & REX_W) + || ((i.prefix[REX_PREFIX] & (REX_R | REX_X | REX_B)) + && (prefix & (REX_R | REX_X | REX_B)))) ret = 0; q = REX_PREFIX; } @@ -1353,10 +1353,10 @@ pi (char *line, i386_insn *x) fprintf (stdout, " sib: base %x index %x scale %x\n", x->sib.base, x->sib.index, x->sib.scale); fprintf (stdout, " rex: 64bit %x extX %x extY %x extZ %x\n", - (x->rex & REX_MODE64) != 0, - (x->rex & REX_EXTX) != 0, - (x->rex & REX_EXTY) != 0, - (x->rex & REX_EXTZ) != 0); + (x->rex & REX_W) != 0, + (x->rex & REX_R) != 0, + (x->rex & REX_X) != 0, + (x->rex & REX_B) != 0); for (i = 0; i < x->operands; i++) { fprintf (stdout, " #%d: ", i + 1); @@ -1878,7 +1878,7 @@ md_assemble (line) } if ((i.tm.opcode_modifier & Rex64) != 0) - i.rex |= REX_MODE64; + i.rex |= REX_W; /* For 8 bit registers we need an empty rex prefix. Also if the instruction already has a prefix, we need to convert old @@ -2984,7 +2984,7 @@ process_suffix (void) || i.types [0] != (Acc | Reg64) || i.types [1] != (Acc | Reg64) || strcmp (i.tm.name, "xchg") != 0) - i.rex |= REX_MODE64; + i.rex |= REX_W; } /* Size floating point instruction. */ @@ -3298,7 +3298,7 @@ process_operands (void) } i.tm.base_opcode |= (i.op[0].regs->reg_num << 3); if ((i.op[0].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; } else { @@ -3307,7 +3307,7 @@ process_operands (void) /* Register goes in low 3 bits of opcode. */ i.tm.base_opcode |= i.op[op].regs->reg_num; if ((i.op[op].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; if (!quiet_warnings && (i.tm.opcode_modifier & Ugh) != 0) { /* Warn about some common errors, but press on regardless. @@ -3416,24 +3416,24 @@ build_modrm_byte (void) i.rm.reg = i.op[dest].regs->reg_num; i.rm.regmem = i.op[source].regs->reg_num; if ((i.op[dest].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTX; + i.rex |= REX_R; if ((i.op[source].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; } else { i.rm.reg = i.op[source].regs->reg_num; i.rm.regmem = i.op[dest].regs->reg_num; if ((i.op[dest].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; if ((i.op[source].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTX; + i.rex |= REX_R; } - if (flag_code != CODE_64BIT && (i.rex & (REX_EXTX | REX_EXTZ))) + if (flag_code != CODE_64BIT && (i.rex & (REX_R | REX_B))) { if (!((i.types[0] | i.types[1]) & Control)) abort (); - i.rex &= ~(REX_EXTX | REX_EXTZ); + i.rex &= ~(REX_R | REX_B); add_prefix (LOCK_PREFIX_OPCODE); } } @@ -3495,7 +3495,7 @@ build_modrm_byte (void) else i.types[op] |= Disp32S; if ((i.index_reg->reg_flags & RegRex) != 0) - i.rex |= REX_EXTY; + i.rex |= REX_X; } } /* RIP addressing for 64bit mode. */ @@ -3548,7 +3548,7 @@ build_modrm_byte (void) i.rm.regmem = i.base_reg->reg_num; if ((i.base_reg->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; i.sib.base = i.base_reg->reg_num; /* x86-64 ignores REX prefix bit here to avoid decoder complications. */ @@ -3585,7 +3585,7 @@ build_modrm_byte (void) i.sib.index = i.index_reg->reg_num; i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING; if ((i.index_reg->reg_flags & RegRex) != 0) - i.rex |= REX_EXTY; + i.rex |= REX_X; } if (i.disp_operands @@ -3633,13 +3633,13 @@ build_modrm_byte (void) { i.rm.regmem = i.op[op].regs->reg_num; if ((i.op[op].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTZ; + i.rex |= REX_B; } else { i.rm.reg = i.op[op].regs->reg_num; if ((i.op[op].regs->reg_flags & RegRex) != 0) - i.rex |= REX_EXTX; + i.rex |= REX_R; } /* Now, if no memory operand has set i.rm.mode = 0, 1, 2 we --- binutils/include/opcode/i386.h.rex 2007-03-15 07:46:26.000000000 -0700 +++ binutils/include/opcode/i386.h 2007-03-21 13:53:57.000000000 -0700 @@ -91,13 +91,13 @@ #define REX_OPCODE 0x40 /* Indicates 64 bit operand size. */ -#define REX_MODE64 8 +#define REX_W 8 /* High extension to reg field of modrm byte. */ -#define REX_EXTX 4 +#define REX_R 4 /* High extension to SIB index field. */ -#define REX_EXTY 2 +#define REX_X 2 /* High extension to base field of modrm or SIB, or reg field of opcode. */ -#define REX_EXTZ 1 +#define REX_B 1 /* max operands per insn */ #define MAX_OPERANDS 4 --- binutils/opcodes/i386-dis.c.rex 2007-03-21 13:47:06.000000000 -0700 +++ binutils/opcodes/i386-dis.c 2007-03-21 14:02:18.000000000 -0700 @@ -124,10 +124,6 @@ static int prefixes; static int rex; /* Bits of REX we've already used. */ static int rex_used; -#define REX_MODE64 8 -#define REX_EXTX 4 -#define REX_EXTY 2 -#define REX_EXTZ 1 /* Mark parts used in the REX prefix. When we are testing for empty prefix (for 8bit register REX extension), just mask it out. Otherwise test for REX bit is excuse for existence of REX @@ -135,9 +131,12 @@ static int rex_used; #define USED_REX(value) \ { \ if (value) \ - rex_used |= (rex & value) ? (value) | 0x40 : 0; \ + { \ + if ((rex & value)) \ + rex_used |= (value) | REX_OPCODE; \ + } \ else \ - rex_used |= 0x40; \ + rex_used |= REX_OPCODE; \ } /* Flags for prefixes which we somehow handled when printing the @@ -3750,10 +3749,10 @@ putop (const char *template, int sizefla case 'D': if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS)) break; - USED_REX (REX_MODE64); + USED_REX (REX_W); if (mod == 3) { - if (rex & REX_MODE64) + if (rex & REX_W) *obufp++ = 'q'; else if (sizeflag & DFLAG) *obufp++ = intel_syntax ? 'd' : 'l'; @@ -3792,11 +3791,11 @@ putop (const char *template, int sizefla case 'G': if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS))) break; - if ((rex & REX_MODE64) || (sizeflag & DFLAG)) + if ((rex & REX_W) || (sizeflag & DFLAG)) *obufp++ = 'l'; else *obufp++ = 'w'; - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; case 'H': @@ -3841,14 +3840,14 @@ putop (const char *template, int sizefla used_prefixes |= PREFIX_FWAIT; break; case 'O': - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) *obufp++ = 'o'; else if (intel_syntax && (sizeflag & DFLAG)) *obufp++ = 'q'; else *obufp++ = 'd'; - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; case 'T': @@ -3864,11 +3863,11 @@ putop (const char *template, int sizefla if (intel_syntax) break; if ((prefixes & PREFIX_DATA) - || (rex & REX_MODE64) + || (rex & REX_W) || (sizeflag & SUFFIX_ALWAYS)) { - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) *obufp++ = 'q'; else { @@ -3893,10 +3892,10 @@ putop (const char *template, int sizefla case 'Q': if (intel_syntax && !alt) break; - USED_REX (REX_MODE64); + USED_REX (REX_W); if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) { - if (rex & REX_MODE64) + if (rex & REX_W) *obufp++ = 'q'; else { @@ -3909,8 +3908,8 @@ putop (const char *template, int sizefla } break; case 'R': - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) *obufp++ = 'q'; else if (sizeflag & DFLAG) { @@ -3922,9 +3921,9 @@ putop (const char *template, int sizefla else *obufp++ = 'w'; if (intel_syntax && !p[1] - && ((rex & REX_MODE64) || (sizeflag & DFLAG))) + && ((rex & REX_W) || (sizeflag & DFLAG))) *obufp++ = 'e'; - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; case 'V': @@ -3942,7 +3941,7 @@ putop (const char *template, int sizefla break; if (sizeflag & SUFFIX_ALWAYS) { - if (rex & REX_MODE64) + if (rex & REX_W) *obufp++ = 'q'; else { @@ -3964,17 +3963,17 @@ putop (const char *template, int sizefla case 'Y': if (intel_syntax) break; - if (rex & REX_MODE64) + if (rex & REX_W) { - USED_REX (REX_MODE64); + USED_REX (REX_W); *obufp++ = 'q'; } break; /* implicit operand size 'l' for i386 or 'q' for x86-64 */ case 'W': /* operand size flag for cwtl, cbtw */ - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) { if (intel_syntax) *obufp++ = 'd'; @@ -3985,7 +3984,7 @@ putop (const char *template, int sizefla *obufp++ = 'w'; else *obufp++ = 'b'; - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; } @@ -4124,8 +4123,8 @@ intel_operand_size (int bytemode, int si /* FALLTHRU */ case v_mode: case dq_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) oappend ("QWORD PTR "); else if ((sizeflag & DFLAG) || bytemode == dq_mode) oappend ("DWORD PTR "); @@ -4134,10 +4133,10 @@ intel_operand_size (int bytemode, int si used_prefixes |= (prefixes & PREFIX_DATA); break; case z_mode: - if ((rex & REX_MODE64) || (sizeflag & DFLAG)) + if ((rex & REX_W) || (sizeflag & DFLAG)) *obufp++ = 'D'; oappend ("WORD PTR "); - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; case d_mode: @@ -4179,8 +4178,8 @@ OP_E (int bytemode, int sizeflag) bfd_vma disp; int add = 0; int riprel = 0; - USED_REX (REX_EXTZ); - if (rex & REX_EXTZ) + USED_REX (REX_B); + if (rex & REX_B) add += 8; /* Skip mod/rm byte. */ @@ -4225,8 +4224,8 @@ OP_E (int bytemode, int sizeflag) case v_mode: case dq_mode: case dqw_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) oappend (names64[rm + add]); else if ((sizeflag & DFLAG) || bytemode != v_mode) oappend (names32[rm + add]); @@ -4269,8 +4268,8 @@ OP_E (int bytemode, int sizeflag) /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */ scale = (*codep >> 6) & 3; base = *codep & 7; - USED_REX (REX_EXTY); - if (rex & REX_EXTY) + USED_REX (REX_X); + if (rex & REX_X) index += 8; codep++; } @@ -4455,8 +4454,8 @@ static void OP_G (int bytemode, int sizeflag) { int add = 0; - USED_REX (REX_EXTX); - if (rex & REX_EXTX) + USED_REX (REX_R); + if (rex & REX_R) add += 8; switch (bytemode) { @@ -4479,8 +4478,8 @@ OP_G (int bytemode, int sizeflag) case v_mode: case dq_mode: case dqw_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) oappend (names64[reg + add]); else if ((sizeflag & DFLAG) || bytemode != v_mode) oappend (names32[reg + add]); @@ -4587,8 +4586,8 @@ OP_REG (int code, int sizeflag) { const char *s; int add = 0; - USED_REX (REX_EXTZ); - if (rex & REX_EXTZ) + USED_REX (REX_B); + if (rex & REX_B) add = 8; switch (code) @@ -4620,8 +4619,8 @@ OP_REG (int code, int sizeflag) /* Fall through. */ case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) s = names64[code - eAX_reg + add]; else if (sizeflag & DFLAG) s = names32[code - eAX_reg + add]; @@ -4667,8 +4666,8 @@ OP_IMREG (int code, int sizeflag) break; case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) s = names64[code - eAX_reg]; else if (sizeflag & DFLAG) s = names32[code - eAX_reg]; @@ -4677,11 +4676,11 @@ OP_IMREG (int code, int sizeflag) used_prefixes |= (prefixes & PREFIX_DATA); break; case z_mode_ax_reg: - if ((rex & REX_MODE64) || (sizeflag & DFLAG)) + if ((rex & REX_W) || (sizeflag & DFLAG)) s = *names32; else s = *names16; - if (!(rex & REX_MODE64)) + if (!(rex & REX_W)) used_prefixes |= (prefixes & PREFIX_DATA); break; default: @@ -4712,8 +4711,8 @@ OP_I (int bytemode, int sizeflag) } /* Fall through. */ case v_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) op = get32s (); else if (sizeflag & DFLAG) { @@ -4767,8 +4766,8 @@ OP_I64 (int bytemode, int sizeflag) mask = 0xff; break; case v_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) op = get64 (); else if (sizeflag & DFLAG) { @@ -4814,8 +4813,8 @@ OP_sI (int bytemode, int sizeflag) mask = 0xffffffff; break; case v_mode: - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) op = get32s (); else if (sizeflag & DFLAG) { @@ -4863,7 +4862,7 @@ OP_J (int bytemode, int sizeflag) disp -= 0x100; break; case v_mode: - if ((sizeflag & DFLAG) || (rex & REX_MODE64)) + if ((sizeflag & DFLAG) || (rex & REX_W)) disp = get32s (); else { @@ -5063,9 +5062,9 @@ static void OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { int add = 0; - if (rex & REX_EXTX) + if (rex & REX_R) { - USED_REX (REX_EXTX); + USED_REX (REX_R); add = 8; } else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK)) @@ -5081,8 +5080,8 @@ static void OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { int add = 0; - USED_REX (REX_EXTX); - if (rex & REX_EXTX) + USED_REX (REX_R); + if (rex & REX_R) add = 8; if (intel_syntax) sprintf (scratchbuf, "db%d", reg + add); @@ -5114,8 +5113,8 @@ OP_MMX (int bytemode ATTRIBUTE_UNUSED, i if (prefixes & PREFIX_DATA) { int add = 0; - USED_REX (REX_EXTX); - if (rex & REX_EXTX) + USED_REX (REX_R); + if (rex & REX_R) add = 8; sprintf (scratchbuf, "%%xmm%d", reg + add); } @@ -5128,8 +5127,8 @@ static void OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { int add = 0; - USED_REX (REX_EXTX); - if (rex & REX_EXTX) + USED_REX (REX_R); + if (rex & REX_R) add = 8; sprintf (scratchbuf, "%%xmm%d", reg + add); oappend (scratchbuf + intel_syntax); @@ -5157,8 +5156,8 @@ OP_EM (int bytemode, int sizeflag) { int add = 0; - USED_REX (REX_EXTZ); - if (rex & REX_EXTZ) + USED_REX (REX_B); + if (rex & REX_B) add = 8; sprintf (scratchbuf, "%%xmm%d", rm + add); } @@ -5222,8 +5221,8 @@ OP_EX (int bytemode, int sizeflag) OP_E (bytemode, sizeflag); return; } - USED_REX (REX_EXTZ); - if (rex & REX_EXTZ) + USED_REX (REX_B); + if (rex & REX_B) add = 8; /* Skip mod/rm byte. */ @@ -5764,8 +5763,8 @@ REP_Fixup (int bytemode, int sizeflag) static void CMPXCHG8B_Fixup (int bytemode, int sizeflag) { - USED_REX (REX_MODE64); - if (rex & REX_MODE64) + USED_REX (REX_W); + if (rex & REX_W) { /* Change cmpxchg8b to cmpxchg16b. */ char *p = obuf + strlen (obuf) - 2; ^ permalink raw reply [flat|nested] 6+ messages in thread
* PATCH: Replace rex64XYZ with rex.WRXB 2007-03-21 21:20 ` PATCH: Replace REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ with REX_W/REX_R/REX_X/REX_B H. J. Lu @ 2007-03-22 19:35 ` H. J. Lu 2007-03-23 7:50 ` Jan Beulich 0 siblings, 1 reply; 6+ messages in thread From: H. J. Lu @ 2007-03-22 19:35 UTC (permalink / raw) To: binutils On Wed, Mar 21, 2007 at 02:20:39PM -0700, H. J. Lu wrote: > On Wed, Mar 21, 2007 at 12:38:38PM -0700, H. J. Lu wrote: > > The hardware spec uses REX.W/REX.R/REX.X/REX.B. But x86 binutils uses > > REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ. I have to do a translation > > when I read the code. I suggest we repleace them with > > REX_W/REX_R/REX_X/REX_B. Dissassembler will print rexWRXB instead of > > rex64XYZ. > > > > I am checking in this patch. I am not sure what to do with rex64XYZ. > If I use rexw, rexr, rexx and rexb, rexx will map to a different > byte. Should I use rex_w, rex_r, rex_x and rex_b and leave the old > rexX alone for backward compatibility? > > What about the disassembler output? Should I use rex_w, rex_r, rex_x > and rex_b? The old one is hard to understand, especially when > you are looking the spec at the same time. > > This is a followup patch. I added rex.WRXB to assembler. The old rex64XYZ still works. The disassembler output is changed from rex64XYZ to rex.WRXB. BTW, will '.' in mnemonic be a problem? H.J. ---- gas/ 2003-03-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Allow '.' in mnemonic. gas/testsuite/ 2003-03-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add tests for rex.WRXB. * gas/i386/rex.d: Updated. * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. * gas/i386/x86-64-io-intel.d : Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. * i386-opc.c (i386_optab): Add rex.wrxb. --- binutils/gas/config/tc-i386.c.rex 2007-03-22 10:27:58.000000000 -0700 +++ binutils/gas/config/tc-i386.c 2007-03-22 11:48:43.000000000 -0700 @@ -1294,6 +1294,7 @@ md_begin () #endif digit_chars['-'] = '-'; mnemonic_chars['-'] = '-'; + mnemonic_chars['.'] = '.'; identifier_chars['_'] = '_'; identifier_chars['.'] = '.'; --- binutils/gas/testsuite/gas/i386/rex.d.rex 2006-09-20 04:35:11.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/rex.d 2007-03-22 12:18:05.000000000 -0700 @@ -7,11 +7,27 @@ Disassembly of section .text: 0+ <_start>: [ ]*[0-9a-f]+:[ ]+40 0f ae 00[ ]+rex fxsavel?[ ]+\(%rax\) -[ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+(rex64 )?fxsaveq?[ ]+\(%rax\) +[ ]*[0-9a-f]+:[ ]+48 0f ae 00[ ]+(rex.W )?fxsaveq?[ ]+\(%rax\) [ ]*[0-9a-f]+:[ ]+41 0f ae 00[ ]+fxsavel?[ ]+\(%r8\) -[ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+(rex64Z? )?fxsaveq?[ ]+\(%r8\) +[ ]*[0-9a-f]+:[ ]+49 0f ae 00[ ]+(rex.WB? )?fxsaveq?[ ]+\(%r8\) [ ]*[0-9a-f]+:[ ]+42 0f ae 04 05 00 00 00 00[ ]+fxsavel?[ ]+(0x0)?\(,%r8(,1)?\) -[ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+(rex64Y? )?fxsaveq?[ ]+(0x0)?\(,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+4a 0f ae 04 05 00 00 00 00[ ]+(rex.WX? )?fxsaveq?[ ]+(0x0)?\(,%r8(,1)?\) [ ]*[0-9a-f]+:[ ]+43 0f ae 04 00[ ]+fxsavel?[ ]+\(%r8,%r8(,1)?\) -[ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+(rex64(YZ)? )?fxsaveq?[ ]+\(%r8,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+4b 0f ae 04 00[ ]+(rex.W(XB)? )?fxsaveq?[ ]+\(%r8,%r8(,1)?\) +[ ]*[0-9a-f]+:[ ]+40[ ]+rex +[ ]*[0-9a-f]+:[ ]+41[ ]+rex.B +[ ]*[0-9a-f]+:[ ]+42[ ]+rex.X +[ ]*[0-9a-f]+:[ ]+43[ ]+rex.XB +[ ]*[0-9a-f]+:[ ]+44[ ]+rex.R +[ ]*[0-9a-f]+:[ ]+45[ ]+rex.RB +[ ]*[0-9a-f]+:[ ]+46[ ]+rex.RX +[ ]*[0-9a-f]+:[ ]+47[ ]+rex.RXB +[ ]*[0-9a-f]+:[ ]+48[ ]+rex.W +[ ]*[0-9a-f]+:[ ]+49[ ]+rex.WB +[ ]*[0-9a-f]+:[ ]+4a[ ]+rex.WX +[ ]*[0-9a-f]+:[ ]+4b[ ]+rex.WXB +[ ]*[0-9a-f]+:[ ]+4c[ ]+rex.WR +[ ]*[0-9a-f]+:[ ]+4d[ ]+rex.WRB +[ ]*[0-9a-f]+:[ ]+4e[ ]+rex.WRX +[ ]*[0-9a-f]+:[ ]+4f[ ]+rex.WRXB #pass --- binutils/gas/testsuite/gas/i386/rex.s.rex 2005-12-14 00:57:06.000000000 -0800 +++ binutils/gas/testsuite/gas/i386/rex.s 2007-03-22 12:15:51.000000000 -0700 @@ -9,3 +9,21 @@ _start: rex64/fxsave (,%r8) rex/fxsave (%r8,%r8) rex64/fxsave (%r8,%r8) + +# Test prefixes family. + rex + rex.B + rex.X + rex.XB + rex.R + rex.RB + rex.RX + rex.RXB + rex.W + rex.WB + rex.WX + rex.WXB + rex.WR + rex.WRB + rex.WRX + rex.WRXB --- binutils/gas/testsuite/gas/i386/x86-64-io-intel.d.rex 2006-12-01 07:00:12.000000000 -0800 +++ binutils/gas/testsuite/gas/i386/x86-64-io-intel.d 2007-03-22 12:12:24.000000000 -0700 @@ -1,28 +1,28 @@ #source: x86-64-io.s #objdump: -dwMintel -#name: x86-64 rex64 in/out (Intel disassembly) +#name: x86-64 rex.W in/out (Intel disassembly) .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 in eax,dx + 0: 48 ed rex.W in eax,dx 2: 66 data16 - 3: 48 ed rex64 in eax,dx + 3: 48 ed rex.W in eax,dx 0+005 <_out>: - 5: 48 ef rex64 out dx,eax + 5: 48 ef rex.W out dx,eax 7: 66 data16 - 8: 48 ef rex64 out dx,eax + 8: 48 ef rex.W out dx,eax 0+00a <_ins>: - a: 48 6d rex64 ins DWORD PTR es:\[rdi\],dx + a: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx c: 66 data16 - d: 48 6d rex64 ins DWORD PTR es:\[rdi\],dx + d: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx 0+00f <_outs>: - f: 48 6f rex64 outs dx,DWORD PTR ds:\[rsi\] + f: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\] 11: 66 data16 - 12: 48 6f rex64 outs dx,DWORD PTR ds:\[rsi\] + 12: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\] #pass --- binutils/gas/testsuite/gas/i386/x86-64-io-suffix.d.rex 2006-12-01 07:00:12.000000000 -0800 +++ binutils/gas/testsuite/gas/i386/x86-64-io-suffix.d 2007-03-22 12:12:35.000000000 -0700 @@ -1,28 +1,28 @@ #source: x86-64-io.s #objdump: -dwMsuffix -#name: x86-64 rex64 in/out w/ suffix +#name: x86-64 rex.W in/out w/ suffix .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 inl \(%dx\),%eax + 0: 48 ed rex.W inl \(%dx\),%eax 2: 66 data16 - 3: 48 ed rex64 inl \(%dx\),%eax + 3: 48 ed rex.W inl \(%dx\),%eax 0+005 <_out>: - 5: 48 ef rex64 outl %eax,\(%dx\) + 5: 48 ef rex.W outl %eax,\(%dx\) 7: 66 data16 - 8: 48 ef rex64 outl %eax,\(%dx\) + 8: 48 ef rex.W outl %eax,\(%dx\) 0+00a <_ins>: - a: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) c: 66 data16 - d: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) 0+00f <_outs>: - f: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) 11: 66 data16 - 12: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + 12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) #pass --- binutils/gas/testsuite/gas/i386/x86-64-io.d.rex 2006-12-01 07:00:12.000000000 -0800 +++ binutils/gas/testsuite/gas/i386/x86-64-io.d 2007-03-22 12:12:09.000000000 -0700 @@ -1,27 +1,27 @@ #objdump: -dw -#name: x86-64 rex64 in/out +#name: x86-64 rex.W in/out .*: +file format .* Disassembly of section .text: 0+000 <_in>: - 0: 48 ed rex64 in \(%dx\),%eax + 0: 48 ed rex.W in \(%dx\),%eax 2: 66 data16 - 3: 48 ed rex64 in \(%dx\),%eax + 3: 48 ed rex.W in \(%dx\),%eax 0+005 <_out>: - 5: 48 ef rex64 out %eax,\(%dx\) + 5: 48 ef rex.W out %eax,\(%dx\) 7: 66 data16 - 8: 48 ef rex64 out %eax,\(%dx\) + 8: 48 ef rex.W out %eax,\(%dx\) 0+00a <_ins>: - a: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) c: 66 data16 - d: 48 6d rex64 insl \(%dx\),%es:\(%rdi\) + d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\) 0+00f <_outs>: - f: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) + f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) 11: 66 data16 - 12: 48 6f rex64 outsl %ds:\(%rsi\),\(%dx\) -#pass \ No newline at end of file + 12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\) +#pass --- binutils/gas/testsuite/gas/i386/x86-64-opcode.d.rex 2007-03-21 13:47:06.000000000 -0700 +++ binutils/gas/testsuite/gas/i386/x86-64-opcode.d 2007-03-22 12:12:48.000000000 -0700 @@ -272,7 +272,7 @@ Disassembly of section .text: [ ]*[0-9a-f]+:[ ]+66 90[ ]+xchg[ ]+%ax,%ax[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+87 c0[ ]+xchg[ ]+%eax,%eax[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+90[ ]+nop[ ]*(#.*)* -[ ]*[0-9a-f]+:[ ]+48 90[ ]+rex64 nop[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+48 90[ ]+rex.W nop[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+49 90[ ]+xchg[ ]+%rax,%r8[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+41 90[ ]+xchg[ ]+%eax,%r8d[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+41 90[ ]+xchg[ ]+%eax,%r8d[ ]*(#.*)* --- binutils/opcodes/i386-dis.c.rex 2007-03-21 14:24:12.000000000 -0700 +++ binutils/opcodes/i386-dis.c 2007-03-22 12:19:43.000000000 -0700 @@ -2734,41 +2734,46 @@ ckprefix (void) static const char * prefix_name (int pref, int sizeflag) { + static const char *rexes [16] = + { + "rex", /* 0x40 */ + "rex.B", /* 0x41 */ + "rex.X", /* 0x42 */ + "rex.XB", /* 0x43 */ + "rex.R", /* 0x44 */ + "rex.RB", /* 0x45 */ + "rex.RX", /* 0x46 */ + "rex.RXB", /* 0x47 */ + "rex.W", /* 0x48 */ + "rex.WB", /* 0x49 */ + "rex.WX", /* 0x4a */ + "rex.WXB", /* 0x4b */ + "rex.WR", /* 0x4c */ + "rex.WRB", /* 0x4d */ + "rex.WRX", /* 0x4e */ + "rex.WRXB", /* 0x4f */ + }; + switch (pref) { /* REX prefixes family. */ case 0x40: - return "rex"; case 0x41: - return "rexZ"; case 0x42: - return "rexY"; case 0x43: - return "rexYZ"; case 0x44: - return "rexX"; case 0x45: - return "rexXZ"; case 0x46: - return "rexXY"; case 0x47: - return "rexXYZ"; case 0x48: - return "rex64"; case 0x49: - return "rex64Z"; case 0x4a: - return "rex64Y"; case 0x4b: - return "rex64YZ"; case 0x4c: - return "rex64X"; case 0x4d: - return "rex64XZ"; case 0x4e: - return "rex64XY"; case 0x4f: - return "rex64XYZ"; + return rexes [pref - 0x40]; case 0xf3: return "repz"; case 0xf2: --- binutils/opcodes/i386-opc.c.rex 2007-03-21 13:47:06.000000000 -0700 +++ binutils/opcodes/i386-opc.c 2007-03-22 12:32:51.000000000 -0700 @@ -846,6 +846,21 @@ const template i386_optab[] = {"rex64xz",0, 0x4d, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, {"rex64xy",0, 0x4e, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, {"rex64xyz",0, 0x4f, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.b", 0, 0x41, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.x", 0, 0x42, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.xb", 0, 0x43, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.r", 0, 0x44, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rb", 0, 0x45, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rx", 0, 0x46, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.rxb",0, 0x47, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.w", 0, 0x48, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wb", 0, 0x49, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wx", 0, 0x4a, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wxb",0, 0x4b, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wr", 0, 0x4c, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrb",0, 0x4d, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrx",0, 0x4e, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, +{"rex.wrxb",0, 0x4f, X, Cpu64, NoSuf|IsPrefix, { 0, 0, 0} }, /* 486 extensions. */ ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: PATCH: Replace rex64XYZ with rex.WRXB 2007-03-22 19:35 ` PATCH: Replace rex64XYZ with rex.WRXB H. J. Lu @ 2007-03-23 7:50 ` Jan Beulich 2007-03-23 13:04 ` H. J. Lu 0 siblings, 1 reply; 6+ messages in thread From: Jan Beulich @ 2007-03-23 7:50 UTC (permalink / raw) To: H. J. Lu, binutils >BTW, will '.' in mnemonic be a problem? The only thing I'm afraid of here (but that applied already when . was added to identifier_chars) is that in Intel syntax, . is an operator (although I think the support for this is currently at best partly working). Jan ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: PATCH: Replace rex64XYZ with rex.WRXB 2007-03-23 7:50 ` Jan Beulich @ 2007-03-23 13:04 ` H. J. Lu 2007-03-23 13:45 ` H. J. Lu 0 siblings, 1 reply; 6+ messages in thread From: H. J. Lu @ 2007-03-23 13:04 UTC (permalink / raw) To: Jan Beulich; +Cc: binutils On Fri, Mar 23, 2007 at 07:50:17AM +0000, Jan Beulich wrote: > >BTW, will '.' in mnemonic be a problem? > > The only thing I'm afraid of here (but that applied already when . was added > to identifier_chars) is that in Intel syntax, . is an operator (although I think > the support for this is currently at best partly working). Do we have some testcases? H.J. ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: PATCH: Replace rex64XYZ with rex.WRXB 2007-03-23 13:04 ` H. J. Lu @ 2007-03-23 13:45 ` H. J. Lu 0 siblings, 0 replies; 6+ messages in thread From: H. J. Lu @ 2007-03-23 13:45 UTC (permalink / raw) To: Jan Beulich; +Cc: binutils On Fri, Mar 23, 2007 at 06:04:11AM -0700, H. J. Lu wrote: > On Fri, Mar 23, 2007 at 07:50:17AM +0000, Jan Beulich wrote: > > >BTW, will '.' in mnemonic be a problem? > > > > The only thing I'm afraid of here (but that applied already when . was added > > to identifier_chars) is that in Intel syntax, . is an operator (although I think > > the support for this is currently at best partly working). > > Do we have some testcases? > I can image that '.' in identifier may cause problem for operator parsing. Isn't mnemonic parsing done before all complex Intel syntax work? Also '.' is allowed in directives and labels. I don't see how '.' in mnemonic will impact Intel syntax. H.J. ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2007-03-23 13:45 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2007-03-21 19:38 Why does x86 binutils use REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ? H. J. Lu 2007-03-21 21:20 ` PATCH: Replace REX_MODE64/REX_EXTX/REX_EXTY/REX_EXTZ with REX_W/REX_R/REX_X/REX_B H. J. Lu 2007-03-22 19:35 ` PATCH: Replace rex64XYZ with rex.WRXB H. J. Lu 2007-03-23 7:50 ` Jan Beulich 2007-03-23 13:04 ` H. J. Lu 2007-03-23 13:45 ` H. J. Lu
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).