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From: Jan Beulich <jbeulich@suse.com>
To: "binutils@sourceware.org" <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 8/9] x86: drop/replace IgnoreSize
Date: Wed, 04 Mar 2020 10:15:00 -0000	[thread overview]
Message-ID: <4925c201-e014-4c75-51f6-6bd6b4faba99@suse.com> (raw)
In-Reply-To: <e50faefe-9bed-e844-7e7f-0cfd49395da4@suse.com>

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Even after commit dc2be329b950 ("i386: Only check suffix in instruction
mnemonic"), by which many of its uses have become unnecessary (some were
unnecessary even before), IgnoreSize is still used for various slightly
different purposes:
- to suppress emission of an operand size prefix,
- in Intel syntax mode to zap "derived" suffixes in certain cases and to
  skip certain checks of remaining "derived" suffixes,
- to suppress ambiguous operand size / missing suffix diagnostics,
- for prefixes to suppress the "stand-alone ... prefix" warning.
Drop entirely unnecessary ones and where possible also replace instances
by the more focused (because of having just a single purpose) NoRex64.

To further restrict when IgnoreSize is needed, also generalize the logic
when to skip a template because of a present or derived L or Q suffix,
by skipping immediate operands. Additionally consider mask registers and
VecSIB there.

Note that for the time being the attribute needs to be kept in place on
MMX/SSE/etc insns (but not on VEX/EVEX encoded ones unless an operand
template of them allows for only non-SIMD-register actuals) allowing for
Dword operands - the logic when to emit a data size prefix would need
further adjustment first.

Note also that the memory forms of {,v}pinsrw get their permission for
an L or Q suffix dropped. I can only assume that it being this way was a
cut-and-paste mistake from the register forms, as the latter
specifically have NoRex64 set, and the {,v}pextrw counterparts don't
allow these suffixes either.

Convert VexW= again to their respective VexW* on lines touched anyway.

gas/
2020-03-XX  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_template): Extend code in logic
	rejecting certain suffixes in certain modes to also cover mask
	register use and VecSIB. Drop special casing of broadcast. Skip
	immediates in the check.

opcodes/
2020-03-XX  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
	VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
	* i386-tbl.h: Re-generate.

[resend with actual patch data as compressed attachment, for size reasons]

[-- Attachment #2: binutils-master-x86-stray-IgnoreSize.patch.bz2 --]
[-- Type: application/octet-stream, Size: 17000 bytes --]

  parent reply	other threads:[~2020-03-04 10:15 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04  9:32 [PATCH 0/9] x86: (mainly) misc IgnoreSize related adjustments Jan Beulich
2020-03-04  9:41 ` [PATCH 1/9] x86: refine TPAUSE and UMWAIT Jan Beulich
2020-03-04 11:37   ` H.J. Lu
2020-03-04 11:40     ` Jan Beulich
2020-03-04 11:44       ` H.J. Lu
2020-03-05  8:08         ` Jan Beulich
2020-03-05 14:05           ` H.J. Lu
2020-03-05 14:08             ` Jan Beulich
2020-03-05 14:38               ` H.J. Lu
2020-03-05 14:51                 ` Jan Beulich
2020-03-05 14:54                   ` H.J. Lu
2020-03-05 15:16                     ` Jan Beulich
2020-03-05 15:22             ` Jan Beulich
2020-03-05 15:37               ` H.J. Lu
2020-03-05 15:42                 ` Jan Beulich
2020-03-05 16:00                   ` H.J. Lu
2020-03-04  9:42 ` [PATCH 2/9] x86: add missing IgnoreSize Jan Beulich
2020-03-04 11:40   ` H.J. Lu
2020-03-04  9:43 ` [PATCH 3/9] x86: correct MPX insn w/o base or index encoding in 16-bit mode Jan Beulich
2020-03-04 11:46   ` H.J. Lu
2020-03-04 11:50     ` Jan Beulich
2020-03-04 11:55       ` H.J. Lu
2020-03-04 12:58         ` Jan Beulich
2020-03-04 13:26           ` H.J. Lu
2020-03-04  9:44 ` [PATCH 4/9] x86: drop Rex64 attribute Jan Beulich
2020-03-04 11:47   ` H.J. Lu
2020-03-04  9:45 ` [PATCH 6/9] x86: don't accept FI{LD,STP,STTP}LL in Intel syntax mode Jan Beulich
2020-03-04 11:55   ` H.J. Lu
2020-03-04  9:46 ` [PATCH 7/9] x86: fold (supposed to be) identical code Jan Beulich
2020-03-04 11:56   ` H.J. Lu
2020-03-04  9:47 ` [PATCH 9/9] x86: reduce amount of various VCVT* templates Jan Beulich
2020-03-04 12:00   ` H.J. Lu
2020-03-04 10:15 ` Jan Beulich [this message]
2020-03-04 11:59   ` [PATCH 8/9] x86: drop/replace IgnoreSize H.J. Lu
2020-03-04 10:19 ` [PATCH 5/9] x86: replace NoRex64 on VEX-encoded insns Jan Beulich
2020-03-04 11:51   ` H.J. Lu
2020-03-05  8:07 ` [PATCH v1.1 1/9] x86: refine TPAUSE and UMWAIT Jan Beulich

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