From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23557 invoked by alias); 15 Feb 2011 18:08:55 -0000 Received: (qmail 23540 invoked by uid 22791); 15 Feb 2011 18:08:53 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp2.caviumnetworks.com (HELO smtp2.caviumnetworks.com) (209.113.159.134) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 15 Feb 2011 18:08:49 +0000 Received: from caexch01.caveonetworks.com (Not Verified[192.168.16.9]) by smtp2.caviumnetworks.com with MailMarshal (v6,7,2,8378) id ; Tue, 15 Feb 2011 13:08:53 -0500 Received: from caexch01.caveonetworks.com ([192.168.16.9]) by caexch01.caveonetworks.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 15 Feb 2011 10:08:46 -0800 Received: from dd1.caveonetworks.com ([12.108.191.236]) by caexch01.caveonetworks.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 15 Feb 2011 10:08:46 -0800 Message-ID: <4D5AC12D.3080108@caviumnetworks.com> Date: Tue, 15 Feb 2011 18:08:00 -0000 From: David Daney User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.1.15) Gecko/20101027 Fedora/3.0.10-1.fc12 Thunderbird/3.0.10 MIME-Version: 1.0 To: Alexandre Oliva CC: linux-mips , GCC , binutils , Prasun Kapoor Subject: Re: RFC: A new MIPS64 ABI References: <4D5990A4.2050308@caviumnetworks.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00177.txt.bz2 On 02/15/2011 09:56 AM, Alexandre Oliva wrote: > On Feb 14, 2011, David Daney wrote: > >> Current MIPS 32-bit ABIs (both o32 and n32) are restricted to 2GB of >> user virtual memory space. This is due the way MIPS32 memory space is >> segmented. Only the range from 0..2^31-1 is available. Pointer >> values are always sign extended. > >> The proposed new ABI would only be available on MIPS64 platforms. It >> would be identical to the current MIPS n32 ABI *except* that pointers >> would be zero-extended rather than sign-extended when resident in >> registers. > > FTR, I don't really know why my Yeeloong is limited to 31-bit addresses, > and I kind of hoped an n32 userland would improve that WRT o32, without > wasting memory with longer pointers like n64 would. > > So, sorry if this is a dumb question, but wouldn't it be much easier to > keep on using sign-extended addresses, and just make sure the kernel > never allocates a virtual memory range that crosses a sign-bit change, > or whatever other reason there is for addresses to be limited to the > positive 2GB range in n32? > No, it is not possible. The MIPS (and MIPS64) hardware architecture does not allow userspace access to addresses with the high bit (two bits for mips64) set. Your complaint is a good summary of why I am thinking about n32-big. David Daney