From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20323 invoked by alias); 16 Feb 2011 22:13:14 -0000 Received: (qmail 20305 invoked by uid 22791); 16 Feb 2011 22:13:13 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from usmamail.tilera.com (HELO USMAMAIL.TILERA.COM) (206.83.70.70) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 16 Feb 2011 22:13:08 +0000 Received: from [10.7.0.147] (10.9.0.13) by USMAExch2.tad.internal.tilera.com (10.3.0.33) with Microsoft SMTP Server id 14.0.694.0; Wed, 16 Feb 2011 17:13:06 -0500 Message-ID: <4D5C4BF2.3090806@tilera.com> Date: Wed, 16 Feb 2011 22:13:00 -0000 From: Chris Metcalf User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.13) Gecko/20101207 Lightning/1.0b2 Thunderbird/3.1.7 MIME-Version: 1.0 To: "H.J. Lu" CC: Andrew Pinski , "H. Peter Anvin" , , GCC Development , Binutils , GNU C Library Subject: Re: x32 psABI draft version 0.2 References: <4D5C2DD2.10608@zytor.com> <4D5C34F8.9060506@tilera.com> In-Reply-To: Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00199.txt.bz2 On 2/16/2011 3:46 PM, H.J. Lu wrote: > On Wed, Feb 16, 2011 at 12:39 PM, Andrew Pinski wrote: >> On Wed, Feb 16, 2011 at 12:35 PM, Chris Metcalf wrote: >>> For what it's worth, the Tilera 64-bit architecture (forthcoming) includes >>> support for a 32-bit compatibility layer that is similar to x32. It uses >>> 64-bit registers throughout (e.g. for double and long long), but 32-bit >>> addresses. The addresses between 2GB and 4GB are not directly usable as >>> 64-bit addresses since we sign-extend all 32-bit values to make the ISA >>> more straightforward. We use the "compat" layer to provide our syscall >>> table, since we don't have a traditional compatibility layer in this mode >>> (unlike x86_64 and i386). >> This sounds more like MIPS' n32 than x32 really. >> > Yes, x32 can access the full 4GB address space. There are some > additional optimizations which can be done in x32, but not in x86-64 > small model. Just to be clear, the "-m32" mode in our 64-bit architecture can access the full 4GB address space, but since "-m32" pointers are sign-extended in the high 32 bits, the kernel/userspace boundary has to convert between a sign-extended userspace pointer and a regular zero-extended pointer that the kernel wants to see. -- Chris Metcalf, Tilera Corp. http://www.tilera.com