From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28488 invoked by alias); 23 May 2011 14:05:16 -0000 Received: (qmail 28364 invoked by uid 22791); 23 May 2011 14:05:01 -0000 X-SWARE-Spam-Status: No, hits=-0.2 required=5.0 tests=AWL,BAYES_50,TW_BF,TW_BL,TW_CL,TW_DR,TW_XD,TW_XF,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 23 May 2011 14:04:36 +0000 Received: (qmail 6611 invoked from network); 23 May 2011 14:04:34 -0000 Received: from unknown (HELO ?192.168.44.105?) (nathan@127.0.0.2) by mail.codesourcery.com with ESMTPA; 23 May 2011 14:04:34 -0000 Message-ID: <4DDA696F.40607@codesourcery.com> Date: Mon, 23 May 2011 14:05:00 -0000 From: Nathan Sidwell User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Lightning/1.0b2 Thunderbird/3.1.10 MIME-Version: 1.0 To: binutils Subject: [ARM] signed zero Content-Type: multipart/mixed; boundary="------------090701080404070708010603" Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-05/txt/msg00307.txt.bz2 This is a multi-part message in MIME format. --------------090701080404070708010603 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 516 This patch fixes issues with signed zero offsets in the arm assembler and disassembler. The ARM ISA encodes offsets in sign/magnitude representation, so there are two representations of zero. The ISA specifies how the assembler should select the right one, and the disassembler should explicitly show -0. For +0, it should elide the offset in certain circumstances. This patch fixes up things so that, for instance ldr r0,[r1,#-0] is encoded correctly. tested on arm-eabi, ok? nathan -- Nathan Sidwell --------------090701080404070708010603 Content-Type: text/x-patch; name="zero.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="zero.patch" Content-length: 119222 gas/ 2011-05-23 Jie Zhang jie@codesourcery.com Nathan Sidwell nathan@codesourcery.com * config/tc-arm.c (parse_address_main): Handle -0 offsets. (encode_arm_addr_mode_2): Set default sign of zero here ... (encode_arm_addr_mode_3): ... and here. (encode_arm_cp_address): ... and here. (md_apply_fix): Use default sign of zero here. opcodes/ 2011-05-23 Jie Zhang Nathan Sidwell Maciej Rozycki * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 as address offset. (print_arm_address): Likewise. Elide positive #0 appropriately. (print_insn_arm): Likewise. gas/testsuite/ 2011-05-23 Jie Zhang Nathan Sidwell * gas/arm/inst.d: Adjust for signed zero offsets. * gas/arm/ldst-offset0.d: New test. * gas/arm/ldst-offset0.s: New test. * gas/arm/offset-1.d: New test. * gas/arm/offset-1.s: New test. ld/testsuite/ 2011-05-23 Nathan Sidwell Adjust tests for zero offset formatting. * ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. * ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d: Adjust. * ld/testsuite/ld-arm/farcall-arm-thumb.d: Adjust. * ld/testsuite/ld-arm/farcall-group-size2.d: Adjust. * ld/testsuite/ld-arm/farcall-group.d: Adjust. * ld/testsuite/ld-arm/farcall-mix.d: Adjust. * ld/testsuite/ld-arm/farcall-mix2.d: Adjust. * ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d: Adjust. * ld/testsuite/ld-arm/farcall-mixed-lib.d: Adjust. * ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust. * ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust. * ld/testsuite/ld-arm/farcall-thumb-thumb.d: Adjust. * ld/testsuite/ld-arm/ifunc-10.dd: Adjust. * ld/testsuite/ld-arm/ifunc-3.dd: Adjust. * ld/testsuite/ld-arm/ifunc-4.dd: Adjust. * ld/testsuite/ld-arm/ifunc-5.dd: Adjust. * ld/testsuite/ld-arm/ifunc-6.dd: Adjust. * ld/testsuite/ld-arm/ifunc-7.dd: Adjust. * ld/testsuite/ld-arm/ifunc-8.dd: Adjust. * ld/testsuite/ld-arm/jump-reloc-veneers-long.d: Adjust. * ld/testsuite/ld-arm/tls-longplt-lib.d: Adjust. * ld/testsuite/ld-arm/tls-thumb1.d: Adjust. Index: gas/config/tc-arm.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-arm.c,v retrieving revision 1.485 diff -c -3 -p -r1.485 tc-arm.c *** gas/config/tc-arm.c 18 May 2011 09:41:14 -0000 1.485 --- gas/config/tc-arm.c 23 May 2011 13:56:05 -0000 *************** parse_address_main (char **str, int i, i *** 5200,5207 **** } } else ! if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX)) ! return PARSE_OPERAND_FAIL; } } else if (skip_past_char (&p, ':') == SUCCESS) --- 5200,5220 ---- } } else ! { ! char *q = p; ! if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX)) ! return PARSE_OPERAND_FAIL; ! /* If the offset is 0, find out if it's a +0 or -0. */ ! if (inst.reloc.exp.X_op == O_constant ! && inst.reloc.exp.X_add_number == 0) ! { ! skip_whitespace (q); ! if (*q == '#') q++; ! skip_whitespace (q); ! if (*q == '-') ! inst.operands[i].negative = 1; ! } ! } } } else if (skip_past_char (&p, ':') == SUCCESS) *************** parse_address_main (char **str, int i, i *** 5275,5280 **** --- 5288,5294 ---- } else { + char *q = p; if (inst.operands[i].negative) { inst.operands[i].negative = 0; *************** parse_address_main (char **str, int i, i *** 5282,5287 **** --- 5296,5311 ---- } if (my_get_expression (&inst.reloc.exp, &p, GE_IMM_PREFIX)) return PARSE_OPERAND_FAIL; + /* If the offset is 0, find out if it's a +0 or -0. */ + if (inst.reloc.exp.X_op == O_constant + && inst.reloc.exp.X_add_number == 0) + { + skip_whitespace (q); + if (*q == '#') q++; + skip_whitespace (q); + if (*q == '-') + inst.operands[i].negative = 1; + } } } } *************** encode_arm_addr_mode_2 (int i, bfd_boole *** 7038,7044 **** } if (inst.reloc.type == BFD_RELOC_UNUSED) ! inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM; } } --- 7062,7073 ---- } if (inst.reloc.type == BFD_RELOC_UNUSED) ! { ! /* Prefer + for zero encoded value. */ ! if (!inst.operands[i].negative) ! inst.instruction |= INDEX_UP; ! inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM; ! } } } *************** encode_arm_addr_mode_3 (int i, bfd_boole *** 7074,7080 **** BAD_PC_WRITEBACK); inst.instruction |= HWOFFSET_IMM; if (inst.reloc.type == BFD_RELOC_UNUSED) ! inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8; } } --- 7103,7115 ---- BAD_PC_WRITEBACK); inst.instruction |= HWOFFSET_IMM; if (inst.reloc.type == BFD_RELOC_UNUSED) ! { ! /* Prefer + for zero encoded value. */ ! if (!inst.operands[i].negative) ! inst.instruction |= INDEX_UP; ! ! inst.reloc.type = BFD_RELOC_ARM_OFFSET_IMM8; ! } } } *************** encode_arm_cp_address (int i, int wb_ok, *** 7136,7141 **** --- 7171,7180 ---- inst.reloc.type = BFD_RELOC_ARM_CP_OFF_IMM; } + /* Prefer + for zero encoded value. */ + if (!inst.operands[i].negative) + inst.instruction |= INDEX_UP; + return SUCCESS; } *************** md_apply_fix (fixS * fixP, *** 20422,20428 **** value = 0; case BFD_RELOC_ARM_LITERAL: ! sign = value >= 0; if (value < 0) value = - value; --- 20461,20467 ---- value = 0; case BFD_RELOC_ARM_LITERAL: ! sign = value > 0; if (value < 0) value = - value; *************** md_apply_fix (fixS * fixP, *** 20440,20453 **** } newval = md_chars_to_number (buf, INSN_SIZE); ! newval &= 0xff7ff000; ! newval |= value | (sign ? INDEX_UP : 0); md_number_to_chars (buf, newval, INSN_SIZE); break; case BFD_RELOC_ARM_OFFSET_IMM8: case BFD_RELOC_ARM_HWLITERAL: ! sign = value >= 0; if (value < 0) value = - value; --- 20479,20497 ---- } newval = md_chars_to_number (buf, INSN_SIZE); ! if (value == 0) ! newval &= 0xfffff000; ! else ! { ! newval &= 0xff7ff000; ! newval |= value | (sign ? INDEX_UP : 0); ! } md_number_to_chars (buf, newval, INSN_SIZE); break; case BFD_RELOC_ARM_OFFSET_IMM8: case BFD_RELOC_ARM_HWLITERAL: ! sign = value > 0; if (value < 0) value = - value; *************** md_apply_fix (fixS * fixP, *** 20464,20471 **** } newval = md_chars_to_number (buf, INSN_SIZE); ! newval &= 0xff7ff0f0; ! newval |= ((value >> 4) << 8) | (value & 0xf) | (sign ? INDEX_UP : 0); md_number_to_chars (buf, newval, INSN_SIZE); break; --- 20508,20520 ---- } newval = md_chars_to_number (buf, INSN_SIZE); ! if (value == 0) ! newval &= 0xfffff0f0; ! else ! { ! newval &= 0xff7ff0f0; ! newval |= ((value >> 4) << 8) | (value & 0xf) | (sign ? INDEX_UP : 0); ! } md_number_to_chars (buf, newval, INSN_SIZE); break; *************** md_apply_fix (fixS * fixP, *** 21092,21098 **** as_bad_where (fixP->fx_file, fixP->fx_line, _("co-processor offset out of range")); cp_off_common: ! sign = value >= 0; if (value < 0) value = -value; if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM --- 21141,21147 ---- as_bad_where (fixP->fx_file, fixP->fx_line, _("co-processor offset out of range")); cp_off_common: ! sign = value > 0; if (value < 0) value = -value; if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM *************** md_apply_fix (fixS * fixP, *** 21100,21107 **** newval = md_chars_to_number (buf, INSN_SIZE); else newval = get_thumb32_insn (buf); ! newval &= 0xff7fff00; ! newval |= (value >> 2) | (sign ? INDEX_UP : 0); if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM || fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM_S2) md_number_to_chars (buf, newval, INSN_SIZE); --- 21149,21161 ---- newval = md_chars_to_number (buf, INSN_SIZE); else newval = get_thumb32_insn (buf); ! if (value == 0) ! newval &= 0xffffff00; ! else ! { ! newval &= 0xff7fff00; ! newval |= (value >> 2) | (sign ? INDEX_UP : 0); ! } if (fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM || fixP->fx_r_type == BFD_RELOC_ARM_CP_OFF_IMM_S2) md_number_to_chars (buf, newval, INSN_SIZE); Index: gas/testsuite/gas/arm/inst.d =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/arm/inst.d,v retrieving revision 1.19 diff -c -3 -p -r1.19 inst.d *** gas/testsuite/gas/arm/inst.d 17 Nov 2009 17:20:25 -0000 1.19 --- gas/testsuite/gas/arm/inst.d 23 May 2011 13:56:06 -0000 *************** Disassembly of section .text: *** 130,136 **** 0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8 0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*> 0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\] ! 0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\] 0+1e8 <[^>]*> e5810000 ? str r0, \[r1\] 0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\] 0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]! --- 130,136 ---- 0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8 0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*> 0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\] ! 0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\], #0 0+1e8 <[^>]*> e5810000 ? str r0, \[r1\] 0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\] 0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]! *************** Disassembly of section .text: *** 142,148 **** 0+208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8 0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*> 0+210 <[^>]*> e5c71000 ? strb r1, \[r7\] ! 0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\] 0+218 <[^>]*> e8900002 ? ldm r0, {r1} 0+21c <[^>]*> 09920038 ? ldmibeq r2, {r3, r4, r5} 0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ --- 142,148 ---- 0+208 <[^>]*> e6a42425 ? strt r2, \[r4\], r5, lsr #8 0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*> 0+210 <[^>]*> e5c71000 ? strb r1, \[r7\] ! 0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\], #0 0+218 <[^>]*> e8900002 ? ldm r0, {r1} 0+21c <[^>]*> 09920038 ? ldmibeq r2, {r3, r4, r5} 0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^ Index: gas/testsuite/gas/arm/ldst-offset0.d =================================================================== RCS file: gas/testsuite/gas/arm/ldst-offset0.d diff -N gas/testsuite/gas/arm/ldst-offset0.d *** /dev/null 1 Jan 1970 00:00:00 -0000 --- gas/testsuite/gas/arm/ldst-offset0.d 23 May 2011 13:56:06 -0000 *************** *** 0 **** --- 1,51 ---- + #objdump: -dr --prefix-addresses --show-raw-insn + #name: ARM load/store with 0 offset + #as: + + # Test the standard ARM instructions: + + .*: +file format .*arm.* + + Disassembly of section .text: + 0+000 <[^>]*> e5121000 ldr r1, \[r2, #-0\] + 0+004 <[^>]*> e5121000 ldr r1, \[r2, #-0\] + 0+008 <[^>]*> e5921000 ldr r1, \[r2\] + 0+00c <[^>]*> e5921000 ldr r1, \[r2\] + 0+010 <[^>]*> e5321000 ldr r1, \[r2, #-0\]! + 0+014 <[^>]*> e5321000 ldr r1, \[r2, #-0\]! + 0+018 <[^>]*> e5b21000 ldr r1, \[r2, #0\]! + 0+01c <[^>]*> e5b21000 ldr r1, \[r2, #0\]! + 0+020 <[^>]*> e4121000 ldr r1, \[r2\], #-0 + 0+024 <[^>]*> e4121000 ldr r1, \[r2\], #-0 + 0+028 <[^>]*> e4921000 ldr r1, \[r2\], #0 + 0+02c <[^>]*> e4921000 ldr r1, \[r2\], #0 + 0+030 <[^>]*> e5b21000 ldr r1, \[r2, #0\]! + 0+034 <[^>]*> e5921000 ldr r1, \[r2\] + 0+038 <[^>]*> e4f21000 ldrbt r1, \[r2\], #0 + 0+03c <[^>]*> e4721000 ldrbt r1, \[r2\], #-0 + 0+040 <[^>]*> e4f21000 ldrbt r1, \[r2\], #0 + 0+044 <[^>]*> 5d565300 ldclpl 3, cr5, \[r6, #-0\] + 0+048 <[^>]*> 5dd65300 ldclpl 3, cr5, \[r6\] + 0+04c <[^>]*> e5021000 str r1, \[r2, #-0\] + 0+050 <[^>]*> e5021000 str r1, \[r2, #-0\] + 0+054 <[^>]*> e5821000 str r1, \[r2\] + 0+058 <[^>]*> e5821000 str r1, \[r2\] + 0+05c <[^>]*> e5221000 str r1, \[r2, #-0\]! + 0+060 <[^>]*> e5221000 str r1, \[r2, #-0\]! + 0+064 <[^>]*> e5a21000 str r1, \[r2, #0\]! + 0+068 <[^>]*> e5a21000 str r1, \[r2, #0\]! + 0+06c <[^>]*> e4021000 str r1, \[r2\], #-0 + 0+070 <[^>]*> e4021000 str r1, \[r2\], #-0 + 0+074 <[^>]*> e4821000 str r1, \[r2\], #0 + 0+078 <[^>]*> e4821000 str r1, \[r2\], #0 + 0+07c <[^>]*> e5a21000 str r1, \[r2, #0\]! + 0+080 <[^>]*> e5821000 str r1, \[r2\] + 0+084 <[^>]*> e4e21000 strbt r1, \[r2\], #0 + 0+088 <[^>]*> e4621000 strbt r1, \[r2\], #-0 + 0+08c <[^>]*> e4e21000 strbt r1, \[r2\], #0 + 0+090 <[^>]*> 5d465300 stclpl 3, cr5, \[r6, #-0\] + 0+094 <[^>]*> 5dc65300 stclpl 3, cr5, \[r6\] + 0+098 <[^>]*> e59f0004 ldr r0, \[pc, #4\] ; .* + 0+09c <[^>]*> e59f0000 ldr r0, \[pc\] ; .* + 0+0a0 <[^>]*> e51f0004 ldr r0, \[pc, #-4\] ; .* + 0+0a4 <[^>]*> 00000000 .word 0x00000000 Index: gas/testsuite/gas/arm/ldst-offset0.s =================================================================== RCS file: gas/testsuite/gas/arm/ldst-offset0.s diff -N gas/testsuite/gas/arm/ldst-offset0.s *** /dev/null 1 Jan 1970 00:00:00 -0000 --- gas/testsuite/gas/arm/ldst-offset0.s 23 May 2011 13:56:06 -0000 *************** *** 0 **** --- 1,66 ---- + @ Test file for ARM load/store instructions with 0 offset + + .text + .syntax unified + ldr r1, [r2, #-0] + ldr r1, [r2, #-1+1] + + ldr r1, [r2, #1-1] + ldr r1, [r2, #0] + + ldr r1, [r2, #-0]! + ldr r1, [r2, #-1+1]! + + ldr r1, [r2, #1-1]! + ldr r1, [r2, #0]! + + ldr r1, [r2], #-0 + ldr r1, [r2], #-1+1 + + ldr r1, [r2], #1-1 + ldr r1, [r2], #0 + + ldr r1, [r2]! + ldr r1, [r2] + + ldrbt r1, [r2], #0 + ldrbt r1, [r2], #-0 + + ldrbt r1, [r2] + + ldclpl p3, c5, [r6, #-0] + ldclpl p3, c5, [r6, #0] + + str r1, [r2, #-0] + str r1, [r2, #-1+1] + + str r1, [r2, #1-1] + str r1, [r2, #0] + + str r1, [r2, #-0]! + str r1, [r2, #-1+1]! + + str r1, [r2, #1-1]! + str r1, [r2, #0]! + + str r1, [r2], #-0 + str r1, [r2], #-1+1 + + str r1, [r2], #1-1 + str r1, [r2], #0 + + str r1, [r2]! + str r1, [r2] + + strbt r1, [r2], #0 + strbt r1, [r2], #-0 + + strbt r1, [r2] + + stclpl p3, c5, [r6, #-0] + stclpl p3, c5, [r6, #0] + + ldr r0,1f + ldr r0,1f + ldr r0,1f + 1: .word 0 Index: gas/testsuite/gas/arm/offset-1.d =================================================================== RCS file: gas/testsuite/gas/arm/offset-1.d diff -N gas/testsuite/gas/arm/offset-1.d *** /dev/null 1 Jan 1970 00:00:00 -0000 --- gas/testsuite/gas/arm/offset-1.d 23 May 2011 13:56:06 -0000 *************** *** 0 **** --- 1,23 ---- + # name: MINUS ZERO OFFSET + # as: + # objdump: -dr --prefix-addresses --show-raw-insn + + .*: +file format .*arm.* + + Disassembly of section .text: + 0+00 <[^>]+> e51f0000 ? ldr r0, \[pc, #-0\] ; 0+8 <[^>]+> + 0+04 <[^>]+> e59f0000 ? ldr r0, \[pc\] ; 0+c <[^>]+> + 0+08 <[^>]+> e5110000 ? ldr r0, \[r1, #-0\] + 0+0c <[^>]+> e5910000 ? ldr r0, \[r1\] + 0+10 <[^>]+> e4110000 ? ldr r0, \[r1\], #-0 + 0+14 <[^>]+> e4910000 ? ldr r0, \[r1\], #0 + 0+18 <[^>]+> e15f00b0 ? ldrh r0, \[pc, #-0\] ; 0+20 <[^>]+> + 0+1c <[^>]+> e1df00b0 ? ldrh r0, \[pc\] ; 0+24 <[^>]+> + 0+20 <[^>]+> e15100b0 ? ldrh r0, \[r1, #-0\] + 0+24 <[^>]+> e1d100b0 ? ldrh r0, \[r1\] + 0+28 <[^>]+> e05100b0 ? ldrh r0, \[r1\], #-0 + 0+2c <[^>]+> e0d100b0 ? ldrh r0, \[r1\], #0 + 0+30 <[^>]+> e5310000 ? ldr r0, \[r1, #-0\]! + 0+34 <[^>]+> e5b10000 ? ldr r0, \[r1, #0\]! + 0+38 <[^>]+> e17100b0 ? ldrh r0, \[r1, #-0\]! + 0+3c <[^>]+> e1f100b0 ? ldrh r0, \[r1, #0\]! Index: gas/testsuite/gas/arm/offset-1.s =================================================================== RCS file: gas/testsuite/gas/arm/offset-1.s diff -N gas/testsuite/gas/arm/offset-1.s *** /dev/null 1 Jan 1970 00:00:00 -0000 --- gas/testsuite/gas/arm/offset-1.s 23 May 2011 13:56:06 -0000 *************** *** 0 **** --- 1,16 ---- + ldr r0, [pc, #-0] + ldr r0, [pc, #0] + ldr r0, [r1, #-0] + ldr r0, [r1, #0] + ldr r0, [r1], #-0 + ldr r0, [r1], #0 + ldrh r0, [pc, #-0] + ldrh r0, [pc, #0] + ldrh r0, [r1, #-0] + ldrh r0, [r1, #0] + ldrh r0, [r1], #-0 + ldrh r0, [r1], #0 + ldr r0, [r1, #-0]! + ldr r0, [r1, #0]! + ldrh r0, [r1, #-0]! + ldrh r0, [r1, #0]! Index: ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d,v retrieving revision 1.1 diff -c -3 -p -r1.1 cortex-a8-fix-bcc-plt.d *** ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d 6 May 2011 10:21:32 -0000 1.1 --- ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section \.plt: *** 14,20 **** 8016: 46c0 nop ; \(mov r8, r8\) 8018: e28fc600 add ip, pc, #0 801c: e28cca01 add ip, ip, #4096 ; 0x1000 ! 8020: e5bcf000 ldr pc, \[ip\]! Disassembly of section \.text: --- 14,20 ---- 8016: 46c0 nop ; \(mov r8, r8\) 8018: e28fc600 add ip, pc, #0 801c: e28cca01 add ip, ip, #4096 ; 0x1000 ! 8020: e5bcf000 ldr pc, \[ip, #0\]! Disassembly of section \.text: Index: ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d,v retrieving revision 1.4 diff -c -3 -p -r1.4 farcall-arm-arm-pic-veneer.d *** ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d 24 Feb 2009 22:43:10 -0000 1.4 --- ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 7,13 **** 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_veneer>: ! 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_veneer\+0x8> 100c: e08ff00c add pc, pc, ip 1010: 0200000c .word 0x0200000c 1014: 00000000 .word 0x00000000 --- 7,13 ---- 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_veneer>: ! 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_veneer\+0x8> 100c: e08ff00c add pc, pc, ip 1010: 0200000c .word 0x0200000c 1014: 00000000 .word 0x00000000 Index: ld/testsuite/ld-arm/farcall-arm-thumb.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-arm-thumb.d,v retrieving revision 1.3 diff -c -3 -p -r1.3 farcall-arm-thumb.d *** ld/testsuite/ld-arm/farcall-arm-thumb.d 24 Feb 2009 22:43:10 -0000 1.3 --- ld/testsuite/ld-arm/farcall-arm-thumb.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 7,13 **** 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02001015 .word 0x02001015 1014: 00000000 .word 0x00000000 --- 7,13 ---- 1004: 00000000 andeq r0, r0, r0 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02001015 .word 0x02001015 1014: 00000000 .word 0x00000000 Index: ld/testsuite/ld-arm/farcall-group-size2.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-group-size2.d,v retrieving revision 1.6 diff -c -3 -p -r1.6 farcall-group-size2.d *** ld/testsuite/ld-arm/farcall-group-size2.d 14 Mar 2011 16:04:14 -0000 1.6 --- ld/testsuite/ld-arm/farcall-group-size2.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 8,14 **** 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 --- 8,14 ---- 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 *************** Disassembly of section .text: *** 24,35 **** 102c: 00000000 andeq r0, r0, r0 00001030 <__bar5_from_arm>: ! 1030: e59fc000 ldr ip, \[pc, #0\] ; 1038 <__bar5_from_arm\+0x8> 1034: e12fff1c bx ip 1038: 0200302f .word 0x0200302f 0000103c <__bar4_from_arm>: ! 103c: e59fc000 ldr ip, \[pc, #0\] ; 1044 <__bar4_from_arm\+0x8> 1040: e12fff1c bx ip 1044: 0200302d .word 0x0200302d --- 24,35 ---- 102c: 00000000 andeq r0, r0, r0 00001030 <__bar5_from_arm>: ! 1030: e59fc000 ldr ip, \[pc\] ; 1038 <__bar5_from_arm\+0x8> 1034: e12fff1c bx ip 1038: 0200302f .word 0x0200302f 0000103c <__bar4_from_arm>: ! 103c: e59fc000 ldr ip, \[pc\] ; 1044 <__bar4_from_arm\+0x8> 1040: e12fff1c bx ip 1044: 0200302d .word 0x0200302d Index: ld/testsuite/ld-arm/farcall-group.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-group.d,v retrieving revision 1.6 diff -c -3 -p -r1.6 farcall-group.d *** ld/testsuite/ld-arm/farcall-group.d 14 Mar 2011 16:04:14 -0000 1.6 --- ld/testsuite/ld-arm/farcall-group.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 14,25 **** 1014: 00000000 andeq r0, r0, r0 00001018 <__bar5_from_arm>: ! 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar5_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 0200302f .word 0x0200302f 00001024 <__bar4_from_arm>: ! 1024: e59fc000 ldr ip, \[pc, #0\] ; 102c <__bar4_from_arm\+0x8> 1028: e12fff1c bx ip 102c: 0200302d .word 0x0200302d --- 14,25 ---- 1014: 00000000 andeq r0, r0, r0 00001018 <__bar5_from_arm>: ! 1018: e59fc000 ldr ip, \[pc\] ; 1020 <__bar5_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 0200302f .word 0x0200302f 00001024 <__bar4_from_arm>: ! 1024: e59fc000 ldr ip, \[pc\] ; 102c <__bar4_from_arm\+0x8> 1028: e12fff1c bx ip 102c: 0200302d .word 0x0200302d *************** Disassembly of section .text: *** 28,34 **** 1034: 02003028 .word 0x02003028 00001038 <__bar_from_arm>: ! 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 02003021 .word 0x02003021 --- 28,34 ---- 1034: 02003028 .word 0x02003028 00001038 <__bar_from_arm>: ! 1038: e59fc000 ldr ip, \[pc\] ; 1040 <__bar_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 02003021 .word 0x02003021 Index: ld/testsuite/ld-arm/farcall-mix.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mix.d,v retrieving revision 1.5 diff -c -3 -p -r1.5 farcall-mix.d *** ld/testsuite/ld-arm/farcall-mix.d 2 Mar 2010 08:19:54 -0000 1.5 --- ld/testsuite/ld-arm/farcall-mix.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 12,29 **** 1014: 00000000 andeq r0, r0, r0 00001018 <__bar_from_arm>: ! 1018: e59fc000 ldr ip, \[pc, #0\] ; 1020 <__bar_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 02002021 .word 0x02002021 00001024 <__bar3_veneer>: 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar3_veneer\+0x4> 1028: 02002028 .word 0x02002028 0000102c <__bar5_from_arm>: ! 102c: e59fc000 ldr ip, \[pc, #0\] ; 1034 <__bar5_from_arm\+0x8> 1030: e12fff1c bx ip 1034: 0200202f .word 0x0200202f 00001038 <__bar4_from_arm>: ! 1038: e59fc000 ldr ip, \[pc, #0\] ; 1040 <__bar4_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 0200202d .word 0x0200202d --- 12,29 ---- 1014: 00000000 andeq r0, r0, r0 00001018 <__bar_from_arm>: ! 1018: e59fc000 ldr ip, \[pc\] ; 1020 <__bar_from_arm\+0x8> 101c: e12fff1c bx ip 1020: 02002021 .word 0x02002021 00001024 <__bar3_veneer>: 1024: e51ff004 ldr pc, \[pc, #-4\] ; 1028 <__bar3_veneer\+0x4> 1028: 02002028 .word 0x02002028 0000102c <__bar5_from_arm>: ! 102c: e59fc000 ldr ip, \[pc\] ; 1034 <__bar5_from_arm\+0x8> 1030: e12fff1c bx ip 1034: 0200202f .word 0x0200202f 00001038 <__bar4_from_arm>: ! 1038: e59fc000 ldr ip, \[pc\] ; 1040 <__bar4_from_arm\+0x8> 103c: e12fff1c bx ip 1040: 0200202d .word 0x0200202d Index: ld/testsuite/ld-arm/farcall-mix2.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mix2.d,v retrieving revision 1.5 diff -c -3 -p -r1.5 farcall-mix2.d *** ld/testsuite/ld-arm/farcall-mix2.d 2 Mar 2010 08:19:54 -0000 1.5 --- ld/testsuite/ld-arm/farcall-mix2.d 23 May 2011 13:56:09 -0000 *************** Disassembly of section .text: *** 8,14 **** 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc, #0\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 00001014 <__bar2_veneer>: --- 8,14 ---- 1004: eb000002 bl 1014 <__bar2_veneer> 00001008 <__bar_from_arm>: ! 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> 100c: e12fff1c bx ip 1010: 02003021 .word 0x02003021 00001014 <__bar2_veneer>: *************** Disassembly of section .mytext: *** 28,39 **** 2014: 02003028 .word 0x02003028 00002018 <__bar4_from_arm>: ! 2018: e59fc000 ldr ip, \[pc, #0\] ; 2020 <__bar4_from_arm\+0x8> 201c: e12fff1c bx ip 2020: 0200302d .word 0x0200302d 00002024 <__bar5_from_arm>: ! 2024: e59fc000 ldr ip, \[pc, #0\] ; 202c <__bar5_from_arm\+0x8> 2028: e12fff1c bx ip 202c: 0200302f .word 0x0200302f ... --- 28,39 ---- 2014: 02003028 .word 0x02003028 00002018 <__bar4_from_arm>: ! 2018: e59fc000 ldr ip, \[pc\] ; 2020 <__bar4_from_arm\+0x8> 201c: e12fff1c bx ip 2020: 0200302d .word 0x0200302d 00002024 <__bar5_from_arm>: ! 2024: e59fc000 ldr ip, \[pc\] ; 202c <__bar5_from_arm\+0x8> 2028: e12fff1c bx ip 202c: 0200302f .word 0x0200302f ... Index: ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d,v retrieving revision 1.2 diff -c -3 -p -r1.2 farcall-mixed-lib-v4t.d *** ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d 14 Mar 2011 16:04:14 -0000 1.2 --- ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d 23 May 2011 13:56:10 -0000 *************** Disassembly of section .text: *** 62,89 **** .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 100033c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff68 .word 0xfeffff68 .* <__lib_func4_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 100034c <__lib_func4_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff88 .word 0xfeffff88 .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 100035c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 .* <__lib_func3_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 100036c <__lib_func3_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 ... --- 62,89 ---- .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 100033c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff68 .word 0xfeffff68 .* <__lib_func4_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 100034c <__lib_func4_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff88 .word 0xfeffff88 .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 100035c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 .* <__lib_func3_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 100036c <__lib_func3_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: feffff58 .word 0xfeffff58 ... *************** Disassembly of section .text: *** 99,112 **** .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 200038c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff28 .word 0xfdffff28 .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc, #0\] ; 200039c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff08 .word 0xfdffff08 --- 99,112 ---- .* <__app_func_weak_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 200038c <__app_func_weak_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff28 .word 0xfdffff28 .* <__app_func_from_thumb>: .*: 4778 bx pc .*: 46c0 nop ; \(mov r8, r8\) ! .*: e59fc000 ldr ip, \[pc\] ; 200039c <__app_func_from_thumb\+0xc> .*: e08cf00f add pc, ip, pc .*: fdffff08 .word 0xfdffff08 Index: ld/testsuite/ld-arm/farcall-mixed-lib.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-mixed-lib.d,v retrieving revision 1.10 diff -c -3 -p -r1.10 farcall-mixed-lib.d *** ld/testsuite/ld-arm/farcall-mixed-lib.d 14 Mar 2011 16:04:14 -0000 1.10 --- ld/testsuite/ld-arm/farcall-mixed-lib.d 23 May 2011 13:56:10 -0000 *************** Disassembly of section .text: *** 52,73 **** .*: 46c0 nop ; \(mov r8, r8\) .* <__lib_func3_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 1000328 <__lib_func3_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff90 .word 0xfeffff90 .* <__app_func_weak_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 1000334 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff78 .word 0xfeffff78 .* <__lib_func4_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 1000340 <__lib_func4_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff84 .word 0xfeffff84 .* <__app_func_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 100034c <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff54 .word 0xfeffff54 ... --- 52,73 ---- .*: 46c0 nop ; \(mov r8, r8\) .* <__lib_func3_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 1000328 <__lib_func3_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff90 .word 0xfeffff90 .* <__app_func_weak_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 1000334 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff78 .word 0xfeffff78 .* <__lib_func4_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 1000340 <__lib_func4_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff84 .word 0xfeffff84 .* <__app_func_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 100034c <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: feffff54 .word 0xfeffff54 ... *************** Disassembly of section .text: *** 81,92 **** .*: 46c0 nop ; \(mov r8, r8\) .* <__app_func_weak_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 2000378 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff34 .word 0xfdffff34 .* <__app_func_from_thumb>: ! .*: e59fc000 ldr ip, \[pc, #0\] ; 2000384 <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff1c .word 0xfdffff1c ... --- 81,92 ---- .*: 46c0 nop ; \(mov r8, r8\) .* <__app_func_weak_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 2000378 <__app_func_weak_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff34 .word 0xfdffff34 .* <__app_func_from_thumb>: ! .*: e59fc000 ldr ip, \[pc\] ; 2000384 <__app_func_from_thumb\+0x8> .*: e08ff00c add pc, pc, ip .*: fdffff1c .word 0xfdffff1c ... Index: ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d,v retrieving revision 1.6 diff -c -3 -p -r1.6 farcall-thumb-arm-blx-pic-veneer.d *** ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d 2 Mar 2010 08:19:54 -0000 1.6 --- ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d 23 May 2011 13:56:10 -0000 *************** Disassembly of section .text: *** 8,14 **** 1f01014: f0ff effe blx 2001014 01f01018 <__bar_from_thumb>: ! 1f01018: e59fc000 ldr ip, \[pc, #0\] ; 1f01020 <__bar_from_thumb\+0x8> 1f0101c: e08ff00c add pc, pc, ip 1f01020: 000ffff0 .word 0x000ffff0 1f01024: 00000000 .word 0x00000000 --- 8,14 ---- 1f01014: f0ff effe blx 2001014 01f01018 <__bar_from_thumb>: ! 1f01018: e59fc000 ldr ip, \[pc\] ; 1f01020 <__bar_from_thumb\+0x8> 1f0101c: e08ff00c add pc, pc, ip 1f01020: 000ffff0 .word 0x000ffff0 1f01024: 00000000 .word 0x00000000 Index: ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d,v retrieving revision 1.5 diff -c -3 -p -r1.5 farcall-thumb-arm-pic-veneer.d *** ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d 2 Mar 2010 08:19:54 -0000 1.5 --- ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d 23 May 2011 13:56:10 -0000 *************** Disassembly of section .text: *** 10,16 **** 01f01018 <__bar_from_thumb>: 1f01018: 4778 bx pc 1f0101a: 46c0 nop ; \(mov r8, r8\) ! 1f0101c: e59fc000 ldr ip, \[pc, #0\] ; 1f01024 <__bar_from_thumb\+0xc> 1f01020: e08cf00f add pc, ip, pc 1f01024: 000fffec .word 0x000fffec --- 10,16 ---- 01f01018 <__bar_from_thumb>: 1f01018: 4778 bx pc 1f0101a: 46c0 nop ; \(mov r8, r8\) ! 1f0101c: e59fc000 ldr ip, \[pc\] ; 1f01024 <__bar_from_thumb\+0xc> 1f01020: e08cf00f add pc, ip, pc 1f01024: 000fffec .word 0x000fffec Index: ld/testsuite/ld-arm/farcall-thumb-thumb.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/farcall-thumb-thumb.d,v retrieving revision 1.6 diff -c -3 -p -r1.6 farcall-thumb-thumb.d *** ld/testsuite/ld-arm/farcall-thumb-thumb.d 7 Jun 2010 10:43:52 -0000 1.6 --- ld/testsuite/ld-arm/farcall-thumb-thumb.d 23 May 2011 13:56:10 -0000 *************** Disassembly of section .text: *** 10,16 **** 00001008 <__bar_veneer>: 1008: 4778 bx pc 100a: 46c0 nop ; \(mov r8, r8\) ! 100c: e59fc000 ldr ip, \[pc, #0\] ; 1014 <__bar_veneer\+0xc> 1010: e12fff1c bx ip 1014: 02001015 .word 0x02001015 Disassembly of section .foo: --- 10,16 ---- 00001008 <__bar_veneer>: 1008: 4778 bx pc 100a: 46c0 nop ; \(mov r8, r8\) ! 100c: e59fc000 ldr ip, \[pc\] ; 1014 <__bar_veneer\+0xc> 1010: e12fff1c bx ip 1014: 02001015 .word 0x02001015 Disassembly of section .foo: Index: ld/testsuite/ld-arm/ifunc-10.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-10.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-10.dd *** ld/testsuite/ld-arm/ifunc-10.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-10.dd 23 May 2011 13:56:10 -0000 *************** Disassembly of section \.text: *** 268,275 **** a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 ! a034: e59f4000 ldr r4, \[pc, #0\] ; a03c <_start\+0x14> ! a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 268,275 ---- a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 ! a034: e59f4000 ldr r4, \[pc\] ; a03c <_start\+0x14> ! a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 290,297 **** #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 ! a050: e59f4000 ldr r4, \[pc, #0\] ; a058 <_start\+0x30> ! a054: e59f4000 ldr r4, \[pc, #0\] ; a05c <_start\+0x34> #------------------------------------------------------------------------------ #------ .got offset for aaf1's .iplt entry #------------------------------------------------------------------------------ --- 290,297 ---- #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 ! a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x30> ! a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x34> #------------------------------------------------------------------------------ #------ .got offset for aaf1's .iplt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 312,319 **** #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 ! a06c: e59f4000 ldr r4, \[pc, #0\] ; a074 <_start\+0x4c> ! a070: e59f4000 ldr r4, \[pc, #0\] ; a078 <_start\+0x50> #------------------------------------------------------------------------------ #------ .got offset for taf1's .iplt entry #------------------------------------------------------------------------------ --- 312,319 ---- #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 ! a06c: e59f4000 ldr r4, \[pc\] ; a074 <_start\+0x4c> ! a070: e59f4000 ldr r4, \[pc\] ; a078 <_start\+0x50> #------------------------------------------------------------------------------ #------ .got offset for taf1's .iplt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 334,341 **** #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 ! a088: e59f4000 ldr r4, \[pc, #0\] ; a090 <_start\+0x68> ! a08c: e59f4000 ldr r4, \[pc, #0\] ; a094 <_start\+0x6c> #------------------------------------------------------------------------------ #------ .got offset for abf1's .iplt entry #------------------------------------------------------------------------------ --- 334,341 ---- #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 ! a088: e59f4000 ldr r4, \[pc\] ; a090 <_start\+0x68> ! a08c: e59f4000 ldr r4, \[pc\] ; a094 <_start\+0x6c> #------------------------------------------------------------------------------ #------ .got offset for abf1's .iplt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 356,363 **** #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 ! a0a4: e59f4000 ldr r4, \[pc, #0\] ; a0ac <_start\+0x84> ! a0a8: e59f4000 ldr r4, \[pc, #0\] ; a0b0 <_start\+0x88> #------------------------------------------------------------------------------ #------ .got offset for tbf1's .iplt entry #------------------------------------------------------------------------------ --- 356,363 ---- #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 ! a0a4: e59f4000 ldr r4, \[pc\] ; a0ac <_start\+0x84> ! a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 <_start\+0x88> #------------------------------------------------------------------------------ #------ .got offset for tbf1's .iplt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 378,385 **** #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c ! a0c0: e59f4000 ldr r4, \[pc, #0\] ; a0c8 <_start\+0xa0> ! a0c4: e59f4000 ldr r4, \[pc, #0\] ; a0cc <_start\+0xa4> #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ --- 378,385 ---- #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c ! a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 <_start\+0xa0> ! a0c4: e59f4000 ldr r4, \[pc\] ; a0cc <_start\+0xa4> #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 400,407 **** #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 ! a0dc: e59f4000 ldr r4, \[pc, #0\] ; a0e4 <_start\+0xbc> ! a0e0: e59f4000 ldr r4, \[pc, #0\] ; a0e8 <_start\+0xc0> #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ --- 400,407 ---- #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 ! a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 <_start\+0xbc> ! a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 <_start\+0xc0> #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 422,429 **** #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 ! a0f8: e59f4000 ldr r4, \[pc, #0\] ; a100 <_start\+0xd8> ! a0fc: e59f4000 ldr r4, \[pc, #0\] ; a104 <_start\+0xdc> #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ --- 422,429 ---- #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 ! a0f8: e59f4000 ldr r4, \[pc\] ; a100 <_start\+0xd8> ! a0fc: e59f4000 ldr r4, \[pc\] ; a104 <_start\+0xdc> #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 444,451 **** #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 ! a114: e59f4000 ldr r4, \[pc, #0\] ; a11c <_start\+0xf4> ! a118: e59f4000 ldr r4, \[pc, #0\] ; a120 <_start\+0xf8> #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ --- 444,451 ---- #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 ! a114: e59f4000 ldr r4, \[pc\] ; a11c <_start\+0xf4> ! a118: e59f4000 ldr r4, \[pc\] ; a120 <_start\+0xf8> #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 457,464 **** a124: ebfffc0f bl 9168 a128: eafffc0e b 9168 a12c: 0afffc0d beq 9168 ! a130: e59f4000 ldr r4, \[pc, #0\] ; a138 <_start\+0x110> ! a134: e59f4000 ldr r4, \[pc, #0\] ; a13c <_start\+0x114> #------------------------------------------------------------------------------ #------ .got offset for aaf3 #------------------------------------------------------------------------------ --- 457,464 ---- a124: ebfffc0f bl 9168 a128: eafffc0e b 9168 a12c: 0afffc0d beq 9168 ! a130: e59f4000 ldr r4, \[pc\] ; a138 <_start\+0x110> ! a134: e59f4000 ldr r4, \[pc\] ; a13c <_start\+0x114> #------------------------------------------------------------------------------ #------ .got offset for aaf3 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 470,477 **** a140: ebfffc05 bl 915c a144: eafffc04 b 915c a148: 0afffc03 beq 915c ! a14c: e59f4000 ldr r4, \[pc, #0\] ; a154 <_start\+0x12c> ! a150: e59f4000 ldr r4, \[pc, #0\] ; a158 <_start\+0x130> #------------------------------------------------------------------------------ #------ .got offset for taf3 #------------------------------------------------------------------------------ --- 470,477 ---- a140: ebfffc05 bl 915c a144: eafffc04 b 915c a148: 0afffc03 beq 915c ! a14c: e59f4000 ldr r4, \[pc\] ; a154 <_start\+0x12c> ! a150: e59f4000 ldr r4, \[pc\] ; a158 <_start\+0x130> #------------------------------------------------------------------------------ #------ .got offset for taf3 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 483,490 **** a15c: ebfffbf3 bl 9130 a160: eafffbf2 b 9130 a164: 0afffbf1 beq 9130 ! a168: e59f4000 ldr r4, \[pc, #0\] ; a170 <_start\+0x148> ! a16c: e59f4000 ldr r4, \[pc, #0\] ; a174 <_start\+0x14c> #------------------------------------------------------------------------------ #------ .got offset for abf3 #------------------------------------------------------------------------------ --- 483,490 ---- a15c: ebfffbf3 bl 9130 a160: eafffbf2 b 9130 a164: 0afffbf1 beq 9130 ! a168: e59f4000 ldr r4, \[pc\] ; a170 <_start\+0x148> ! a16c: e59f4000 ldr r4, \[pc\] ; a174 <_start\+0x14c> #------------------------------------------------------------------------------ #------ .got offset for abf3 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 496,503 **** a178: ebfffbf4 bl 9150 a17c: eafffbf3 b 9150 a180: 0afffbf2 beq 9150 ! a184: e59f4000 ldr r4, \[pc, #0\] ; a18c <_start\+0x164> ! a188: e59f4000 ldr r4, \[pc, #0\] ; a190 <_start\+0x168> #------------------------------------------------------------------------------ #------ .got offset for tbf3 #------------------------------------------------------------------------------ --- 496,503 ---- a178: ebfffbf4 bl 9150 a17c: eafffbf3 b 9150 a180: 0afffbf2 beq 9150 ! a184: e59f4000 ldr r4, \[pc\] ; a18c <_start\+0x164> ! a188: e59f4000 ldr r4, \[pc\] ; a190 <_start\+0x168> #------------------------------------------------------------------------------ #------ .got offset for tbf3 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 518,525 **** #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 ! a1a0: e59f4000 ldr r4, \[pc, #0\] ; a1a8 <_start\+0x180> ! a1a4: e59f4000 ldr r4, \[pc, #0\] ; a1ac <_start\+0x184> #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ --- 518,525 ---- #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 ! a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 <_start\+0x180> ! a1a4: e59f4000 ldr r4, \[pc\] ; a1ac <_start\+0x184> #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 540,547 **** #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 ! a1bc: e59f4000 ldr r4, \[pc, #0\] ; a1c4 <_start\+0x19c> ! a1c0: e59f4000 ldr r4, \[pc, #0\] ; a1c8 <_start\+0x1a0> #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ --- 540,547 ---- #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 ! a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 <_start\+0x19c> ! a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 <_start\+0x1a0> #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 562,569 **** #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c ! a1d8: e59f4000 ldr r4, \[pc, #0\] ; a1e0 <_start\+0x1b8> ! a1dc: e59f4000 ldr r4, \[pc, #0\] ; a1e4 <_start\+0x1bc> #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ --- 562,569 ---- #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c ! a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 <_start\+0x1b8> ! a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 <_start\+0x1bc> #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 584,591 **** #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c ! a1f4: e59f4000 ldr r4, \[pc, #0\] ; a1fc <_start\+0x1d4> ! a1f8: e59f4000 ldr r4, \[pc, #0\] ; a200 <_start\+0x1d8> #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ --- 584,591 ---- #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c ! a1f4: e59f4000 ldr r4, \[pc\] ; a1fc <_start\+0x1d4> ! a1f8: e59f4000 ldr r4, \[pc\] ; a200 <_start\+0x1d8> #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-3.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-3.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-3.dd *** ld/testsuite/ld-arm/ifunc-3.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-3.dd 23 May 2011 13:56:10 -0000 *************** Disassembly of section \.text: *** 58,65 **** 0000a010 : a010: eb0017fa bl 10000 ! a014: e59f4000 ldr r4, \[pc, #0\] ; a01c ! a018: e59f4000 ldr r4, \[pc, #0\] ; a020 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 58,65 ---- 0000a010 : a010: eb0017fa bl 10000 ! a014: e59f4000 ldr r4, \[pc\] ; a01c ! a018: e59f4000 ldr r4, \[pc\] ; a020 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 72,79 **** #------ f1's .iplt entry #------------------------------------------------------------------------------ a024: ebfffbfd bl 9020 ! a028: e59f4000 ldr r4, \[pc, #0\] ; a030 ! a02c: e59f4000 ldr r4, \[pc, #0\] ; a034 #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ --- 72,79 ---- #------ f1's .iplt entry #------------------------------------------------------------------------------ a024: ebfffbfd bl 9020 ! a028: e59f4000 ldr r4, \[pc\] ; a030 ! a02c: e59f4000 ldr r4, \[pc\] ; a034 #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 86,93 **** #------ f2's .plt entry #------------------------------------------------------------------------------ a038: ebfffbf5 bl 9014 ! a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 ! a040: e59f4000 ldr r4, \[pc, #0\] ; a048 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ --- 86,93 ---- #------ f2's .plt entry #------------------------------------------------------------------------------ a038: ebfffbf5 bl 9014 ! a03c: e59f4000 ldr r4, \[pc\] ; a044 ! a040: e59f4000 ldr r4, \[pc\] ; a048 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 100,107 **** #------ f3's .iplt entry #------------------------------------------------------------------------------ a04c: ebfffbf6 bl 902c ! a050: e59f4000 ldr r4, \[pc, #0\] ; a058 ! a054: e59f4000 ldr r4, \[pc, #0\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ --- 100,107 ---- #------ f3's .iplt entry #------------------------------------------------------------------------------ a04c: ebfffbf6 bl 902c ! a050: e59f4000 ldr r4, \[pc\] ; a058 ! a054: e59f4000 ldr r4, \[pc\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 114,121 **** #------ f4's .iplt entry #------------------------------------------------------------------------------ a060: ebfffbf4 bl 9038 ! a064: e59f4000 ldr r4, \[pc, #0\] ; a06c ! a068: e59f4000 ldr r4, \[pc, #0\] ; a070 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ --- 114,121 ---- #------ f4's .iplt entry #------------------------------------------------------------------------------ a060: ebfffbf4 bl 9038 ! a064: e59f4000 ldr r4, \[pc\] ; a06c ! a068: e59f4000 ldr r4, \[pc\] ; a070 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-4.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-4.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-4.dd *** ld/testsuite/ld-arm/ifunc-4.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-4.dd 23 May 2011 13:56:11 -0000 *************** Disassembly of section \.text: *** 324,331 **** a050: eb0017ea bl 10000 a054: ea0017e9 b 10000 a058: 0a0017e8 beq 10000 ! a05c: e59f4000 ldr r4, \[pc, #0\] ; a064 ! a060: e59f4000 ldr r4, \[pc, #0\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 324,331 ---- a050: eb0017ea bl 10000 a054: ea0017e9 b 10000 a058: 0a0017e8 beq 10000 ! a05c: e59f4000 ldr r4, \[pc\] ; a064 ! a060: e59f4000 ldr r4, \[pc\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 346,353 **** #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a074: 0afffbfc beq 906c ! a078: e59f4000 ldr r4, \[pc, #0\] ; a080 ! a07c: e59f4000 ldr r4, \[pc, #0\] ; a084 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ --- 346,353 ---- #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a074: 0afffbfc beq 906c ! a078: e59f4000 ldr r4, \[pc\] ; a080 ! a07c: e59f4000 ldr r4, \[pc\] ; a084 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 368,375 **** #------ taf1's .iplt entry #------------------------------------------------------------------------------ a090: 0afffc00 beq 9098 ! a094: e59f4000 ldr r4, \[pc, #0\] ; a09c ! a098: e59f4000 ldr r4, \[pc, #0\] ; a0a0 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ --- 368,375 ---- #------ taf1's .iplt entry #------------------------------------------------------------------------------ a090: 0afffc00 beq 9098 ! a094: e59f4000 ldr r4, \[pc\] ; a09c ! a098: e59f4000 ldr r4, \[pc\] ; a0a0 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 390,397 **** #------ abf1's .iplt entry #------------------------------------------------------------------------------ a0ac: 0afffbf6 beq 908c ! a0b0: e59f4000 ldr r4, \[pc, #0\] ; a0b8 ! a0b4: e59f4000 ldr r4, \[pc, #0\] ; a0bc #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ --- 390,397 ---- #------ abf1's .iplt entry #------------------------------------------------------------------------------ a0ac: 0afffbf6 beq 908c ! a0b0: e59f4000 ldr r4, \[pc\] ; a0b8 ! a0b4: e59f4000 ldr r4, \[pc\] ; a0bc #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 412,419 **** #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0c8: 0afffbfa beq 90b8 ! a0cc: e59f4000 ldr r4, \[pc, #0\] ; a0d4 ! a0d0: e59f4000 ldr r4, \[pc, #0\] ; a0d8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ --- 412,419 ---- #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0c8: 0afffbfa beq 90b8 ! a0cc: e59f4000 ldr r4, \[pc\] ; a0d4 ! a0d0: e59f4000 ldr r4, \[pc\] ; a0d8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 434,441 **** #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0e4: 0afffbd9 beq 9050 ! a0e8: e59f4000 ldr r4, \[pc, #0\] ; a0f0 ! a0ec: e59f4000 ldr r4, \[pc, #0\] ; a0f4 #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ --- 434,441 ---- #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0e4: 0afffbd9 beq 9050 ! a0e8: e59f4000 ldr r4, \[pc\] ; a0f0 ! a0ec: e59f4000 ldr r4, \[pc\] ; a0f4 #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 456,463 **** #------ taf2's .plt entry #------------------------------------------------------------------------------ a100: 0afffbcf beq 9044 ! a104: e59f4000 ldr r4, \[pc, #0\] ; a10c ! a108: e59f4000 ldr r4, \[pc, #0\] ; a110 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ --- 456,463 ---- #------ taf2's .plt entry #------------------------------------------------------------------------------ a100: 0afffbcf beq 9044 ! a104: e59f4000 ldr r4, \[pc\] ; a10c ! a108: e59f4000 ldr r4, \[pc\] ; a110 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 478,485 **** #------ abf2's .plt entry #------------------------------------------------------------------------------ a11c: 0afffbcf beq 9060 ! a120: e59f4000 ldr r4, \[pc, #0\] ; a128 ! a124: e59f4000 ldr r4, \[pc, #0\] ; a12c #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ --- 478,485 ---- #------ abf2's .plt entry #------------------------------------------------------------------------------ a11c: 0afffbcf beq 9060 ! a120: e59f4000 ldr r4, \[pc\] ; a128 ! a124: e59f4000 ldr r4, \[pc\] ; a12c #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 500,507 **** #------ tbf2's .plt entry #------------------------------------------------------------------------------ a138: 0afffbbe beq 9038 ! a13c: e59f4000 ldr r4, \[pc, #0\] ; a144 ! a140: e59f4000 ldr r4, \[pc, #0\] ; a148 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ --- 500,507 ---- #------ tbf2's .plt entry #------------------------------------------------------------------------------ a138: 0afffbbe beq 9038 ! a13c: e59f4000 ldr r4, \[pc\] ; a144 ! a140: e59f4000 ldr r4, \[pc\] ; a148 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 522,529 **** #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a154: 0afffbfc beq 914c ! a158: e59f4000 ldr r4, \[pc, #0\] ; a160 ! a15c: e59f4000 ldr r4, \[pc, #0\] ; a164 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ --- 522,529 ---- #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a154: 0afffbfc beq 914c ! a158: e59f4000 ldr r4, \[pc\] ; a160 ! a15c: e59f4000 ldr r4, \[pc\] ; a164 #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 544,551 **** #------ taf3's .iplt entry #------------------------------------------------------------------------------ a170: 0afffbe6 beq 9110 ! a174: e59f4000 ldr r4, \[pc, #0\] ; a17c ! a178: e59f4000 ldr r4, \[pc, #0\] ; a180 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ --- 544,551 ---- #------ taf3's .iplt entry #------------------------------------------------------------------------------ a170: 0afffbe6 beq 9110 ! a174: e59f4000 ldr r4, \[pc\] ; a17c ! a178: e59f4000 ldr r4, \[pc\] ; a180 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 566,573 **** #------ abf3's .iplt entry #------------------------------------------------------------------------------ a18c: 0afffbd4 beq 90e4 ! a190: e59f4000 ldr r4, \[pc, #0\] ; a198 ! a194: e59f4000 ldr r4, \[pc, #0\] ; a19c #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ --- 566,573 ---- #------ abf3's .iplt entry #------------------------------------------------------------------------------ a18c: 0afffbd4 beq 90e4 ! a190: e59f4000 ldr r4, \[pc\] ; a198 ! a194: e59f4000 ldr r4, \[pc\] ; a19c #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 588,595 **** #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a1a8: 0afffbd5 beq 9104 ! a1ac: e59f4000 ldr r4, \[pc, #0\] ; a1b4 ! a1b0: e59f4000 ldr r4, \[pc, #0\] ; a1b8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ --- 588,595 ---- #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a1a8: 0afffbd5 beq 9104 ! a1ac: e59f4000 ldr r4, \[pc\] ; a1b4 ! a1b0: e59f4000 ldr r4, \[pc\] ; a1b8 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 610,617 **** #------ aaf4's .iplt entry #------------------------------------------------------------------------------ a1c4: 0afffbbe beq 90c4 ! a1c8: e59f4000 ldr r4, \[pc, #0\] ; a1d0 ! a1cc: e59f4000 ldr r4, \[pc, #0\] ; a1d4 #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ --- 610,617 ---- #------ aaf4's .iplt entry #------------------------------------------------------------------------------ a1c4: 0afffbbe beq 90c4 ! a1c8: e59f4000 ldr r4, \[pc\] ; a1d0 ! a1cc: e59f4000 ldr r4, \[pc\] ; a1d4 #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 632,639 **** #------ taf4's .iplt entry #------------------------------------------------------------------------------ a1e0: 0afffbe0 beq 9168 ! a1e4: e59f4000 ldr r4, \[pc, #0\] ; a1ec ! a1e8: e59f4000 ldr r4, \[pc, #0\] ; a1f0 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ --- 632,639 ---- #------ taf4's .iplt entry #------------------------------------------------------------------------------ a1e0: 0afffbe0 beq 9168 ! a1e4: e59f4000 ldr r4, \[pc\] ; a1ec ! a1e8: e59f4000 ldr r4, \[pc\] ; a1f0 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 654,661 **** #------ abf4's .iplt entry #------------------------------------------------------------------------------ a1fc: 0afffbc7 beq 9120 ! a200: e59f4000 ldr r4, \[pc, #0\] ; a208 ! a204: e59f4000 ldr r4, \[pc, #0\] ; a20c #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ --- 654,661 ---- #------ abf4's .iplt entry #------------------------------------------------------------------------------ a1fc: 0afffbc7 beq 9120 ! a200: e59f4000 ldr r4, \[pc\] ; a208 ! a204: e59f4000 ldr r4, \[pc\] ; a20c #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 676,683 **** #------ tbf4's .iplt entry #------------------------------------------------------------------------------ a218: 0afffbc4 beq 9130 ! a21c: e59f4000 ldr r4, \[pc, #0\] ; a224 ! a220: e59f4000 ldr r4, \[pc, #0\] ; a228 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ --- 676,683 ---- #------ tbf4's .iplt entry #------------------------------------------------------------------------------ a218: 0afffbc4 beq 9130 ! a21c: e59f4000 ldr r4, \[pc\] ; a224 ! a220: e59f4000 ldr r4, \[pc\] ; a228 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-5.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-5.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-5.dd *** ld/testsuite/ld-arm/ifunc-5.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-5.dd 23 May 2011 13:56:11 -0000 *************** Disassembly of section \.text: *** 37,44 **** 0000a00c <_start>: a00c: eb0017fb bl 10000 ! a010: e59f4000 ldr r4, \[pc, #0\] ; a018 <_start\+0xc> ! a014: e59f4000 ldr r4, \[pc, #0\] ; a01c <_start\+0x10> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 37,44 ---- 0000a00c <_start>: a00c: eb0017fb bl 10000 ! a010: e59f4000 ldr r4, \[pc\] ; a018 <_start\+0xc> ! a014: e59f4000 ldr r4, \[pc\] ; a01c <_start\+0x10> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 51,58 **** #------ f1's .iplt entry #------------------------------------------------------------------------------ a020: ebfffbf6 bl 9000 <__irel_end\+0xfe8> ! a024: e59f4000 ldr r4, \[pc, #0\] ; a02c <_start\+0x20> ! a028: e59f4000 ldr r4, \[pc, #0\] ; a030 <_start\+0x24> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ --- 51,58 ---- #------ f1's .iplt entry #------------------------------------------------------------------------------ a020: ebfffbf6 bl 9000 <__irel_end\+0xfe8> ! a024: e59f4000 ldr r4, \[pc\] ; a02c <_start\+0x20> ! a028: e59f4000 ldr r4, \[pc\] ; a030 <_start\+0x24> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 65,72 **** #------ f2's .iplt entry #------------------------------------------------------------------------------ a034: ebfffbf7 bl 9018 <__irel_end\+0x1000> ! a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x34> ! a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 <_start\+0x38> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ --- 65,72 ---- #------ f2's .iplt entry #------------------------------------------------------------------------------ a034: ebfffbf7 bl 9018 <__irel_end\+0x1000> ! a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x34> ! a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x38> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 79,86 **** #------ f3's .iplt entry #------------------------------------------------------------------------------ a048: ebfffbef bl 900c <__irel_end\+0xff4> ! a04c: e59f4000 ldr r4, \[pc, #0\] ; a054 <_start\+0x48> ! a050: e59f4000 ldr r4, \[pc, #0\] ; a058 <_start\+0x4c> #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ --- 79,86 ---- #------ f3's .iplt entry #------------------------------------------------------------------------------ a048: ebfffbef bl 900c <__irel_end\+0xff4> ! a04c: e59f4000 ldr r4, \[pc\] ; a054 <_start\+0x48> ! a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x4c> #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-6.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-6.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-6.dd *** ld/testsuite/ld-arm/ifunc-6.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-6.dd 23 May 2011 13:56:11 -0000 *************** Disassembly of section \.iplt: *** 15,21 **** #------------------------------------------------------------------------------ 9004: e28fc600 add ip, pc, #0 9008: e28cca08 add ip, ip, #32768 ; 0x8000 ! 900c: e5bcf000 ldr pc, \[ip\]! #------------------------------------------------------------------------------ #------ f2's .iplt entry #------------------------------------------------------------------------------ --- 15,21 ---- #------------------------------------------------------------------------------ 9004: e28fc600 add ip, pc, #0 9008: e28cca08 add ip, ip, #32768 ; 0x8000 ! 900c: e5bcf000 ldr pc, \[ip, #0\]! #------------------------------------------------------------------------------ #------ f2's .iplt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 60,67 **** a010: eb0017fa bl 10000 a014: ea0017f9 b 10000 a018: 0a0017f8 beq 10000 ! a01c: e59f4000 ldr r4, \[pc, #0\] ; a024 <_start\+0x14> ! a020: e59f4000 ldr r4, \[pc, #0\] ; a028 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 60,67 ---- a010: eb0017fa bl 10000 a014: ea0017f9 b 10000 a018: 0a0017f8 beq 10000 ! a01c: e59f4000 ldr r4, \[pc\] ; a024 <_start\+0x14> ! a020: e59f4000 ldr r4, \[pc\] ; a028 <_start\+0x18> #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 82,89 **** #------ f1's .iplt entry #------------------------------------------------------------------------------ a034: 0afffbfc beq 902c <__irel_end\+0x100c> ! a038: e59f4000 ldr r4, \[pc, #0\] ; a040 <_start\+0x30> ! a03c: e59f4000 ldr r4, \[pc, #0\] ; a044 <_start\+0x34> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ --- 82,89 ---- #------ f1's .iplt entry #------------------------------------------------------------------------------ a034: 0afffbfc beq 902c <__irel_end\+0x100c> ! a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x30> ! a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x34> #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 104,111 **** #------ f2's .iplt entry #------------------------------------------------------------------------------ a050: 0afffbee beq 9010 <__irel_end\+0xff0> ! a054: e59f4000 ldr r4, \[pc, #0\] ; a05c <_start\+0x4c> ! a058: e59f4000 ldr r4, \[pc, #0\] ; a060 <_start\+0x50> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ --- 104,111 ---- #------ f2's .iplt entry #------------------------------------------------------------------------------ a050: 0afffbee beq 9010 <__irel_end\+0xff0> ! a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x4c> ! a058: e59f4000 ldr r4, \[pc\] ; a060 <_start\+0x50> #------------------------------------------------------------------------------ #------ GP-relative offset of f2's .igot.plt entry #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-7.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-7.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-7.dd *** ld/testsuite/ld-arm/ifunc-7.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-7.dd 23 May 2011 13:56:11 -0000 *************** Disassembly of section \.text: *** 52,59 **** 0000a008 : a008: eb0017fc bl 10000 ! a00c: e59f4000 ldr r4, \[pc, #0\] ; a014 ! a010: e59f4000 ldr r4, \[pc, #0\] ; a018 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 52,59 ---- 0000a008 : a008: eb0017fc bl 10000 ! a00c: e59f4000 ldr r4, \[pc\] ; a014 ! a010: e59f4000 ldr r4, \[pc\] ; a018 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 66,73 **** #------ f1's .iplt entry #------------------------------------------------------------------------------ a01c: ebfffc02 bl 902c ! a020: e59f4000 ldr r4, \[pc, #0\] ; a028 ! a024: e59f4000 ldr r4, \[pc, #0\] ; a02c #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ --- 66,73 ---- #------ f1's .iplt entry #------------------------------------------------------------------------------ a01c: ebfffc02 bl 902c ! a020: e59f4000 ldr r4, \[pc\] ; a028 ! a024: e59f4000 ldr r4, \[pc\] ; a02c #------------------------------------------------------------------------------ #------ GP-relative offset of f1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 80,87 **** #------ f2's .plt entry #------------------------------------------------------------------------------ a030: ebfffbf7 bl 9014 ! a034: e59f4000 ldr r4, \[pc, #0\] ; a03c ! a038: e59f4000 ldr r4, \[pc, #0\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ --- 80,87 ---- #------ f2's .plt entry #------------------------------------------------------------------------------ a030: ebfffbf7 bl 9014 ! a034: e59f4000 ldr r4, \[pc\] ; a03c ! a038: e59f4000 ldr r4, \[pc\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for f2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 94,101 **** #------ f3's .iplt entry #------------------------------------------------------------------------------ a044: ebfffbfb bl 9038 ! a048: e59f4000 ldr r4, \[pc, #0\] ; a050 ! a04c: e59f4000 ldr r4, \[pc, #0\] ; a054 #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ --- 94,101 ---- #------ f3's .iplt entry #------------------------------------------------------------------------------ a044: ebfffbfb bl 9038 ! a048: e59f4000 ldr r4, \[pc\] ; a050 ! a04c: e59f4000 ldr r4, \[pc\] ; a054 #------------------------------------------------------------------------------ #------ GP-relative offset of f3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 108,115 **** #------ f4's .plt entry #------------------------------------------------------------------------------ a058: ebfffbf0 bl 9020 ! a05c: e59f4000 ldr r4, \[pc, #0\] ; a064 ! a060: e59f4000 ldr r4, \[pc, #0\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ --- 108,115 ---- #------ f4's .plt entry #------------------------------------------------------------------------------ a058: ebfffbf0 bl 9020 ! a05c: e59f4000 ldr r4, \[pc\] ; a064 ! a060: e59f4000 ldr r4, \[pc\] ; a068 #------------------------------------------------------------------------------ #------ .got offset for f4 #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/ifunc-8.dd =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/ifunc-8.dd,v retrieving revision 1.1 diff -c -3 -p -r1.1 ifunc-8.dd *** ld/testsuite/ld-arm/ifunc-8.dd 14 Mar 2011 16:04:14 -0000 1.1 --- ld/testsuite/ld-arm/ifunc-8.dd 23 May 2011 13:56:12 -0000 *************** Disassembly of section \.text: *** 286,293 **** a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 ! a034: e59f4000 ldr r4, \[pc, #0\] ; a03c ! a038: e59f4000 ldr r4, \[pc, #0\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ --- 286,293 ---- a028: eb0017f4 bl 10000 a02c: ea0017f3 b 10000 a030: 0a0017f2 beq 10000 ! a034: e59f4000 ldr r4, \[pc\] ; a03c ! a038: e59f4000 ldr r4, \[pc\] ; a040 #------------------------------------------------------------------------------ #------ .got offset for foo #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 308,315 **** #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 ! a050: e59f4000 ldr r4, \[pc, #0\] ; a058 ! a054: e59f4000 ldr r4, \[pc, #0\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ --- 308,315 ---- #------ aaf1's .iplt entry #------------------------------------------------------------------------------ a04c: 0afffc1c beq 90c4 ! a050: e59f4000 ldr r4, \[pc\] ; a058 ! a054: e59f4000 ldr r4, \[pc\] ; a05c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 330,337 **** #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 ! a06c: e59f4000 ldr r4, \[pc, #0\] ; a074 ! a070: e59f4000 ldr r4, \[pc, #0\] ; a078 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ --- 330,337 ---- #------ taf1's .iplt entry #------------------------------------------------------------------------------ a068: 0afffc20 beq 90f0 ! a06c: e59f4000 ldr r4, \[pc\] ; a074 ! a070: e59f4000 ldr r4, \[pc\] ; a078 #------------------------------------------------------------------------------ #------ GP-relative offset of taf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 352,359 **** #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 ! a088: e59f4000 ldr r4, \[pc, #0\] ; a090 ! a08c: e59f4000 ldr r4, \[pc, #0\] ; a094 #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ --- 352,359 ---- #------ abf1's .iplt entry #------------------------------------------------------------------------------ a084: 0afffc16 beq 90e4 ! a088: e59f4000 ldr r4, \[pc\] ; a090 ! a08c: e59f4000 ldr r4, \[pc\] ; a094 #------------------------------------------------------------------------------ #------ GP-relative offset of abf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 374,381 **** #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 ! a0a4: e59f4000 ldr r4, \[pc, #0\] ; a0ac ! a0a8: e59f4000 ldr r4, \[pc, #0\] ; a0b0 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ --- 374,381 ---- #------ tbf1's .iplt entry #------------------------------------------------------------------------------ a0a0: 0afffc1a beq 9110 ! a0a4: e59f4000 ldr r4, \[pc\] ; a0ac ! a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf1's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 396,403 **** #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c ! a0c0: e59f4000 ldr r4, \[pc, #0\] ; a0c8 ! a0c4: e59f4000 ldr r4, \[pc, #0\] ; a0cc #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ --- 396,403 ---- #------ aaf2's .plt entry #------------------------------------------------------------------------------ a0bc: 0afffbe6 beq 905c ! a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 ! a0c4: e59f4000 ldr r4, \[pc\] ; a0cc #------------------------------------------------------------------------------ #------ .got offset for aaf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 418,425 **** #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 ! a0dc: e59f4000 ldr r4, \[pc, #0\] ; a0e4 ! a0e0: e59f4000 ldr r4, \[pc, #0\] ; a0e8 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ --- 418,425 ---- #------ taf2's .plt entry #------------------------------------------------------------------------------ a0d8: 0afffbdc beq 9050 ! a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 ! a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 #------------------------------------------------------------------------------ #------ .got offset for taf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 440,447 **** #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 ! a0f8: e59f4000 ldr r4, \[pc, #0\] ; a100 ! a0fc: e59f4000 ldr r4, \[pc, #0\] ; a104 #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ --- 440,447 ---- #------ abf2's .plt entry #------------------------------------------------------------------------------ a0f4: 0afffbef beq 90b8 ! a0f8: e59f4000 ldr r4, \[pc\] ; a100 ! a0fc: e59f4000 ldr r4, \[pc\] ; a104 #------------------------------------------------------------------------------ #------ .got offset for abf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 462,469 **** #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 ! a114: e59f4000 ldr r4, \[pc, #0\] ; a11c ! a118: e59f4000 ldr r4, \[pc, #0\] ; a120 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ --- 462,469 ---- #------ tbf2's .plt entry #------------------------------------------------------------------------------ a110: 0afffbcb beq 9044 ! a114: e59f4000 ldr r4, \[pc\] ; a11c ! a118: e59f4000 ldr r4, \[pc\] ; a120 #------------------------------------------------------------------------------ #------ .got offset for tbf2 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 484,491 **** #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a12c: 0afffc0d beq 9168 ! a130: e59f4000 ldr r4, \[pc, #0\] ; a138 ! a134: e59f4000 ldr r4, \[pc, #0\] ; a13c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ --- 484,491 ---- #------ aaf3's .iplt entry #------------------------------------------------------------------------------ a12c: 0afffc0d beq 9168 ! a130: e59f4000 ldr r4, \[pc\] ; a138 ! a134: e59f4000 ldr r4, \[pc\] ; a13c #------------------------------------------------------------------------------ #------ GP-relative offset of aaf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 506,513 **** #------ taf3's .iplt entry #------------------------------------------------------------------------------ a148: 0afffc03 beq 915c ! a14c: e59f4000 ldr r4, \[pc, #0\] ; a154 ! a150: e59f4000 ldr r4, \[pc, #0\] ; a158 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ --- 506,513 ---- #------ taf3's .iplt entry #------------------------------------------------------------------------------ a148: 0afffc03 beq 915c ! a14c: e59f4000 ldr r4, \[pc\] ; a154 ! a150: e59f4000 ldr r4, \[pc\] ; a158 #------------------------------------------------------------------------------ #------ GP-relative offset of taf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 528,535 **** #------ abf3's .iplt entry #------------------------------------------------------------------------------ a164: 0afffbf1 beq 9130 ! a168: e59f4000 ldr r4, \[pc, #0\] ; a170 ! a16c: e59f4000 ldr r4, \[pc, #0\] ; a174 #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ --- 528,535 ---- #------ abf3's .iplt entry #------------------------------------------------------------------------------ a164: 0afffbf1 beq 9130 ! a168: e59f4000 ldr r4, \[pc\] ; a170 ! a16c: e59f4000 ldr r4, \[pc\] ; a174 #------------------------------------------------------------------------------ #------ GP-relative offset of abf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 550,557 **** #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a180: 0afffbf2 beq 9150 ! a184: e59f4000 ldr r4, \[pc, #0\] ; a18c ! a188: e59f4000 ldr r4, \[pc, #0\] ; a190 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ --- 550,557 ---- #------ tbf3's .iplt entry #------------------------------------------------------------------------------ a180: 0afffbf2 beq 9150 ! a184: e59f4000 ldr r4, \[pc\] ; a18c ! a188: e59f4000 ldr r4, \[pc\] ; a190 #------------------------------------------------------------------------------ #------ GP-relative offset of tbf3's .igot.plt entry #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 572,579 **** #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 ! a1a0: e59f4000 ldr r4, \[pc, #0\] ; a1a8 ! a1a4: e59f4000 ldr r4, \[pc, #0\] ; a1ac #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ --- 572,579 ---- #------ aaf4's .plt entry #------------------------------------------------------------------------------ a19c: 0afffba0 beq 9024 ! a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 ! a1a4: e59f4000 ldr r4, \[pc\] ; a1ac #------------------------------------------------------------------------------ #------ .got offset for aaf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 594,601 **** #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 ! a1bc: e59f4000 ldr r4, \[pc, #0\] ; a1c4 ! a1c0: e59f4000 ldr r4, \[pc, #0\] ; a1c8 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ --- 594,601 ---- #------ taf4's .plt entry #------------------------------------------------------------------------------ a1b8: 0afffbba beq 90a8 ! a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 ! a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 #------------------------------------------------------------------------------ #------ .got offset for taf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 616,623 **** #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c ! a1d8: e59f4000 ldr r4, \[pc, #0\] ; a1e0 ! a1dc: e59f4000 ldr r4, \[pc, #0\] ; a1e4 #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ --- 616,623 ---- #------ abf4's .plt entry #------------------------------------------------------------------------------ a1d4: 0afffba4 beq 906c ! a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 ! a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 #------------------------------------------------------------------------------ #------ .got offset for abf4 #------------------------------------------------------------------------------ *************** Disassembly of section \.text: *** 638,645 **** #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c ! a1f4: e59f4000 ldr r4, \[pc, #0\] ; a1fc ! a1f8: e59f4000 ldr r4, \[pc, #0\] ; a200 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ --- 638,645 ---- #------ tbf4's .plt entry #------------------------------------------------------------------------------ a1f0: 0afffba1 beq 907c ! a1f4: e59f4000 ldr r4, \[pc\] ; a1fc ! a1f8: e59f4000 ldr r4, \[pc\] ; a200 #------------------------------------------------------------------------------ #------ .got offset for tbf4 #------------------------------------------------------------------------------ Index: ld/testsuite/ld-arm/jump-reloc-veneers-long.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/jump-reloc-veneers-long.d,v retrieving revision 1.2 diff -c -3 -p -r1.2 jump-reloc-veneers-long.d *** ld/testsuite/ld-arm/jump-reloc-veneers-long.d 16 Feb 2010 19:02:59 -0000 1.2 --- ld/testsuite/ld-arm/jump-reloc-veneers-long.d 23 May 2011 13:56:12 -0000 *************** Disassembly of section .text: *** 16,21 **** 000080.. <[^>]*>: 80..: 4778 bx pc 80..: 46c0 nop ; \(mov r8, r8\) ! 80..: e59fc000 ldr ip, \[pc, #0\] ; 80.. <__dest_veneer\+0xc> 80..: e12fff1c bx ip 80..: 09000001 .word 0x09000001 --- 16,21 ---- 000080.. <[^>]*>: 80..: 4778 bx pc 80..: 46c0 nop ; \(mov r8, r8\) ! 80..: e59fc000 ldr ip, \[pc\] ; 80.. <__dest_veneer\+0xc> 80..: e12fff1c bx ip 80..: 09000001 .word 0x09000001 Index: ld/testsuite/ld-arm/tls-longplt-lib.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/tls-longplt-lib.d,v retrieving revision 1.1 diff -c -3 -p -r1.1 tls-longplt-lib.d *** ld/testsuite/ld-arm/tls-longplt-lib.d 10 Jan 2011 08:40:19 -0000 1.1 --- ld/testsuite/ld-arm/tls-longplt-lib.d 23 May 2011 13:56:12 -0000 *************** Disassembly of section .foo: *** 53,59 **** 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: ! 4001030: e59f1000 ldr r1, \[pc, #0\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc007170 .word 0xfc007170 400103c: 00000000 .word 0x00000000 --- 53,59 ---- 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: ! 4001030: e59f1000 ldr r1, \[pc\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc007170 .word 0xfc007170 400103c: 00000000 .word 0x00000000 Index: ld/testsuite/ld-arm/tls-thumb1.d =================================================================== RCS file: /cvs/src/src/ld/testsuite/ld-arm/tls-thumb1.d,v retrieving revision 1.1 diff -c -3 -p -r1.1 tls-thumb1.d *** ld/testsuite/ld-arm/tls-thumb1.d 10 Jan 2011 08:40:19 -0000 1.1 --- ld/testsuite/ld-arm/tls-thumb1.d 23 May 2011 13:56:12 -0000 *************** Disassembly of section .text: *** 39,45 **** 000081c8 <__unnamed_veneer>: 81c8: 4778 bx pc 81ca: 46c0 nop ; .* ! 81cc: e59f1000 ldr r1, \[pc, #0\] ; .* 81d0: e081f00f add pc, r1, pc 81d4: ffffffa0 .word 0xffffffa0 --- 39,45 ---- 000081c8 <__unnamed_veneer>: 81c8: 4778 bx pc 81ca: 46c0 nop ; .* ! 81cc: e59f1000 ldr r1, \[pc\] ; .* 81d0: e081f00f add pc, r1, pc 81d4: ffffffa0 .word 0xffffffa0 *************** Disassembly of section .foo: *** 61,74 **** 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: ! 4001030: e59f1000 ldr r1, \[pc, #0\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc00713c .word 0xfc00713c 0400103c <__unnamed_veneer>: 400103c: 4778 bx pc 400103e: 46c0 nop ; .* ! 4001040: e59f1000 ldr r1, \[pc, #0\] ; .* 4001044: e081f00f add pc, r1, pc 4001048: fc00712c .word 0xfc00712c 400104c: 00000000 .word 0x00000000 --- 61,74 ---- 400102c: 00000000 .word 0x00000000 04001030 <__unnamed_veneer>: ! 4001030: e59f1000 ldr r1, \[pc\] ; .* 4001034: e08ff001 add pc, pc, r1 4001038: fc00713c .word 0xfc00713c 0400103c <__unnamed_veneer>: 400103c: 4778 bx pc 400103e: 46c0 nop ; .* ! 4001040: e59f1000 ldr r1, \[pc\] ; .* 4001044: e081f00f add pc, r1, pc 4001048: fc00712c .word 0xfc00712c 400104c: 00000000 .word 0x00000000 Index: opcodes/arm-dis.c =================================================================== RCS file: /cvs/src/src/opcodes/arm-dis.c,v retrieving revision 1.143 diff -c -3 -p -r1.143 arm-dis.c *** opcodes/arm-dis.c 19 Apr 2011 07:44:12 -0000 1.143 --- opcodes/arm-dis.c 23 May 2011 13:56:15 -0000 *************** print_insn_coprocessor (bfd_vma pc, *** 1893,1898 **** --- 1893,1900 ---- func (stream, ", #%d]%s", offset, WRITEBACK_BIT_SET ? "!" : ""); + else if (NEGATIVE_BIT_SET) + func (stream, ", #-0]"); else func (stream, "]"); } *************** print_insn_coprocessor (bfd_vma pc, *** 1904,1913 **** { if (offset) func (stream, ", #%d", offset); } else { ! func (stream, ", {%d}", offset); value_in_comment = offset; } } --- 1906,1919 ---- { if (offset) func (stream, ", #%d", offset); + else if (NEGATIVE_BIT_SET) + func (stream, ", #-0"); } else { ! func (stream, ", {%s%d}", ! (NEGATIVE_BIT_SET && !offset) ? "-" : "", ! offset); value_in_comment = offset; } } *************** print_arm_address (bfd_vma pc, struct di *** 2338,2350 **** func (stream, "[pc"); - if (NEGATIVE_BIT_SET) - offset = - offset; - if (PRE_BIT_SET) { ! /* Pre-indexed. */ ! func (stream, ", #%d]", offset); offset += pc + 8; --- 2344,2358 ---- func (stream, "[pc"); if (PRE_BIT_SET) { ! /* Pre-indexed. Elide offset of positive zero when ! non-writeback. */ ! if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset) ! func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); ! ! if (NEGATIVE_BIT_SET) ! offset = -offset; offset += pc + 8; *************** print_arm_address (bfd_vma pc, struct di *** 2352,2363 **** being used. Probably a very dangerous thing for the programmer to do, but who are we to argue ? */ ! if (WRITEBACK_BIT_SET) ! func (stream, "!"); } else /* Post indexed. */ { ! func (stream, "], #%d", offset); /* Ie ignore the offset. */ offset = pc + 8; --- 2360,2370 ---- being used. Probably a very dangerous thing for the programmer to do, but who are we to argue ? */ ! func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : ""); } else /* Post indexed. */ { ! func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); /* Ie ignore the offset. */ offset = pc + 8; *************** print_arm_address (bfd_vma pc, struct di *** 2376,2390 **** { if ((given & 0x02000000) == 0) { offset = given & 0xfff; ! if (offset) ! func (stream, ", #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); } else { ! func (stream, ", %s", ! NEGATIVE_BIT_SET ? "-" : ""); arm_decode_shift (given, func, stream, TRUE); } --- 2383,2396 ---- { if ((given & 0x02000000) == 0) { + /* Elide offset of positive zero when non-writeback. */ offset = given & 0xfff; ! if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset) ! func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset); } else { ! func (stream, ", %s", NEGATIVE_BIT_SET ? "-" : ""); arm_decode_shift (given, func, stream, TRUE); } *************** print_arm_address (bfd_vma pc, struct di *** 2395,2406 **** { if ((given & 0x02000000) == 0) { offset = given & 0xfff; ! if (offset) ! func (stream, "], #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); ! else ! func (stream, "]"); } else { --- 2401,2410 ---- { if ((given & 0x02000000) == 0) { + /* Always show offset. */ offset = given & 0xfff; ! func (stream, "], #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); } else { *************** print_insn_arm (bfd_vma pc, struct disas *** 2993,3012 **** /* PC relative with immediate offset. */ int offset = ((given & 0xf00) >> 4) | (given & 0xf); - if (NEGATIVE_BIT_SET) - offset = - offset; - if (PRE_BIT_SET) { ! if (offset) ! func (stream, "[pc, #%d]\t; ", offset); else ! func (stream, "[pc]\t; "); info->print_address_func (offset + pc + 8, info); } else { ! func (stream, "[pc], #%d", offset); if (! allow_unpredictable) is_unpredictable = TRUE; } --- 2997,3019 ---- /* PC relative with immediate offset. */ int offset = ((given & 0xf00) >> 4) | (given & 0xf); if (PRE_BIT_SET) { ! /* Elide positive zero offset. */ ! if (offset || NEGATIVE_BIT_SET) ! func (stream, "[pc, #%s%d]\t; ", ! NEGATIVE_BIT_SET ? "-" : "", offset); else ! func (stream, "[pc]\t; "); ! if (NEGATIVE_BIT_SET) ! offset = -offset; info->print_address_func (offset + pc + 8, info); } else { ! /* Always show the offset. */ ! func (stream, "[pc], #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); if (! allow_unpredictable) is_unpredictable = TRUE; } *************** print_insn_arm (bfd_vma pc, struct disas *** 3015,3023 **** { int offset = ((given & 0xf00) >> 4) | (given & 0xf); - if (NEGATIVE_BIT_SET) - offset = - offset; - func (stream, "[%s", arm_regnames[(given >> 16) & 0xf]); --- 3022,3027 ---- *************** print_insn_arm (bfd_vma pc, struct disas *** 3025,3037 **** { if (IMMEDIATE_BIT_SET) { ! if (WRITEBACK_BIT_SET) ! /* Immediate Pre-indexed. */ ! /* PR 10924: Offset must be printed, even if it is zero. */ ! func (stream, ", #%d", offset); ! else if (offset) ! /* Immediate Offset: printing zero offset is optional. */ ! func (stream, ", #%d", offset); value_in_comment = offset; } --- 3029,3043 ---- { if (IMMEDIATE_BIT_SET) { ! /* Elide offset for non-writeback ! positive zero. */ ! if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET ! || offset) ! func (stream, ", #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); ! ! if (NEGATIVE_BIT_SET) ! offset = -offset; value_in_comment = offset; } *************** print_insn_arm (bfd_vma pc, struct disas *** 3059,3065 **** { /* Immediate Post-indexed. */ /* PR 10924: Offset must be printed, even if it is zero. */ ! func (stream, "], #%d", offset); value_in_comment = offset; } else --- 3065,3074 ---- { /* Immediate Post-indexed. */ /* PR 10924: Offset must be printed, even if it is zero. */ ! func (stream, "], #%s%d", ! NEGATIVE_BIT_SET ? "-" : "", offset); ! if (NEGATIVE_BIT_SET) ! offset = -offset; value_in_comment = offset; } else --------------090701080404070708010603--