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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80dcd64sm197158566b.177.2024.10.11.03.03.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Oct 2024 03:03:42 -0700 (PDT) Message-ID: <51eb32d1-5cfb-4ddb-8545-9350099ffbcb@suse.com> Date: Fri, 11 Oct 2024 12:03:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V5] x86: Add tls check in gas To: "Cui, Lili" Cc: "binutils@sourceware.org" , "hjl.tools@gmail.com" References: <20240919063816.3138221-1-lili.cui@intel.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3029.2 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 11.10.2024 11:28, Cui, Lili wrote: >> On 19.09.2024 08:38, Cui, Lili wrote: >>> + case BFD_RELOC_386_TLS_GOTIE: >>> + /* Check GOTIE access model: >>> + >>> + subl foo@gotntpoff(%reg1), %reg2 >>> + movl foo@gotntpoff(%reg1), %reg2 >>> + addl foo@gotntpoff(%reg1), %reg2 >>> + >>> + Memory operand: SIB is not supported. >>> + */ >>> + case BFD_RELOC_386_TLS_IE_32: >>> + /* Check IE_32 access model: >>> + >>> + subl foo@gottpoff(%reg1), %reg2 >>> + movl foo@gottpoff(%reg1), %reg2 >>> + addl foo@gottpoff(%reg1), %reg2 >>> + >>> + Memory operand: SIB is not supported. >>> + */ >>> + if (i.tm.mnem_off != MN_sub >>> + && i.tm.mnem_off != MN_add >>> + && i.tm.mnem_off != MN_mov) >>> + return x86_tls_error_insn; >>> + if (i.op[1].regs->reg_type.bitfield.class != Reg >>> + || i.op[0].regs->reg_type.bitfield.class >>> + || i.imm_operands) >> >> You may not de-reference i.op[0].regs for the intended forms at all. If anything, >> i.op[0].disps may be de-referenced there. >> >> You may also not de-reference i.op[1].regs until you've checked that operand 1 >> actually is a register. There are insn forms after all where operand 1 is a memory >> one. >> >> Which member of the union is valid to de-reference can only be told by >> inspecting i.types[] and/or i.tm.operand_types[] (when insns are more >> constrained than mov/add/sub are, going from just >> i.{reg,imm,mem,disp}_operands may also be possible, just to mention it). >> >> I expect you want to check for operand counts first: No immediate one, a single >> disp one, and a single register one. Then check that it's the destination that's the >> register one. There may then not be any need to access any i.op[].reg >> anymore. >> > > Jan, do you mean to modify it like this? > > diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c > index 25ecaa66104..358d76e7bd2 100644 > --- a/gas/config/tc-i386.c > +++ b/gas/config/tc-i386.c > @@ -6545,9 +6545,10 @@ x86_check_tls_relocation (enum bfd_reloc_code_real r_type) > && i.tm.mnem_off != MN_add > && i.tm.mnem_off != MN_mov) > return x86_tls_error_insn; > - if (i.op[1].regs->reg_type.bitfield.class != Reg > - || i.op[0].regs->reg_type.bitfield.class > - || i.imm_operands) > + if (i.imm_operands > + || i.disp_operands != 1 > + || i.reg_operands != 1 > + || i.types[1].bitfield.class != Reg) > return x86_tls_error_opcode; This goes in the right direction, but still isn't quite enough, I fear. Knowing there's 1 disp and 1 reg operand still doesn't tell you which one is which (both forms exist, after all). Plus because of APX there are also 3-operand forms of SUB and ADD (but of course not MOV). Jan