From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32334 invoked by alias); 8 Oct 2013 15:23:04 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 32324 invoked by uid 89); 8 Oct 2013 15:23:03 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: nat28.tlf.novell.com Received: from nat28.tlf.novell.com (HELO nat28.tlf.novell.com) (130.57.49.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 08 Oct 2013 15:23:03 +0000 Received: from EMEA1-MTA by nat28.tlf.novell.com with Novell_GroupWise; Tue, 08 Oct 2013 16:23:00 +0100 Message-Id: <52543F7202000078000F9B07@nat28.tlf.novell.com> Date: Tue, 08 Oct 2013 15:23:00 -0000 From: "Jan Beulich" To: "H.J. Lu" Cc: ,"Binutils" Subject: Re: [PATCH 3/6] x86/MPX: suppress base/index swapping in Intel mode for bndmk, bndldx, and bndstx References: <5254349502000078000F9A3D@nat28.tlf.novell.com> <525435E002000078000F9A55@nat28.tlf.novell.com> In-Reply-To: Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-SW-Source: 2013-10/txt/msg00080.txt.bz2 >>> On 08.10.13 at 17:16, "H.J. Lu" wrote: > On Tue, Oct 8, 2013 at 7:42 AM, Jan Beulich wrote: >> bndmk, bndldx, and bndstx assign special meaning to base and index >> registers, and hence silently swapping the registers should be >> suppressed. >> >> gas/ >> 2013-10-08 Jan Beulich >> >> * tc-i386.c (i386_intel_simplify_register): Suppress base/index >> swapping for bndmk, bndldx, and bndstx. >> >> --- 2013-10-07/gas/config/tc-i386-intel.c >> +++ 2013-10-07/gas/config/tc-i386-intel.c >> @@ -291,6 +291,8 @@ i386_intel_simplify_register (expression >> else if (!intel_state.index) >> { >> if (intel_state.in_scale >> + || current_templates->start->base_opcode =3D=3D 0xf30f1b /* b= ndmk */ >> + || (current_templates->start->base_opcode & ~1) =3D=3D 0x0f1a= /* bnd{ld,st}x */ >> || i386_regtab[reg_num].reg_type.bitfield.baseindex) >> intel_state.index =3D i386_regtab + reg_num; >> else >> >> >> >=20 > We need a testcase for this. Which is included in patch 1! Jan