* [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
@ 2021-11-12 8:35 Nelson Chu
2021-11-12 8:38 ` Nelson Chu
0 siblings, 1 reply; 13+ messages in thread
From: Nelson Chu @ 2021-11-12 8:35 UTC (permalink / raw)
To: binutils, amodra; +Cc: jimw, nelson.chu
This should be the same problem as the commit,
ba9b3ef5ee666467b67780e81f868c432f4fc56d.
Generally, the elfxx-* file should be compiled both for 32-bit and 64-bit
machine, since xx can be 32 and 64. However, seems like the elfxx-riscv.c
and elf32-riscv.c are missing for BFD32_BACKENDS_CFILES.
This patch try to add the missing linker files for the BFD32_BACKENDS, but
the dst_mask of R_RISCV_CALL may be overflow for the host 32-bit machine.
Therefore, we rewrite the R_RISCV_CALL stuff in the perform_relocation, use
the two 32-bit bfd_vma values to encode it, since the R_RISCV_CALL should be
two instructions, rather than one address.
bfd/
* Makefile.am: Added elfxx-riscv.* and elf32-riscv.* to
BFD32_BACKENDS and BFD32_BACKENDS_CFILES.
* Makefile.in: Regernated.
* elfnn-riscv.c (perform_relocation): Relocate the R_RISCV_CALL and
R_RISCV_CALL_PLT relocs by two bfd_vma values, since they are two
insturctions in fact. So that the rv32 riscv toolchain built on
the host 32-bit machine should work.
* elfxx-riscv.c (howto_table): Let elfnn-riscv.c:perform_relocation
to handle the dst_mask of R_RISCV_CALL and R_RISCV_CALL_PLT specially.
Set dst_mask to MINUS_ONE.
---
bfd/Makefile.am | 4 ++++
bfd/Makefile.in | 4 ++++
bfd/elfnn-riscv.c | 24 +++++++++++++++++++++---
bfd/elfxx-riscv.c | 6 ++----
4 files changed, 31 insertions(+), 7 deletions(-)
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 097177b..1a935d6 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -336,6 +336,8 @@ BFD32_BACKENDS = \
elf32-pj.lo \
elf32-ppc.lo \
elf32-pru.lo \
+ elf32-riscv.lo \
+ elfxx-riscv.lo \
elf32-rl78.lo \
elf32-rx.lo \
elf32-s390.lo \
@@ -469,6 +471,8 @@ BFD32_BACKENDS_CFILES = \
elf32-pj.c \
elf32-ppc.c \
elf32-pru.c \
+ elf32-riscv.c \
+ elfxx-riscv.c \
elf32-rl78.c \
elf32-rx.c \
elf32-s390.c \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index a76b653..3817167 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -762,6 +762,8 @@ BFD32_BACKENDS = \
elf32-pj.lo \
elf32-ppc.lo \
elf32-pru.lo \
+ elf32-riscv.lo \
+ elfxx-riscv.lo \
elf32-rl78.lo \
elf32-rx.lo \
elf32-s390.lo \
@@ -895,6 +897,8 @@ BFD32_BACKENDS_CFILES = \
elf32-pj.c \
elf32-ppc.c \
elf32-pru.c \
+ elf32-riscv.lo \
+ elfxx-riscv.c \
elf32-rl78.c \
elf32-rx.c \
elf32-s390.c \
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 36cbf1e..024dd32 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -1607,6 +1607,9 @@ perform_relocation (const reloc_howto_type *howto,
bfd *input_bfd,
bfd_byte *contents)
{
+ bool handle_call_special = false;
+ bfd_vma value_call_auipc, value_call_jalr;
+
if (howto->pc_relative)
value -= sec_addr (input_section) + rel->r_offset;
value += rel->r_addend;
@@ -1644,8 +1647,9 @@ perform_relocation (const reloc_howto_type *howto,
case R_RISCV_CALL_PLT:
if (ARCH_SIZE > 32 && !VALID_UTYPE_IMM (RISCV_CONST_HIGH_PART (value)))
return bfd_reloc_overflow;
- value = ENCODE_UTYPE_IMM (RISCV_CONST_HIGH_PART (value))
- | (ENCODE_ITYPE_IMM (value) << 32);
+ value_call_auipc = ENCODE_UTYPE_IMM (RISCV_CONST_HIGH_PART (value));
+ value_call_jalr = ENCODE_ITYPE_IMM (value);
+ handle_call_special = true;
break;
case R_RISCV_JAL:
@@ -1717,6 +1721,21 @@ perform_relocation (const reloc_howto_type *howto,
return bfd_reloc_notsupported;
}
+ /* Handle R_RISCV_CALL and R_RISCV_CALL_PLT specially, in case the
+ host machine is 32-bit. */
+ if (handle_call_special)
+ {
+ bfd_vma insn_auipc = riscv_get_insn (32, contents + rel->r_offset);
+ bfd_vma insn_jalr = riscv_get_insn (32, contents + rel->r_offset + 0x4);
+ bfd_vma dst_mask_auipc = ENCODE_UTYPE_IMM (-1U);
+ bfd_vma dst_mask_jalr = ENCODE_ITYPE_IMM (-1U);
+ insn_auipc = (insn_auipc & ~dst_mask_auipc) | (value_call_auipc & dst_mask_auipc);
+ insn_jalr = (insn_jalr & ~dst_mask_jalr) | (value_call_jalr & dst_mask_jalr);
+ riscv_put_insn (32, insn_auipc, contents + rel->r_offset);
+ riscv_put_insn (32, insn_jalr, contents + rel->r_offset + 0x4);
+ return bfd_reloc_ok;
+ }
+
bfd_vma word;
if (riscv_is_insn_reloc (howto))
word = riscv_get_insn (howto->bitsize, contents + rel->r_offset);
@@ -1727,7 +1746,6 @@ perform_relocation (const reloc_howto_type *howto,
riscv_put_insn (howto->bitsize, word, contents + rel->r_offset);
else
bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset);
-
return bfd_reloc_ok;
}
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 3ffbaad..858d29e 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -264,8 +264,7 @@ static reloc_howto_type howto_table[] =
"R_RISCV_CALL", /* name */
false, /* partial_inplace */
0, /* src_mask */
- ENCODE_UTYPE_IMM (-1U) | ((bfd_vma) ENCODE_ITYPE_IMM (-1U) << 32),
- /* dst_mask */
+ MINUS_ONE, /* dst_mask */
true), /* pcrel_offset */
/* Like R_RISCV_CALL, but not locally binding. */
@@ -280,8 +279,7 @@ static reloc_howto_type howto_table[] =
"R_RISCV_CALL_PLT", /* name */
false, /* partial_inplace */
0, /* src_mask */
- ENCODE_UTYPE_IMM (-1U) | ((bfd_vma) ENCODE_ITYPE_IMM (-1U) << 32),
- /* dst_mask */
+ MINUS_ONE, /* dst_mask */
true), /* pcrel_offset */
/* High 20 bits of 32-bit PC-relative GOT access. */
--
2.7.4
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 8:35 [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage Nelson Chu
@ 2021-11-12 8:38 ` Nelson Chu
2021-11-12 9:34 ` Alan Modra
0 siblings, 1 reply; 13+ messages in thread
From: Nelson Chu @ 2021-11-12 8:38 UTC (permalink / raw)
To: Binutils, Alan Modra; +Cc: Jim Wilson
Hi Alan,
I see you have a gcc patch to fix the problem of libopcodes, so should
we still need this patch to fix the --target-all on the 32-bit host
machine?
Thanks
Nelson
On Fri, Nov 12, 2021 at 4:35 PM Nelson Chu <nelson.chu@sifive.com> wrote:
>
> This should be the same problem as the commit,
> ba9b3ef5ee666467b67780e81f868c432f4fc56d.
>
> Generally, the elfxx-* file should be compiled both for 32-bit and 64-bit
> machine, since xx can be 32 and 64. However, seems like the elfxx-riscv.c
> and elf32-riscv.c are missing for BFD32_BACKENDS_CFILES.
>
> This patch try to add the missing linker files for the BFD32_BACKENDS, but
> the dst_mask of R_RISCV_CALL may be overflow for the host 32-bit machine.
> Therefore, we rewrite the R_RISCV_CALL stuff in the perform_relocation, use
> the two 32-bit bfd_vma values to encode it, since the R_RISCV_CALL should be
> two instructions, rather than one address.
>
> bfd/
> * Makefile.am: Added elfxx-riscv.* and elf32-riscv.* to
> BFD32_BACKENDS and BFD32_BACKENDS_CFILES.
> * Makefile.in: Regernated.
> * elfnn-riscv.c (perform_relocation): Relocate the R_RISCV_CALL and
> R_RISCV_CALL_PLT relocs by two bfd_vma values, since they are two
> insturctions in fact. So that the rv32 riscv toolchain built on
> the host 32-bit machine should work.
> * elfxx-riscv.c (howto_table): Let elfnn-riscv.c:perform_relocation
> to handle the dst_mask of R_RISCV_CALL and R_RISCV_CALL_PLT specially.
> Set dst_mask to MINUS_ONE.
> ---
> bfd/Makefile.am | 4 ++++
> bfd/Makefile.in | 4 ++++
> bfd/elfnn-riscv.c | 24 +++++++++++++++++++++---
> bfd/elfxx-riscv.c | 6 ++----
> 4 files changed, 31 insertions(+), 7 deletions(-)
>
> diff --git a/bfd/Makefile.am b/bfd/Makefile.am
> index 097177b..1a935d6 100644
> --- a/bfd/Makefile.am
> +++ b/bfd/Makefile.am
> @@ -336,6 +336,8 @@ BFD32_BACKENDS = \
> elf32-pj.lo \
> elf32-ppc.lo \
> elf32-pru.lo \
> + elf32-riscv.lo \
> + elfxx-riscv.lo \
> elf32-rl78.lo \
> elf32-rx.lo \
> elf32-s390.lo \
> @@ -469,6 +471,8 @@ BFD32_BACKENDS_CFILES = \
> elf32-pj.c \
> elf32-ppc.c \
> elf32-pru.c \
> + elf32-riscv.c \
> + elfxx-riscv.c \
> elf32-rl78.c \
> elf32-rx.c \
> elf32-s390.c \
> diff --git a/bfd/Makefile.in b/bfd/Makefile.in
> index a76b653..3817167 100644
> --- a/bfd/Makefile.in
> +++ b/bfd/Makefile.in
> @@ -762,6 +762,8 @@ BFD32_BACKENDS = \
> elf32-pj.lo \
> elf32-ppc.lo \
> elf32-pru.lo \
> + elf32-riscv.lo \
> + elfxx-riscv.lo \
> elf32-rl78.lo \
> elf32-rx.lo \
> elf32-s390.lo \
> @@ -895,6 +897,8 @@ BFD32_BACKENDS_CFILES = \
> elf32-pj.c \
> elf32-ppc.c \
> elf32-pru.c \
> + elf32-riscv.lo \
> + elfxx-riscv.c \
> elf32-rl78.c \
> elf32-rx.c \
> elf32-s390.c \
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 36cbf1e..024dd32 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -1607,6 +1607,9 @@ perform_relocation (const reloc_howto_type *howto,
> bfd *input_bfd,
> bfd_byte *contents)
> {
> + bool handle_call_special = false;
> + bfd_vma value_call_auipc, value_call_jalr;
> +
> if (howto->pc_relative)
> value -= sec_addr (input_section) + rel->r_offset;
> value += rel->r_addend;
> @@ -1644,8 +1647,9 @@ perform_relocation (const reloc_howto_type *howto,
> case R_RISCV_CALL_PLT:
> if (ARCH_SIZE > 32 && !VALID_UTYPE_IMM (RISCV_CONST_HIGH_PART (value)))
> return bfd_reloc_overflow;
> - value = ENCODE_UTYPE_IMM (RISCV_CONST_HIGH_PART (value))
> - | (ENCODE_ITYPE_IMM (value) << 32);
> + value_call_auipc = ENCODE_UTYPE_IMM (RISCV_CONST_HIGH_PART (value));
> + value_call_jalr = ENCODE_ITYPE_IMM (value);
> + handle_call_special = true;
> break;
>
> case R_RISCV_JAL:
> @@ -1717,6 +1721,21 @@ perform_relocation (const reloc_howto_type *howto,
> return bfd_reloc_notsupported;
> }
>
> + /* Handle R_RISCV_CALL and R_RISCV_CALL_PLT specially, in case the
> + host machine is 32-bit. */
> + if (handle_call_special)
> + {
> + bfd_vma insn_auipc = riscv_get_insn (32, contents + rel->r_offset);
> + bfd_vma insn_jalr = riscv_get_insn (32, contents + rel->r_offset + 0x4);
> + bfd_vma dst_mask_auipc = ENCODE_UTYPE_IMM (-1U);
> + bfd_vma dst_mask_jalr = ENCODE_ITYPE_IMM (-1U);
> + insn_auipc = (insn_auipc & ~dst_mask_auipc) | (value_call_auipc & dst_mask_auipc);
> + insn_jalr = (insn_jalr & ~dst_mask_jalr) | (value_call_jalr & dst_mask_jalr);
> + riscv_put_insn (32, insn_auipc, contents + rel->r_offset);
> + riscv_put_insn (32, insn_jalr, contents + rel->r_offset + 0x4);
> + return bfd_reloc_ok;
> + }
> +
> bfd_vma word;
> if (riscv_is_insn_reloc (howto))
> word = riscv_get_insn (howto->bitsize, contents + rel->r_offset);
> @@ -1727,7 +1746,6 @@ perform_relocation (const reloc_howto_type *howto,
> riscv_put_insn (howto->bitsize, word, contents + rel->r_offset);
> else
> bfd_put (howto->bitsize, input_bfd, word, contents + rel->r_offset);
> -
> return bfd_reloc_ok;
> }
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index 3ffbaad..858d29e 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -264,8 +264,7 @@ static reloc_howto_type howto_table[] =
> "R_RISCV_CALL", /* name */
> false, /* partial_inplace */
> 0, /* src_mask */
> - ENCODE_UTYPE_IMM (-1U) | ((bfd_vma) ENCODE_ITYPE_IMM (-1U) << 32),
> - /* dst_mask */
> + MINUS_ONE, /* dst_mask */
> true), /* pcrel_offset */
>
> /* Like R_RISCV_CALL, but not locally binding. */
> @@ -280,8 +279,7 @@ static reloc_howto_type howto_table[] =
> "R_RISCV_CALL_PLT", /* name */
> false, /* partial_inplace */
> 0, /* src_mask */
> - ENCODE_UTYPE_IMM (-1U) | ((bfd_vma) ENCODE_ITYPE_IMM (-1U) << 32),
> - /* dst_mask */
> + MINUS_ONE, /* dst_mask */
> true), /* pcrel_offset */
>
> /* High 20 bits of 32-bit PC-relative GOT access. */
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 8:38 ` Nelson Chu
@ 2021-11-12 9:34 ` Alan Modra
2021-11-12 9:42 ` Nelson Chu
2021-11-17 13:52 ` Luis Machado
0 siblings, 2 replies; 13+ messages in thread
From: Alan Modra @ 2021-11-12 9:34 UTC (permalink / raw)
To: Nelson Chu; +Cc: Binutils, Jim Wilson
On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> Hi Alan,
>
> I see you have a gcc patch to fix the problem of libopcodes, so should
> we still need this patch to fix the --target-all on the 32-bit host
> machine?
No, the patch I just committed now fixed the build problem.
Whether you want to enable riscv32 support with a 32-bit bfd is really
a separate issue.
--
Alan Modra
Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 9:34 ` Alan Modra
@ 2021-11-12 9:42 ` Nelson Chu
2021-12-01 9:52 ` Luis Machado
2021-12-10 10:40 ` Andrew Burgess
2021-11-17 13:52 ` Luis Machado
1 sibling, 2 replies; 13+ messages in thread
From: Nelson Chu @ 2021-11-12 9:42 UTC (permalink / raw)
To: Alan Modra; +Cc: Binutils, Jim Wilson
On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
>
> On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > Hi Alan,
> >
> > I see you have a gcc patch to fix the problem of libopcodes, so should
> > we still need this patch to fix the --target-all on the 32-bit host
> > machine?
>
> No, the patch I just committed now fixed the build problem.
Thanks for helping to fix this :)
> Whether you want to enable riscv32 support with a 32-bit bfd is really
> a separate issue.
OK, I will figure this out, thanks.
Nelson
> --
> Alan Modra
> Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 9:34 ` Alan Modra
2021-11-12 9:42 ` Nelson Chu
@ 2021-11-17 13:52 ` Luis Machado
2021-11-18 1:02 ` Alan Modra
1 sibling, 1 reply; 13+ messages in thread
From: Luis Machado @ 2021-11-17 13:52 UTC (permalink / raw)
To: Alan Modra, Nelson Chu; +Cc: Binutils, Jim Wilson
Hi Alan,
On 11/12/21 6:34 AM, Alan Modra via Binutils wrote:
> On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
>> Hi Alan,
>>
>> I see you have a gcc patch to fix the problem of libopcodes, so should
>> we still need this patch to fix the --target-all on the 32-bit host
>> machine?
>
> No, the patch I just committed now fixed the build problem.
>
Unfortunately it seems to have side effects. The bpf sim still gets
built for a 32-bit host, but its opcodes dependencies are no longer
there, resulting in undefined references:
libsim.a(sim-close.o): In function `sim_close':
binutils-gdb/sim/bpf/../common/sim-close.c:43: undefined reference to
`bpf_cgen_cpu_close'
libsim.a(sim-if.o): In function `sim_open':
binutils-gdb/sim/bpf/sim-if.c:166: undefined reference to
`bpf_cgen_cpu_open_1'
binutils-gdb/sim/bpf/sim-if.c:179: undefined reference to
`bpf_cgen_init_dis'
The references are contained in hese files:
opcodes/bpf-desc.c:bpf_cgen_cpu_close (CGEN_CPU_DESC cd)
opcodes/bpf-desc.c:bpf_cgen_cpu_open_1 (const char *mach_name, enum
cgen_endian endian)
opcodes/bpf-dis.c:bpf_cgen_init_dis (CGEN_CPU_DESC cd)
> Whether you want to enable riscv32 support with a 32-bit bfd is really
> a separate issue.
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-17 13:52 ` Luis Machado
@ 2021-11-18 1:02 ` Alan Modra
2021-11-18 1:29 ` Mike Frysinger
0 siblings, 1 reply; 13+ messages in thread
From: Alan Modra @ 2021-11-18 1:02 UTC (permalink / raw)
To: Luis Machado; +Cc: Nelson Chu, Binutils, Jim Wilson
On Wed, Nov 17, 2021 at 10:52:26AM -0300, Luis Machado wrote:
> Hi Alan,
>
> On 11/12/21 6:34 AM, Alan Modra via Binutils wrote:
> > On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > > Hi Alan,
> > >
> > > I see you have a gcc patch to fix the problem of libopcodes, so should
> > > we still need this patch to fix the --target-all on the 32-bit host
> > > machine?
> >
> > No, the patch I just committed now fixed the build problem.
> >
>
> Unfortunately it seems to have side effects. The bpf sim still gets built
> for a 32-bit host, but its opcodes dependencies are no longer there,
> resulting in undefined references:
Did such a sim configuration actually work prior to my patch? If it
did, I'm willing to move the bpf files from TARGET64_LIBOPCODES_CFILES
to TARGET32_LIBOPCODES_CFILES.
--
Alan Modra
Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-18 1:02 ` Alan Modra
@ 2021-11-18 1:29 ` Mike Frysinger
0 siblings, 0 replies; 13+ messages in thread
From: Mike Frysinger @ 2021-11-18 1:29 UTC (permalink / raw)
To: Alan Modra; +Cc: Luis Machado, Binutils, Jim Wilson
[-- Attachment #1: Type: text/plain, Size: 992 bytes --]
On 18 Nov 2021 11:32, Alan Modra via Binutils wrote:
> On Wed, Nov 17, 2021 at 10:52:26AM -0300, Luis Machado wrote:
> > On 11/12/21 6:34 AM, Alan Modra via Binutils wrote:
> > > On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > > > Hi Alan,
> > > >
> > > > I see you have a gcc patch to fix the problem of libopcodes, so should
> > > > we still need this patch to fix the --target-all on the 32-bit host
> > > > machine?
> > >
> > > No, the patch I just committed now fixed the build problem.
> > >
> >
> > Unfortunately it seems to have side effects. The bpf sim still gets built
> > for a 32-bit host, but its opcodes dependencies are no longer there,
> > resulting in undefined references:
>
> Did such a sim configuration actually work prior to my patch? If it
> did, I'm willing to move the bpf files from TARGET64_LIBOPCODES_CFILES
> to TARGET32_LIBOPCODES_CFILES.
`--host=i686-linux-gnu --enable-targets=all --enable-sim` was working
-mike
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 9:42 ` Nelson Chu
@ 2021-12-01 9:52 ` Luis Machado
2021-12-10 10:40 ` Andrew Burgess
1 sibling, 0 replies; 13+ messages in thread
From: Luis Machado @ 2021-12-01 9:52 UTC (permalink / raw)
To: Nelson Chu, Alan Modra; +Cc: Binutils, Jim Wilson
Hi,
I'm still seeing the following build failure for 32-bit ARM with
--enable-targets=all:
--
libsim.a(sim-main.o): In function `store_rd':
/builds/binutils-gdb-armhf-bionic/sim/riscv/../../../../repos/binutils-gdb/sim/riscv/sim-main.c:73:
undefined reference to `riscv_gpr_names_abi'
/builds/binutils-gdb-armhf-bionic/sim/riscv/../../../../repos/binutils-gdb/sim/riscv/sim-main.c:71:
undefined reference to `riscv_gpr_names_abi'
libsim.a(sim-main.o): In function `initialize_cpu':
/builds/binutils-gdb-armhf-bionic/sim/riscv/../../../../repos/binutils-gdb/sim/riscv/sim-main.c:1109:
undefined reference to `riscv_opcodes'
collect2: error: ld returned 1 exit status
Makefile:253: recipe for target 'run' failed
make[4]: *** [run] Error 1
make[4]: Leaving directory '/builds/binutils-gdb-armhf-bionic/sim/riscv'
Makefile:2279: recipe for target 'all-recursive' failed
make[3]: *** [all-recursive] Error 1
make[3]: Leaving directory '/builds/binutils-gdb-armhf-bionic/sim'
Makefile:1604: recipe for target 'all' failed
make[2]: *** [all] Error 2
make[2]: Leaving directory '/builds/binutils-gdb-armhf-bionic/sim'
Makefile:11218: recipe for target 'all-sim' failed
make[1]: *** [all-sim] Error 2
make[1]: Leaving directory '/builds/binutils-gdb-armhf-bionic'
Makefile:999: recipe for target 'all' failed
make: *** [all] Error 2
--
I thought Alan's fix would address this, but it looks like it doesn't.
It seems these symbols are not available when doing an all-targets build.
On 11/12/21 6:42 AM, Nelson Chu wrote:
> On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
>>
>> On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
>>> Hi Alan,
>>>
>>> I see you have a gcc patch to fix the problem of libopcodes, so should
>>> we still need this patch to fix the --target-all on the 32-bit host
>>> machine?
>>
>> No, the patch I just committed now fixed the build problem.
>
> Thanks for helping to fix this :)
>
>> Whether you want to enable riscv32 support with a 32-bit bfd is really
>> a separate issue.
>
> OK, I will figure this out, thanks.
>
> Nelson
>
>> --
>> Alan Modra
>> Australia Development Lab, IBM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-11-12 9:42 ` Nelson Chu
2021-12-01 9:52 ` Luis Machado
@ 2021-12-10 10:40 ` Andrew Burgess
2021-12-10 12:36 ` Luis Machado
2021-12-11 3:01 ` Nelson Chu
1 sibling, 2 replies; 13+ messages in thread
From: Andrew Burgess @ 2021-12-10 10:40 UTC (permalink / raw)
To: Nelson Chu; +Cc: Alan Modra, Binutils, Jim Wilson
* Nelson Chu <nelson.chu@sifive.com> [2021-11-12 17:42:42 +0800]:
> On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
> >
> > On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > > Hi Alan,
> > >
> > > I see you have a gcc patch to fix the problem of libopcodes, so should
> > > we still need this patch to fix the --target-all on the 32-bit host
> > > machine?
> >
> > No, the patch I just committed now fixed the build problem.
>
> Thanks for helping to fix this :)
>
> > Whether you want to enable riscv32 support with a 32-bit bfd is really
> > a separate issue.
>
> OK, I will figure this out, thanks.
Just to keep you in the loop, I ran into GDB build problems caused by
the riscv (and mips) libopcodes and bfd libraries not being built,
when building bfd in 32-bit mode. There's a dependency between GDB
and libopcodes. I posted this patch:
https://sourceware.org/pipermail/gdb-patches/2021-December/184365.html
I'll probably push the patch next week unless someone gives a
compelling reason not too, but I'm more than happy to revert the riscv
parts if/when the riscv libopcodes is built in 32-bit mode.
Thanks,
Andrew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-12-10 10:40 ` Andrew Burgess
@ 2021-12-10 12:36 ` Luis Machado
2021-12-10 14:57 ` Andrew Burgess
2021-12-11 3:01 ` Nelson Chu
1 sibling, 1 reply; 13+ messages in thread
From: Luis Machado @ 2021-12-10 12:36 UTC (permalink / raw)
To: Andrew Burgess, Nelson Chu; +Cc: Jim Wilson, Binutils
Hi,
On 12/10/21 7:40 AM, Andrew Burgess via Binutils wrote:
> * Nelson Chu <nelson.chu@sifive.com> [2021-11-12 17:42:42 +0800]:
>
>> On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
>>>
>>> On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
>>>> Hi Alan,
>>>>
>>>> I see you have a gcc patch to fix the problem of libopcodes, so should
>>>> we still need this patch to fix the --target-all on the 32-bit host
>>>> machine?
>>>
>>> No, the patch I just committed now fixed the build problem.
>>
>> Thanks for helping to fix this :)
>>
>>> Whether you want to enable riscv32 support with a 32-bit bfd is really
>>> a separate issue.
>>
>> OK, I will figure this out, thanks.
>
> Just to keep you in the loop, I ran into GDB build problems caused by
> the riscv (and mips) libopcodes and bfd libraries not being built,
> when building bfd in 32-bit mode. There's a dependency between GDB
> and libopcodes. I posted this patch:
>
> https://sourceware.org/pipermail/gdb-patches/2021-December/184365.html
>
> I'll probably push the patch next week unless someone gives a
> compelling reason not too, but I'm more than happy to revert the riscv
> parts if/when the riscv libopcodes is built in 32-bit mode.
>
> Thanks,
> Andrew
>
I suppose the binutils issue still remains in this case? As reported here:
https://sourceware.org/pipermail/binutils/2021-December/118736.html
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-12-10 12:36 ` Luis Machado
@ 2021-12-10 14:57 ` Andrew Burgess
2021-12-10 15:09 ` Luis Machado
0 siblings, 1 reply; 13+ messages in thread
From: Andrew Burgess @ 2021-12-10 14:57 UTC (permalink / raw)
To: Luis Machado; +Cc: Nelson Chu, Binutils, Jim Wilson
* Luis Machado via Binutils <binutils@sourceware.org> [2021-12-10 09:36:12 -0300]:
> Hi,
>
> On 12/10/21 7:40 AM, Andrew Burgess via Binutils wrote:
> > * Nelson Chu <nelson.chu@sifive.com> [2021-11-12 17:42:42 +0800]:
> >
> > > On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
> > > >
> > > > On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > > > > Hi Alan,
> > > > >
> > > > > I see you have a gcc patch to fix the problem of libopcodes, so should
> > > > > we still need this patch to fix the --target-all on the 32-bit host
> > > > > machine?
> > > >
> > > > No, the patch I just committed now fixed the build problem.
> > >
> > > Thanks for helping to fix this :)
> > >
> > > > Whether you want to enable riscv32 support with a 32-bit bfd is really
> > > > a separate issue.
> > >
> > > OK, I will figure this out, thanks.
> >
> > Just to keep you in the loop, I ran into GDB build problems caused by
> > the riscv (and mips) libopcodes and bfd libraries not being built,
> > when building bfd in 32-bit mode. There's a dependency between GDB
> > and libopcodes. I posted this patch:
> >
> > https://sourceware.org/pipermail/gdb-patches/2021-December/184365.html
> >
> > I'll probably push the patch next week unless someone gives a
> > compelling reason not too, but I'm more than happy to revert the riscv
> > parts if/when the riscv libopcodes is built in 32-bit mode.
> >
> > Thanks,
> > Andrew
> >
>
> I suppose the binutils issue still remains in this case? As reported here:
>
> https://sourceware.org/pipermail/binutils/2021-December/118736.html
I guess so. I didn't see that in the 32-bit build I was doing, but
I've done nothing that would solve that problem.
Thanks,
Andrew
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-12-10 14:57 ` Andrew Burgess
@ 2021-12-10 15:09 ` Luis Machado
0 siblings, 0 replies; 13+ messages in thread
From: Luis Machado @ 2021-12-10 15:09 UTC (permalink / raw)
To: Andrew Burgess; +Cc: Nelson Chu, Binutils, Jim Wilson
On 12/10/21 11:57 AM, Andrew Burgess wrote:
> * Luis Machado via Binutils <binutils@sourceware.org> [2021-12-10 09:36:12 -0300]:
>
>> Hi,
>>
>> On 12/10/21 7:40 AM, Andrew Burgess via Binutils wrote:
>>> * Nelson Chu <nelson.chu@sifive.com> [2021-11-12 17:42:42 +0800]:
>>>
>>>> On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
>>>>>
>>>>> On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
>>>>>> Hi Alan,
>>>>>>
>>>>>> I see you have a gcc patch to fix the problem of libopcodes, so should
>>>>>> we still need this patch to fix the --target-all on the 32-bit host
>>>>>> machine?
>>>>>
>>>>> No, the patch I just committed now fixed the build problem.
>>>>
>>>> Thanks for helping to fix this :)
>>>>
>>>>> Whether you want to enable riscv32 support with a 32-bit bfd is really
>>>>> a separate issue.
>>>>
>>>> OK, I will figure this out, thanks.
>>>
>>> Just to keep you in the loop, I ran into GDB build problems caused by
>>> the riscv (and mips) libopcodes and bfd libraries not being built,
>>> when building bfd in 32-bit mode. There's a dependency between GDB
>>> and libopcodes. I posted this patch:
>>>
>>> https://sourceware.org/pipermail/gdb-patches/2021-December/184365.html
>>>
>>> I'll probably push the patch next week unless someone gives a
>>> compelling reason not too, but I'm more than happy to revert the riscv
>>> parts if/when the riscv libopcodes is built in 32-bit mode.
>>>
>>> Thanks,
>>> Andrew
>>>
>>
>> I suppose the binutils issue still remains in this case? As reported here:
>>
>> https://sourceware.org/pipermail/binutils/2021-December/118736.html
>
> I guess so. I didn't see that in the 32-bit build I was doing, but
> I've done nothing that would solve that problem.
Thanks for clarifying it. It's great that we can get the gdb builds
going, so thanks for that.
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage.
2021-12-10 10:40 ` Andrew Burgess
2021-12-10 12:36 ` Luis Machado
@ 2021-12-11 3:01 ` Nelson Chu
1 sibling, 0 replies; 13+ messages in thread
From: Nelson Chu @ 2021-12-11 3:01 UTC (permalink / raw)
To: Andrew Burgess; +Cc: Alan Modra, Binutils, Jim Wilson
On Fri, Dec 10, 2021 at 6:40 PM Andrew Burgess <aburgess@redhat.com> wrote:
>
> * Nelson Chu <nelson.chu@sifive.com> [2021-11-12 17:42:42 +0800]:
>
> > On Fri, Nov 12, 2021 at 5:35 PM Alan Modra <amodra@gmail.com> wrote:
> > >
> > > On Fri, Nov 12, 2021 at 04:38:08PM +0800, Nelson Chu wrote:
> > > > Hi Alan,
> > > >
> > > > I see you have a gcc patch to fix the problem of libopcodes, so should
> > > > we still need this patch to fix the --target-all on the 32-bit host
> > > > machine?
> > >
> > > No, the patch I just committed now fixed the build problem.
> >
> > Thanks for helping to fix this :)
> >
> > > Whether you want to enable riscv32 support with a 32-bit bfd is really
> > > a separate issue.
> >
> > OK, I will figure this out, thanks.
>
> Just to keep you in the loop, I ran into GDB build problems caused by
> the riscv (and mips) libopcodes and bfd libraries not being built,
> when building bfd in 32-bit mode. There's a dependency between GDB
> and libopcodes. I posted this patch:
Yeah, thanks. I have been paying attention to this problem, but I
don’t have good solutions and ideas like you, Alan, Jim, Mike and
Luis, so I can’t give some comments that I think are helpful...
> https://sourceware.org/pipermail/gdb-patches/2021-December/184365.html
>
> I'll probably push the patch next week unless someone gives a
> compelling reason not too, but I'm more than happy to revert the riscv
> parts if/when the riscv libopcodes is built in 32-bit mode.
I'm OK with this, we could probably revert it when my previous patch
does work. Thanks for all your work and Jim's suggestion. Thanks for
Alan's help, I think his idea is really great, but as I said, I can’t
give some comments that I think are helpful for now... So I create a
bugzilla as follows, in case I forgot the details in the future, or
someone is interested to fix the problem,
https://sourceware.org/bugzilla/show_bug.cgi?id=28684
Thanks for all
Nelson
> Thanks,
> Andrew
>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2021-12-11 3:02 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-12 8:35 [RFC] RISC-V: Fix the 32-bit --enable-targets=all build breakage Nelson Chu
2021-11-12 8:38 ` Nelson Chu
2021-11-12 9:34 ` Alan Modra
2021-11-12 9:42 ` Nelson Chu
2021-12-01 9:52 ` Luis Machado
2021-12-10 10:40 ` Andrew Burgess
2021-12-10 12:36 ` Luis Machado
2021-12-10 14:57 ` Andrew Burgess
2021-12-10 15:09 ` Luis Machado
2021-12-11 3:01 ` Nelson Chu
2021-11-17 13:52 ` Luis Machado
2021-11-18 1:02 ` Alan Modra
2021-11-18 1:29 ` Mike Frysinger
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