From: Saurabh Jha <saurabh.jha@arm.com>
To: binutils@sourceware.org
Subject: Re: [PATCH v6 1/4] gas, aarch64: Add AdvSIMD lut extension
Date: Tue, 28 May 2024 15:59:08 +0100 [thread overview]
Message-ID: <544282fb-ed5b-4e92-b548-1ce15650f98f@arm.com> (raw)
In-Reply-To: <47761b43-d0a7-4dcf-92a4-9f764d055f3c@arm.com>
On 5/23/2024 4:15 PM, Richard Earnshaw (lists) wrote:
> On 23/05/2024 14:50, Saurabh Jha wrote:
>>
>> Introduces instructions for the Advanced SIMD lut extension for AArch64. They are documented in the following links:
>> * luti2: https://developer.arm.com/documentation/ddi0602/2024-03/SIMD-FP-Instructions/LUTI2--Lookup-table-read-with-2-bit-indices-?lang=en
>> * luti4: https://developer.arm.com/documentation/ddi0602/2024-03/SIMD-FP-Instructions/LUTI4--Lookup-table-read-with-4-bit-indices-?lang=en
>>
>> These instructions needed definition of some new operands. We will first
>> discuss operands for the third operand of the instructions and then
>> discuss a vector register list operand needed for the second operand.
>>
>> The third operands are vectors with bit indices and without type
>> qualifiers. They are called Em_INDEX1_14, Em_INDEX2_13, and Em_INDEX3_12
>> and they have 1 bit, 2 bit, and 3 bit indices respectively. For these
>> new operands, we defined new parsing case branch and a new instruction
>> class. The lsb and width of these operands are the same as many existing
>> but the convention is to give different names to fields that serve
>> different purpose so we introduced new fields in aarch64-opc.c and
>> aarch64-opc.h for these new operands.
>>
>> For the second operand of these instructions, we introduced a new
>> operand called LVn_LUT. This represents a vector register list with
>> stride 1. We defined new inserter and extractor for this new operand and
>> it is encoded in FLD_Rn. We are enforcing the number of registers in the
>> reglist using opcode flag rather than operand flag as this is what other
>> SIMD vector register list operands are doing. The disassembly also uses
>> opcode flag to print the correct number of registers.
>> ---
>> Hi,
>>
>> Regression tested for aarch64-none-elf and found no regressions.
>>
>> Ok for binutils-master? I don't have commit access so can someone please commit on my behalf?
>
> I was about to apply this when I realized that you haven't added anything to the manual or the NEWS file as we could customarily do for a new feature. Could you update the patch for that please?
>
> R.
>
Yes, thanks for pointing it out. Fixed here:
https://sourceware.org/pipermail/binutils/2024-May/134334.html
>>
>> Regards,
>> Saurabh
>> ---
>> gas/config/tc-aarch64.c | 67 ++++++
>> gas/testsuite/gas/aarch64/advsimd-lut-bad.d | 3 +
>> gas/testsuite/gas/aarch64/advsimd-lut-bad.l | 25 +++
>> .../gas/aarch64/advsimd-lut-illegal.d | 3 +
>> .../gas/aarch64/advsimd-lut-illegal.l | 208 ++++++++++++++++++
>> .../gas/aarch64/advsimd-lut-illegal.s | 128 +++++++++++
>> gas/testsuite/gas/aarch64/advsimd-lut.d | 32 +++
>> gas/testsuite/gas/aarch64/advsimd-lut.s | 29 +++
>> include/opcode/aarch64.h | 9 +-
>> opcodes/aarch64-asm.c | 32 +++
>> opcodes/aarch64-asm.h | 1 +
>> opcodes/aarch64-dis.c | 15 ++
>> opcodes/aarch64-dis.h | 1 +
>> opcodes/aarch64-opc.c | 23 ++
>> opcodes/aarch64-opc.h | 2 +
>> opcodes/aarch64-tbl.h | 38 +++-
>> 16 files changed, 614 insertions(+), 2 deletions(-)
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut-bad.d
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut-bad.l
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut-illegal.d
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut-illegal.l
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut-illegal.s
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut.d
>> create mode 100644 gas/testsuite/gas/aarch64/advsimd-lut.s
>>
>
next prev parent reply other threads:[~2024-05-28 14:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 13:50 Saurabh Jha
2024-05-23 13:50 ` [PATCH v6 2/4] gas, aarch64: Add AdvSIMD lut extension generated files Saurabh Jha
2024-05-23 13:50 ` [PATCH v6 3/4] gas, aarch64: Add SVE2 lut extension Saurabh Jha
2024-05-23 16:34 ` Andrew Carlotti
2024-05-28 14:57 ` Saurabh Jha
2024-05-23 13:50 ` [PATCH v6 4/4] gas, aarch64: Add SVE2 lut extension generated files Saurabh Jha
2024-05-23 15:15 ` [PATCH v6 1/4] gas, aarch64: Add AdvSIMD lut extension Richard Earnshaw (lists)
2024-05-28 14:59 ` Saurabh Jha [this message]
2024-05-23 16:08 ` Andrew Carlotti
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