[GAS][AARCH64]Don't try to align insn in non-executale section.

[Renlin Li <renlin.li@arm.com>]

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Hi all,

After my previous patch, instruction will always try to align itself in 
non-text section. https://sourceware.org/ml/binutils/2015-03/msg00389.html

However, this is not required. Only the text section has strict 
alignment requirements. For other section, just leave as it is.
This fixes the latest Linux kernel build with aarch64 tool-chain.

We have got the following assembler in kernel code. 
.altinstr_replacement is not a executable section. with the previous 
patch, gas will try to align the ldarb insn, creating a new frag which 
is different for the one .L663 in.
".if" directive later complains about this: '''Error: non-constant 
expression in ".if" statement'''

661:
      ldrb w3, [x1]
662:
.pushsection .altinstructions,"a"
.word 661b - .
.word 663f - .
.hword 1
.byte 662b-661b
.byte 664f-663f
.popsection
.pushsection .altinstr_replacement, "a"
663:
      ldarb w3, [x1]
664:
      .popsection
      .if ((664b-663b) != (662b-661b))
          .error "Alternatives instruction length mismatch"
      .endif


With the patch, the behavior should be restored. Binuitls regression 
test runs Okay.
Okay to commit?

Regards,
Renlin Li

gas/ChangeLog:

2015-04-20  Renlin Li  <renlin.li@arm.com>

      * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text
      section.
      (md_assemble): Likewise, move the align code outside the loop.


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diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 5492ff4..9e4738a 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -1858,10 +1858,9 @@ s_aarch64_inst (int ignored ATTRIBUTE_UNUSED)
   /* Sections are assumed to start aligned. In executable section, there is no
      MAP_DATA symbol pending. So we only align the address during
      MAP_DATA --> MAP_INSN transition.
-     For other sections, this is not guaranteed, align it anyway.  */
+     For other sections, this is not guaranteed.  */
   enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
-  if (!need_pass_2 && ((subseg_text_p (now_seg) && mapstate == MAP_DATA)
-		       || !subseg_text_p (now_seg)))
+  if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
     frag_align_code (2, 0);
 
 #ifdef OBJ_ELF
@@ -5690,6 +5689,14 @@ md_assemble (char *str)
 
   init_operand_error_report ();
 
+  /* Sections are assumed to start aligned. In executable section, there is no
+     MAP_DATA symbol pending. So we only align the address during
+     MAP_DATA --> MAP_INSN transition.
+     For other sections, this is not guaranteed.  */
+  enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
+  if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
+    frag_align_code (2, 0);
+
   saved_cond = inst.cond;
   reset_aarch64_instruction (&inst);
   inst.cond = saved_cond;
@@ -5705,15 +5712,6 @@ md_assemble (char *str)
 	dump_opcode_operands (opcode);
 #endif /* DEBUG_AARCH64 */
 
-    /* Sections are assumed to start aligned. In executable section, there is no
-       MAP_DATA symbol pending. So we only align the address during
-       MAP_DATA --> MAP_INSN transition.
-       For other sections, this is not guaranteed, align it anyway.  */
-    enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
-    if (!need_pass_2 && ((subseg_text_p (now_seg) && mapstate == MAP_DATA)
-			 || !subseg_text_p (now_seg)))
-      frag_align_code (2, 0);
-
       mapping_state (MAP_INSN);
 
       inst_base = &inst.base;