From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 40877 invoked by alias); 15 May 2015 06:39:34 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 39622 invoked by uid 89); 15 May 2015 06:39:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail.emea.novell.com Received: from mail.emea.novell.com (HELO mail.emea.novell.com) (130.57.118.101) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 15 May 2015 06:39:31 +0000 Received: from EMEA1-MTA by mail.emea.novell.com with Novell_GroupWise; Fri, 15 May 2015 07:39:29 +0100 Message-Id: <5555B0C2020000780007A5FB@mail.emea.novell.com> Date: Fri, 15 May 2015 06:39:00 -0000 From: "Jan Beulich" To: "H.J. Lu" Cc: "Maciej W. Rozycki" , "Binutils" ,"Michael Matz" Subject: Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches References: <20150511212331.GA1838@intel.com> <55520C440200007800079718@mail.emea.novell.com> <5552318402000078000798A8@mail.emea.novell.com> <555233B602000078000798EF@mail.emea.novell.com> <555235930200007800079911@mail.emea.novell.com> In-Reply-To: Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-SW-Source: 2015-05/txt/msg00138.txt.bz2 >>> On 13.05.15 at 18:53, wrote: > On Wed, May 13, 2015 at 9:50 AM, Maciej W. Rozycki = =20 > wrote: >> On Wed, 13 May 2015, H.J. Lu wrote: >> >>> >> > Well, what do you suggest? Your change is clearly wrong as well. >>> >> >>> >> I won't call it wrong since it implies there is a right. >>> > >>> > Of course there is a right. The x86-64 specification is quite clear = what >>> > happens with the prefix on jumps. Intel CPUs are simply buggy in not >>> > implementing it. And you're making binutils follow that buggy behavi= our. >>> >>> AMD64 and Intel64 differ in some subtle ways. >>> >>> > And that is wrong. The associated bug report is invalid. >>> >>> How about this >>> >>> 1. Add flavors of AMD64 and Intel64 to assembler. Make the most >>> permissive one as the default. In case of call/jmp, the default will >>> take AMD64. >>> 2. Add -Mintel64/-Mamd64 to objdump, Make the most permissive >>> ones the default. >> >> FWIW I think this will be the right direction, though the exact options >> may have to be discussed yet. >> >> The assembler is a tool, it should not be forcing a use policy upon >> users. Therefore it should allow whatever is encodable given the >> instruction set definition and let users decide themselves how to use >> it, whether implementations follow the rules or not. >> >> And then if you want to add safety traps such as for this difference >> between individual model implementations, then wire them to `-march=3D' = or >> suchlike. >=20 > Thanks for your feedbacks. I am waiting for feedbacks from Jan and > Michael before I start investigation. Not sure what else feedback you expect - after all I had suggested the introduction of command line options or alike to control the specific behavior. All I'm really after is that without any such override given behavior remain like what it is in 2.25. Jan