* [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
@ 2017-02-23 12:41 Jan Beulich
2017-02-23 15:58 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Jan Beulich @ 2017-02-23 12:41 UTC (permalink / raw)
To: binutils; +Cc: H.J. Lu
Just like REX.W affects operand size of the implicit rAX/rDX inputs to
PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
the instructions for AT&T mode.
For Intel mode, however, suffixes aren't the preferred choice, so
build_vex_prefix() needs to not only honor internally specified REX
flags (converting them to their VEX equivalents), but also such
resulting from explicit REX* prefix uses. Also adjust
build_evex_prefix() for consistency.
Similarly the disassembler needs to be adjusted to no longer require
VEX.W to be zero for the instructions to be valid, and to emit proper
suffixes.
Note, however, that this doesn't address the problem of there being no
way to control (at least) {,E}VEX.W for 32- or 16-bit code. Nor does it
address the problem of the many WIG instructions not getting properly
disassembled when VEX.W=1.
gas/
2017-02-23 Jan Beulich <jbeulich@suse.com>
* tc-i386.c (build_vex_prefix): Act on the merged value of
i.rex and i.prefix[REX_PREFIX] instead of just the former.
(build_vex_prefix): Likewise.
* testsuite/gas/i386/rex.s: Add VPCMPESTR{I,M}.
* testsuite/gas/i386/x86-64-avx.s: Add suffixed variants of
VPCMPESTR{I,M}.
* testsuite/gas/i386/x86-64-sse2avx.s: Likewise.
* testsuite/gas/i386/x86-64-sse4_2.s: Add suffixed variants
of PCMPESTR{I,M}.
* testsuite/gas/i386/ilp32/rex.d: Adjust accordingly.
* testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
* testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
* testsuite/gas/i386/x86-64-avx.d: Likewise.
* testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
* testsuite/gas/i386/x86-64-sse4_2-intel.d: Likewise.
* testsuite/gas/i386/x86-64-sse4_2.d: Likewise.
* testsuite/gas/i386/rex.d: Likewise.
opcodes/
2017-02-23 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (PCMPESTR_Fixup): New.
(VEX_W_0F3A60_P_2, VEX_W_0F3A61_P_2): Delete.
(prefix_table): Use PCMPESTR_Fixup.
(vex_len_table): Make VPCMPESTR{I,M} entries leaf ones and use
PCMPESTR_Fixup.
(vex_w_table): Delete VPCMPESTR{I,M} entries.
* i386-opc.tbl (pcmpestri, pcmpestrm, vpcmpestri, vpcmpestrm):
Split 64-bit and non-64-bit variants.
* opcodes/i386-tbl.h: Re-generate.
--- 2017-02-21/gas/config/tc-i386.c
+++ 2017-02-21/gas/config/tc-i386.c
@@ -3129,6 +3129,7 @@ build_vex_prefix (const insn_template *t
unsigned int register_specifier;
unsigned int implied_prefix;
unsigned int vector_length;
+ rex_byte rex;
/* Check register specifier. */
if (i.vex.register_specifier)
@@ -3146,7 +3147,8 @@ build_vex_prefix (const insn_template *t
&& i.operands == i.reg_operands
&& i.tm.opcode_modifier.vexopcode == VEX0F
&& i.tm.opcode_modifier.s
- && i.rex == REX_B)
+ && i.rex == REX_B
+ && !(i.prefix[REX_PREFIX] & REX_B))
{
unsigned int xchg = i.operands - 1;
union i386_op temp_op;
@@ -3193,10 +3195,12 @@ build_vex_prefix (const insn_template *t
abort ();
}
+ rex = i.rex | i.prefix[REX_PREFIX];
+
/* Use 2-byte VEX prefix if possible. */
if (i.tm.opcode_modifier.vexopcode == VEX0F
&& i.tm.opcode_modifier.vexw != VEXW1
- && (i.rex & (REX_W | REX_X | REX_B)) == 0)
+ && (rex & (REX_W | REX_X | REX_B)) == 0)
{
/* 2-byte VEX prefix. */
unsigned int r;
@@ -3205,7 +3209,7 @@ build_vex_prefix (const insn_template *t
i.vex.bytes[0] = 0xc5;
/* Check the REX.R bit. */
- r = (i.rex & REX_R) ? 0 : 1;
+ r = !(rex & REX_R);
i.vex.bytes[1] = (r << 7
| register_specifier << 3
| vector_length << 2
@@ -3250,10 +3254,10 @@ build_vex_prefix (const insn_template *t
/* The high 3 bits of the second VEX byte are 1's compliment
of RXB bits from REX. */
- i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m;
+ i.vex.bytes[1] = (~rex & 0x7) << 5 | m;
/* Check the REX.W bit. */
- w = (i.rex & REX_W) ? 1 : 0;
+ w = !!(rex & REX_W);
if (i.tm.opcode_modifier.vexw == VEXW1)
w = 1;
@@ -3272,7 +3276,7 @@ build_evex_prefix (void)
unsigned int register_specifier;
unsigned int implied_prefix;
unsigned int m, w;
- rex_byte vrex_used = 0;
+ rex_byte vrex_used = 0, rex = i.rex | i.prefix[REX_PREFIX];
/* Check register specifier. */
if (i.vex.register_specifier)
@@ -3341,7 +3345,7 @@ build_evex_prefix (void)
/* The high 3 bits of the second EVEX byte are 1's compliment of RXB
bits from REX. */
- i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m;
+ i.vex.bytes[1] = (~rex & 0x7) << 5 | m;
/* The fifth bit of the second EVEX byte is 1's compliment of the
REX_R bit in VREX. */
@@ -3368,7 +3372,7 @@ build_evex_prefix (void)
gas_assert (i.vrex == 0);
/* Check the REX.W bit. */
- w = (i.rex & REX_W) ? 1 : 0;
+ w = !!(rex & REX_W);
if (i.tm.opcode_modifier.vexw)
{
if (i.tm.opcode_modifier.vexw == VEXW1)
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/rex.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/rex.d
@@ -20,6 +20,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+:[ ]+9b dd 30\s+fsave\s+\(%rax\)
[ ]*[0-9a-f]+:[ ]+9b 41 dd 30\s+fsave\s+\(%r8\)
[ ]*[0-9a-f]+:[ ]+40 c5 f9 28 00[ ]+rex vmovapd \(%rax\),%xmm0
+[ ]*[0-9a-f]+:[ ]+c4 e3 f9 61 c0 00[ ]+vpcmpestriq \$(0x)?0,%xmm0,%xmm0
+[ ]*[0-9a-f]+:[ ]+c4 e3 f9 60 c0 00[ ]+vpcmpestrmq \$(0x)?0,%xmm0,%xmm0
[ ]*[0-9a-f]+:[ ]+40[ ]+rex
[ ]*[0-9a-f]+:[ ]+41[ ]+rex.B
[ ]*[0-9a-f]+:[ ]+42[ ]+rex.X
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-avx-intel.d
@@ -751,8 +751,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e3 79 df 31 07 vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestri xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07 vpcmpestri xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrm xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07 vpcmpestrm xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 63 f4 07 vpcmpistri xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 63 31 07 vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 62 f4 07 vpcmpistrm xmm6,xmm4,0x7
@@ -1231,27 +1235,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 1861 <_start\+0x1861>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 1869 <_start\+0x1869>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 1871 <_start\+0x1871>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 1879 <_start\+0x1879>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 1881 <_start\+0x1881>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 1889 <_start\+0x1889>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 1891 <_start\+0x1891>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 1899 <_start\+0x1899>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 18a3 <_start\+0x18a3>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 18ad <_start\+0x18ad>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 18b5 <_start\+0x18b5>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 18bf <_start\+0x18bf>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 18c9 <_start\+0x18c9>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 18d3 <_start\+0x18d3>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 18db <_start\+0x18db>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 18e3 <_start\+0x18e3>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 18ec <_start\+0x18ec>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 18f6 <_start\+0x18f6>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 1900 <_start\+0x1900>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 190a <_start\+0x190a>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 1914 <_start\+0x1914>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
@@ -3241,27 +3245,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 435d <_start\+0x435d>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 4365 <_start\+0x4365>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 436d <_start\+0x436d>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 4375 <_start\+0x4375>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 437d <_start\+0x437d>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 4385 <_start\+0x4385>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 438d <_start\+0x438d>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 4395 <_start\+0x4395>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 439f <_start\+0x439f>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 43a9 <_start\+0x43a9>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 43b1 <_start\+0x43b1>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 43bb <_start\+0x43bb>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 43c5 <_start\+0x43c5>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 43cf <_start\+0x43cf>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 43d7 <_start\+0x43d7>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 43df <_start\+0x43df>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 43e8 <_start\+0x43e8>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 43f2 <_start\+0x43f2>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 43fc <_start\+0x43fc>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 4406 <_start\+0x4406>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 4410 <_start\+0x4410>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-avx.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-avx.d
@@ -749,10 +749,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 59 2d 31 vmaskmovpd \(%rcx\),%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df f4 07 vaeskeygenassist \$0x7,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df 31 07 vaeskeygenassist \$0x7,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestri \$0x7,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri \$0x7,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrm \$0x7,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestril? \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestril? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07 vpcmpestriq \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestril? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrml? \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrml? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07 vpcmpestrmq \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrml? \$0x7,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 f4 07 vpcmpistri \$0x7,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 31 07 vpcmpistri \$0x7,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 62 f4 07 vpcmpistrm \$0x7,%xmm4,%xmm6
@@ -1231,27 +1235,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 1861 <_start\+0x1861>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 1869 <_start\+0x1869>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 1871 <_start\+0x1871>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 1879 <_start\+0x1879>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 1881 <_start\+0x1881>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 1889 <_start\+0x1889>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 1891 <_start\+0x1891>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 1899 <_start\+0x1899>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 18a3 <_start\+0x18a3>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 18ad <_start\+0x18ad>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 18b5 <_start\+0x18b5>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 18bf <_start\+0x18bf>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 18c9 <_start\+0x18c9>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 18d3 <_start\+0x18d3>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 18db <_start\+0x18db>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 18e3 <_start\+0x18e3>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 18ec <_start\+0x18ec>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 18f6 <_start\+0x18f6>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 1900 <_start\+0x1900>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 190a <_start\+0x190a>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 1914 <_start\+0x1914>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
@@ -3241,27 +3245,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 435d <_start\+0x435d>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 4365 <_start\+0x4365>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 436d <_start\+0x436d>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 4375 <_start\+0x4375>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 437d <_start\+0x437d>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 4385 <_start\+0x4385>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 438d <_start\+0x438d>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 4395 <_start\+0x4395>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 439f <_start\+0x439f>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 43a9 <_start\+0x43a9>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 43b1 <_start\+0x43b1>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 43bb <_start\+0x43bb>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 43c5 <_start\+0x43c5>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 43cf <_start\+0x43cf>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 43d7 <_start\+0x43d7>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 43df <_start\+0x43df>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 43e8 <_start\+0x43e8>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 43f2 <_start\+0x43f2>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 43fc <_start\+0x43fc>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 4406 <_start\+0x4406>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 4410 <_start\+0x4410>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse2avx.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse2avx.d
@@ -349,10 +349,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 c8 c2 31 07 vcmpordps \(%rcx\),%xmm6,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df f4 64 vaeskeygenassist \$0x64,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df 31 64 vaeskeygenassist \$0x64,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestri \$0x64,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestri \$0x64,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrm \$0x64,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrm \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestril? \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestril? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 64 vpcmpestriq \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestril? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrml? \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrml? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 64 vpcmpestrmq \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrml? \$0x64,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 f4 64 vpcmpistri \$0x64,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 31 64 vpcmpistri \$0x64,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 62 f4 64 vpcmpistrm \$0x64,%xmm4,%xmm6
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d
@@ -25,8 +25,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
+[ ]*[a-f0-9]+: 66 48 0f 3a 61 01 00 rex\.W pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
+[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
+[ ]*[a-f0-9]+: 66 48 0f 3a 60 01 01 rex\.W pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
+[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[rcx\],0x3
--- 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse4_2.d
+++ 2017-02-21/gas/testsuite/gas/i386/ilp32/x86-64-sse4_2.d
@@ -23,10 +23,14 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32q %rcx,%rbx
[ ]*[0-9a-f]+: 66 0f 38 37 01 pcmpgtq \(%rcx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestri \$0x0,\(%rcx\),%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestri \$0x0,%xmm1,%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 60 01 01 pcmpestrm \$0x1,\(%rcx\),%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrm \$0x1,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestril? \$0x0,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestril? \$0x0,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 48 0f 3a 61 01 00 pcmpestriq \$0x0,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestril? \$0x0,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 01 01 pcmpestrml? \$0x1,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrml? \$0x1,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 48 0f 3a 60 01 01 pcmpestrmq \$0x1,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrml? \$0x1,%xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 63 01 02 pcmpistri \$0x2,\(%rcx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 63 c1 02 pcmpistri \$0x2,%xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 62 01 03 pcmpistrm \$0x3,\(%rcx\),%xmm0
--- 2017-02-21/gas/testsuite/gas/i386/rex.d
+++ 2017-02-21/gas/testsuite/gas/i386/rex.d
@@ -19,6 +19,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+:[ ]+9b dd 30\s+fsave\s+\(%rax\)
[ ]*[0-9a-f]+:[ ]+9b 41 dd 30\s+fsave\s+\(%r8\)
[ ]*[0-9a-f]+:[ ]+40 c5 f9 28 00[ ]+rex vmovapd \(%rax\),%xmm0
+[ ]*[0-9a-f]+:[ ]+c4 e3 f9 61 c0 00[ ]+vpcmpestriq \$(0x)?0,%xmm0,%xmm0
+[ ]*[0-9a-f]+:[ ]+c4 e3 f9 60 c0 00[ ]+vpcmpestrmq \$(0x)?0,%xmm0,%xmm0
[ ]*[0-9a-f]+:[ ]+40[ ]+rex
[ ]*[0-9a-f]+:[ ]+41[ ]+rex.B
[ ]*[0-9a-f]+:[ ]+42[ ]+rex.X
--- 2017-02-21/gas/testsuite/gas/i386/rex.s
+++ 2017-02-21/gas/testsuite/gas/i386/rex.s
@@ -16,6 +16,9 @@ _start:
.byte 0x40
vmovapd (%rax),%xmm0
+ rex64/vpcmpestri $0,%xmm0,%xmm0
+ rex64/vpcmpestrm $0,%xmm0,%xmm0
+
# Test prefixes family.
rex
rex.B
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-avx-intel.d
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-avx-intel.d
@@ -751,8 +751,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e3 79 df 31 07 vaeskeygenassist xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestri xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07 vpcmpestri xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrm xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07 vpcmpestrm xmm6,xmm4,0x7
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 63 f4 07 vpcmpistri xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 79 63 31 07 vpcmpistri xmm6,XMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 79 62 f4 07 vpcmpistrm xmm6,xmm4,0x7
@@ -1231,27 +1235,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 1861 <_start\+0x1861>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 1869 <_start\+0x1869>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 1871 <_start\+0x1871>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 1879 <_start\+0x1879>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 1881 <_start\+0x1881>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 1889 <_start\+0x1889>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 1891 <_start\+0x1891>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 1899 <_start\+0x1899>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 18a3 <_start\+0x18a3>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 18ad <_start\+0x18ad>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 18b5 <_start\+0x18b5>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 18bf <_start\+0x18bf>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 18c9 <_start\+0x18c9>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 18d3 <_start\+0x18d3>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 18db <_start\+0x18db>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 18e3 <_start\+0x18e3>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 18ec <_start\+0x18ec>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 18f6 <_start\+0x18f6>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 1900 <_start\+0x1900>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 190a <_start\+0x190a>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 1914 <_start\+0x1914>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
@@ -3241,27 +3245,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 435d <_start\+0x435d>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 4365 <_start\+0x4365>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 436d <_start\+0x436d>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 4375 <_start\+0x4375>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 437d <_start\+0x437d>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 4385 <_start\+0x4385>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 438d <_start\+0x438d>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 4395 <_start\+0x4395>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 439f <_start\+0x439f>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 43a9 <_start\+0x43a9>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 43b1 <_start\+0x43b1>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 43bb <_start\+0x43bb>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 43c5 <_start\+0x43c5>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 43cf <_start\+0x43cf>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 43d7 <_start\+0x43d7>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 43df <_start\+0x43df>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 43e8 <_start\+0x43e8>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 43f2 <_start\+0x43f2>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 43fc <_start\+0x43fc>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 4406 <_start\+0x4406>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 4410 <_start\+0x4410>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq xmm15,xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-avx.d
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-avx.d
@@ -748,10 +748,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 59 2d 31 vmaskmovpd \(%rcx\),%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df f4 07 vaeskeygenassist \$0x7,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df 31 07 vaeskeygenassist \$0x7,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestri \$0x7,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestri \$0x7,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrm \$0x7,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrm \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 f4 07 vpcmpestril? \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestril? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 07 vpcmpestriq \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 07 vpcmpestril? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 f4 07 vpcmpestrml? \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrml? \$0x7,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 07 vpcmpestrmq \$0x7,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 07 vpcmpestrml? \$0x7,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 f4 07 vpcmpistri \$0x7,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 31 07 vpcmpistri \$0x7,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 62 f4 07 vpcmpistrm \$0x7,%xmm4,%xmm6
@@ -1230,27 +1234,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 1861 <_start\+0x1861>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 1869 <_start\+0x1869>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 1871 <_start\+0x1871>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 1879 <_start\+0x1879>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 1881 <_start\+0x1881>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 1889 <_start\+0x1889>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 1891 <_start\+0x1891>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 1899 <_start\+0x1899>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 18a3 <_start\+0x18a3>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 18ad <_start\+0x18ad>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 18b5 <_start\+0x18b5>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 18bf <_start\+0x18bf>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 18c9 <_start\+0x18c9>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 18d3 <_start\+0x18d3>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 18db <_start\+0x18db>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 18e3 <_start\+0x18e3>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 18ec <_start\+0x18ec>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 18f6 <_start\+0x18f6>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 1900 <_start\+0x1900>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 190a <_start\+0x190a>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 1914 <_start\+0x1914>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
@@ -3240,27 +3244,27 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 435d <_start\+0x435d>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 4365 <_start\+0x4365>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 436d <_start\+0x436d>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 4375 <_start\+0x4375>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 437d <_start\+0x437d>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 4385 <_start\+0x4385>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 438d <_start\+0x438d>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 4395 <_start\+0x4395>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 439f <_start\+0x439f>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 43a9 <_start\+0x43a9>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 43b1 <_start\+0x43b1>
-[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 43bb <_start\+0x43bb>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 43c5 <_start\+0x43c5>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 43cf <_start\+0x43cf>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 43d7 <_start\+0x43d7>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 43df <_start\+0x43df>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 43e8 <_start\+0x43e8>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 43f2 <_start\+0x43f2>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 43fc <_start\+0x43fc>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 4406 <_start\+0x4406>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 4410 <_start\+0x4410>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 44 3d 99 00 00 00 07 vpclmulqdq \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # [0-9a-f]+ <_start\+0x[0-9a-f]+>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-avx.s
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-avx.s
@@ -793,8 +793,12 @@ _start:
vaeskeygenassist $7,(%rcx),%xmm6
vpcmpestri $7,%xmm4,%xmm6
vpcmpestri $7,(%rcx),%xmm6
+ vpcmpestriq $7,%xmm4,%xmm6
+ vpcmpestril $7,(%rcx),%xmm6
vpcmpestrm $7,%xmm4,%xmm6
vpcmpestrm $7,(%rcx),%xmm6
+ vpcmpestrmq $7,%xmm4,%xmm6
+ vpcmpestrml $7,(%rcx),%xmm6
vpcmpistri $7,%xmm4,%xmm6
vpcmpistri $7,(%rcx),%xmm6
vpcmpistrm $7,%xmm4,%xmm6
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-sse2avx.d
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-sse2avx.d
@@ -348,10 +348,14 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 c8 c2 31 07 vcmpordps \(%rcx\),%xmm6,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df f4 64 vaeskeygenassist \$0x64,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 df 31 64 vaeskeygenassist \$0x64,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestri \$0x64,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestri \$0x64,\(%rcx\),%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrm \$0x64,%xmm4,%xmm6
-[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrm \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 f4 64 vpcmpestril? \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestril? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 61 f4 64 vpcmpestriq \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 61 31 64 vpcmpestril? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 f4 64 vpcmpestrml? \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrml? \$0x64,\(%rcx\),%xmm6
+[ ]*[a-f0-9]+: c4 e3 f9 60 f4 64 vpcmpestrmq \$0x64,%xmm4,%xmm6
+[ ]*[a-f0-9]+: c4 e3 79 60 31 64 vpcmpestrml? \$0x64,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 f4 64 vpcmpistri \$0x64,%xmm4,%xmm6
[ ]*[a-f0-9]+: c4 e3 79 63 31 64 vpcmpistri \$0x64,\(%rcx\),%xmm6
[ ]*[a-f0-9]+: c4 e3 79 62 f4 64 vpcmpistrm \$0x64,%xmm4,%xmm6
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-sse2avx.s
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-sse2avx.s
@@ -359,8 +359,12 @@ _start:
aeskeygenassist $100,(%rcx),%xmm6
pcmpestri $100,%xmm4,%xmm6
pcmpestri $100,(%rcx),%xmm6
+ pcmpestriq $100,%xmm4,%xmm6
+ pcmpestril $100,(%rcx),%xmm6
pcmpestrm $100,%xmm4,%xmm6
pcmpestrm $100,(%rcx),%xmm6
+ pcmpestrmq $100,%xmm4,%xmm6
+ pcmpestrml $100,(%rcx),%xmm6
pcmpistri $100,%xmm4,%xmm6
pcmpistri $100,(%rcx),%xmm6
pcmpistrm $100,%xmm4,%xmm6
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2-intel.d
@@ -25,8 +25,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
+[ ]*[a-f0-9]+: 66 48 0f 3a 61 01 00 rex\.W pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
+[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
+[ ]*[a-f0-9]+: 66 48 0f 3a 60 01 01 rex\.W pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
+[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[rcx\],0x3
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2.d
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2.d
@@ -22,10 +22,14 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: f2 48 0f 38 f1 d9 crc32q %rcx,%rbx
[ ]*[0-9a-f]+: 66 0f 38 37 01 pcmpgtq \(%rcx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestri \$0x0,\(%rcx\),%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestri \$0x0,%xmm1,%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 60 01 01 pcmpestrm \$0x1,\(%rcx\),%xmm0
-[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrm \$0x1,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 01 00 pcmpestril? \$0x0,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestril? \$0x0,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 48 0f 3a 61 01 00 pcmpestriq \$0x0,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 61 c1 00 pcmpestril? \$0x0,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 01 01 pcmpestrml? \$0x1,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrml? \$0x1,%xmm1,%xmm0
+[ ]*[0-9a-f]+: 66 48 0f 3a 60 01 01 pcmpestrmq \$0x1,\(%rcx\),%xmm0
+[ ]*[0-9a-f]+: 66 0f 3a 60 c1 01 pcmpestrml? \$0x1,%xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 63 01 02 pcmpistri \$0x2,\(%rcx\),%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 63 c1 02 pcmpistri \$0x2,%xmm1,%xmm0
[ ]*[0-9a-f]+: 66 0f 3a 62 01 03 pcmpistrm \$0x3,\(%rcx\),%xmm0
--- 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2.s
+++ 2017-02-21/gas/testsuite/gas/i386/x86-64-sse4_2.s
@@ -20,8 +20,12 @@ foo:
pcmpgtq %xmm1,%xmm0
pcmpestri $0x0,(%rcx),%xmm0
pcmpestri $0x0,%xmm1,%xmm0
+ pcmpestriq $0x0,(%rcx),%xmm0
+ pcmpestril $0x0,%xmm1,%xmm0
pcmpestrm $0x1,(%rcx),%xmm0
pcmpestrm $0x1,%xmm1,%xmm0
+ pcmpestrmq $0x1,(%rcx),%xmm0
+ pcmpestrml $0x1,%xmm1,%xmm0
pcmpistri $0x2,(%rcx),%xmm0
pcmpistri $0x2,%xmm1,%xmm0
pcmpistrm $0x3,(%rcx),%xmm0
--- 2017-02-21/opcodes/i386-dis.c
+++ 2017-02-21/opcodes/i386-dis.c
@@ -117,6 +117,7 @@ static void CMPXCHG8B_Fixup (int, int);
static void XMM_Fixup (int, int);
static void CRC32_Fixup (int, int);
static void FXSAVE_Fixup (int, int);
+static void PCMPESTR_Fixup (int, int);
static void OP_LWPCB_E (int, int);
static void OP_LWP_E (int, int);
static void OP_Vex_2src_1 (int, int);
@@ -2191,8 +2192,6 @@ enum
VEX_W_0F3A4A_P_2,
VEX_W_0F3A4B_P_2,
VEX_W_0F3A4C_P_2,
- VEX_W_0F3A60_P_2,
- VEX_W_0F3A61_P_2,
VEX_W_0F3A62_P_2,
VEX_W_0F3A63_P_2,
VEX_W_0F3ADF_P_2,
@@ -4652,14 +4651,14 @@ static const struct dis386 prefix_table[
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pcmpestrm", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "pcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
},
/* PREFIX_0F3A61 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pcmpestri", { XM, EXx, Ib }, PREFIX_OPCODE },
+ { "pcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
},
/* PREFIX_0F3A62 */
@@ -9998,12 +9997,12 @@ static const struct dis386 vex_len_table
/* VEX_LEN_0F3A60_P_2 */
{
- { VEX_W_TABLE (VEX_W_0F3A60_P_2) },
+ { "vpcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
},
/* VEX_LEN_0F3A61_P_2 */
{
- { VEX_W_TABLE (VEX_W_0F3A61_P_2) },
+ { "vpcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
},
/* VEX_LEN_0F3A62_P_2 */
@@ -11346,14 +11345,6 @@ static const struct dis386 vex_w_table[]
{ "vpblendvb", { XM, Vex, EXx, XMVexI4 }, 0 },
},
{
- /* VEX_W_0F3A60_P_2 */
- { "vpcmpestrm", { XM, EXx, Ib }, 0 },
- },
- {
- /* VEX_W_0F3A61_P_2 */
- { "vpcmpestri", { XM, EXx, Ib }, 0 },
- },
- {
/* VEX_W_0F3A62_P_2 */
{ "vpcmpistrm", { XM, EXx, Ib }, 0 },
},
@@ -16897,6 +16888,27 @@ FXSAVE_Fixup (int bytemode, int sizeflag
OP_M (bytemode, sizeflag);
}
+static void
+PCMPESTR_Fixup (int bytemode, int sizeflag)
+{
+ /* Add proper suffix to "{,v}pcmpestr{i,m}". */
+ if (!intel_syntax)
+ {
+ char *p = mnemonicendp;
+
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *p++ = 'q';
+ else if (sizeflag & SUFFIX_ALWAYS)
+ *p++ = 'l';
+
+ *p = '\0';
+ mnemonicendp = p;
+ }
+
+ OP_EX (bytemode, sizeflag);
+}
+
/* Display the destination register operand for instructions with
VEX. */
--- 2017-02-21/opcodes/i386-opc.tbl
+++ 2017-02-21/opcodes/i386-opc.tbl
@@ -1735,10 +1735,14 @@ roundss, 3, 0x660f3a0a, None, 3, CpuSSE4
pcmpgtq, 2, 0x6637, None, 1, CpuAVX, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
pcmpgtq, 2, 0x660f3837, None, 3, CpuSSE4_2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-pcmpestri, 3, 0x6661, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-pcmpestri, 3, 0x660f3a61, None, 3, CpuSSE4_2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-pcmpestrm, 3, 0x6660, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-pcmpestrm, 3, 0x660f3a60, None, 3, CpuSSE4_2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestri, 3, 0x6661, None, 1, CpuAVX|CpuNo64, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestri, 3, 0x6661, None, 1, CpuAVX|Cpu64, Modrm|Vex|VexOpcode=2|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestri, 3, 0x660f3a61, None, 3, CpuSSE4_2|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestri, 3, 0x660f3a61, None, 3, CpuSSE4_2|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestrm, 3, 0x6660, None, 1, CpuAVX|CpuNo64, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestrm, 3, 0x6660, None, 1, CpuAVX|Cpu64, Modrm|Vex|VexOpcode=2|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestrm, 3, 0x660f3a60, None, 3, CpuSSE4_2|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+pcmpestrm, 3, 0x660f3a60, None, 3, CpuSSE4_2|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
pcmpistri, 3, 0x6663, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
pcmpistri, 3, 0x660f3a63, None, 3, CpuSSE4_2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
pcmpistrm, 3, 0x6662, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
@@ -2215,8 +2219,10 @@ vpcmpeqb, 3, 0x6674, None, 1, CpuAVX, Mo
vpcmpeqd, 3, 0x6676, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
vpcmpeqq, 3, 0x6629, None, 1, CpuAVX, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
vpcmpeqw, 3, 0x6675, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
-vpcmpestri, 3, 0x6661, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
-vpcmpestrm, 3, 0x6660, None, 1, CpuAVX, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+vpcmpestri, 3, 0x6661, None, 1, CpuAVX|CpuNo64, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+vpcmpestri, 3, 0x6661, None, 1, CpuAVX|Cpu64, Modrm|Vex|VexOpcode=2|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+vpcmpestrm, 3, 0x6660, None, 1, CpuAVX|CpuNo64, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
+vpcmpestrm, 3, 0x6660, None, 1, CpuAVX|Cpu64, Modrm|Vex|VexOpcode=2|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
vpcmpgtb, 3, 0x6664, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
vpcmpgtd, 3, 0x6666, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
vpcmpgtq, 3, 0x6637, None, 1, CpuAVX, Modrm|Vex|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM, RegXMM }
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-23 12:41 [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M} Jan Beulich
@ 2017-02-23 15:58 ` H.J. Lu
2017-02-23 16:13 ` Jan Beulich
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2017-02-23 15:58 UTC (permalink / raw)
To: Jan Beulich; +Cc: Binutils
On Thu, Feb 23, 2017 at 4:40 AM, Jan Beulich <JBeulich@suse.com> wrote:
> Just like REX.W affects operand size of the implicit rAX/rDX inputs to
> PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
> the instructions for AT&T mode.
>
> For Intel mode, however, suffixes aren't the preferred choice, so
> build_vex_prefix() needs to not only honor internally specified REX
> flags (converting them to their VEX equivalents), but also such
> resulting from explicit REX* prefix uses. Also adjust
> build_evex_prefix() for consistency.
Please don't use EXISTING REX prefixes for this purpose. A new
prefix to control encoding is better, but it probably belongs to another
patch.
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-23 15:58 ` H.J. Lu
@ 2017-02-23 16:13 ` Jan Beulich
2017-02-23 16:20 ` H.J. Lu
0 siblings, 1 reply; 5+ messages in thread
From: Jan Beulich @ 2017-02-23 16:13 UTC (permalink / raw)
To: H.J. Lu; +Cc: Binutils
>>> On 23.02.17 at 16:58, <hjl.tools@gmail.com> wrote:
> On Thu, Feb 23, 2017 at 4:40 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> Just like REX.W affects operand size of the implicit rAX/rDX inputs to
>> PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
>> the instructions for AT&T mode.
>>
>> For Intel mode, however, suffixes aren't the preferred choice, so
>> build_vex_prefix() needs to not only honor internally specified REX
>> flags (converting them to their VEX equivalents), but also such
>> resulting from explicit REX* prefix uses. Also adjust
>> build_evex_prefix() for consistency.
>
> Please don't use EXISTING REX prefixes for this purpose. A new
> prefix to control encoding is better, but it probably belongs to another
> patch.
I'm sorry, but I don't follow. If you want to go that route, we'll need
more than just one new prefix, and it would be far from clear where
to draw the boundary. Granted this would allow to address the
32-/16-bit side of things at once, but no, I don't think I have the
time or energy to go that route (or else I would have done so right
away, instead of adding a remark to the description in this regard).
Jan
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-23 16:13 ` Jan Beulich
@ 2017-02-23 16:20 ` H.J. Lu
2017-02-24 9:31 ` Jan Beulich
0 siblings, 1 reply; 5+ messages in thread
From: H.J. Lu @ 2017-02-23 16:20 UTC (permalink / raw)
To: Jan Beulich; +Cc: Binutils
On Thu, Feb 23, 2017 at 8:13 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 23.02.17 at 16:58, <hjl.tools@gmail.com> wrote:
>> On Thu, Feb 23, 2017 at 4:40 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>> Just like REX.W affects operand size of the implicit rAX/rDX inputs to
>>> PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
>>> the instructions for AT&T mode.
>>>
>>> For Intel mode, however, suffixes aren't the preferred choice, so
>>> build_vex_prefix() needs to not only honor internally specified REX
>>> flags (converting them to their VEX equivalents), but also such
>>> resulting from explicit REX* prefix uses. Also adjust
>>> build_evex_prefix() for consistency.
>>
>> Please don't use EXISTING REX prefixes for this purpose. A new
>> prefix to control encoding is better, but it probably belongs to another
>> patch.
>
> I'm sorry, but I don't follow. If you want to go that route, we'll need
> more than just one new prefix, and it would be far from clear where
> to draw the boundary. Granted this would allow to address the
> 32-/16-bit side of things at once, but no, I don't think I have the
> time or energy to go that route (or else I would have done so right
> away, instead of adding a remark to the description in this regard).
>
> Jan
We shouldn't change the meaning of existing REX prefixes. Let's
leave Intel mode alone for now.
--
H.J.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}
2017-02-23 16:20 ` H.J. Lu
@ 2017-02-24 9:31 ` Jan Beulich
0 siblings, 0 replies; 5+ messages in thread
From: Jan Beulich @ 2017-02-24 9:31 UTC (permalink / raw)
To: H.J. Lu; +Cc: Binutils
>>> On 23.02.17 at 17:20, <hjl.tools@gmail.com> wrote:
> On Thu, Feb 23, 2017 at 8:13 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>> On 23.02.17 at 16:58, <hjl.tools@gmail.com> wrote:
>>> On Thu, Feb 23, 2017 at 4:40 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> Just like REX.W affects operand size of the implicit rAX/rDX inputs to
>>>> PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
>>>> the instructions for AT&T mode.
>>>>
>>>> For Intel mode, however, suffixes aren't the preferred choice, so
>>>> build_vex_prefix() needs to not only honor internally specified REX
>>>> flags (converting them to their VEX equivalents), but also such
>>>> resulting from explicit REX* prefix uses. Also adjust
>>>> build_evex_prefix() for consistency.
>>>
>>> Please don't use EXISTING REX prefixes for this purpose. A new
>>> prefix to control encoding is better, but it probably belongs to another
>>> patch.
>>
>> I'm sorry, but I don't follow. If you want to go that route, we'll need
>> more than just one new prefix, and it would be far from clear where
>> to draw the boundary. Granted this would allow to address the
>> 32-/16-bit side of things at once, but no, I don't think I have the
>> time or energy to go that route (or else I would have done so right
>> away, instead of adding a remark to the description in this regard).
>
> We shouldn't change the meaning of existing REX prefixes. Let's
> leave Intel mode alone for now.
While I disagree, in the interest of getting the bug here fixed at
least in some way, I've submitted v3 with the REX parts dropped.
Jan
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-02-24 9:31 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-02-23 12:41 [PATCH v2] x86: fix handling of 64-bit operand size VPCMPESTR{I,M} Jan Beulich
2017-02-23 15:58 ` H.J. Lu
2017-02-23 16:13 ` Jan Beulich
2017-02-23 16:20 ` H.J. Lu
2017-02-24 9:31 ` Jan Beulich
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).