Re: [PATCH 1/5] PowerPC add initial -mfuture instruction support

["Jan Beulich" <jbeulich@suse.com>]

>>> Alan Modra <amodra@gmail.com> 05/24/19 3:33 AM >>>
>--- a/opcodes/ppc-opc.c
>+++ b/opcodes/ppc-opc.c
>@@ -2721,6 +2721,18 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
>#define OP(x) ((((uint64_t)(x)) & 0x3f) << 26)
>#define OP_MASK OP (0x3f)
 >
>+/* The prefix opcode.  */
>+#define PREFIX_OP (1ULL << 58)
>+
>+/* The 2-bit prefix form.  */
>+#define PREFIX_FORM(x) ((x & 3ULL) << 56)
>+
>+#define SUFFIX_MASK ((1ULL << 32) - 1)
>+#define PREFIX_MASK (SUFFIX_MASK << 32)

With these, am I right in understanding that ...


>@@ -7796,6 +7809,17 @@ const struct powerpc_opcode powerpc_opcodes[] = {
>const unsigned int powerpc_num_opcodes =
>sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);
  >
>+/* The opcode table for 8-byte prefix instructions.
>+
>+   The format of this opcode table is the same as the main opcode table.  */
>+
>+const struct powerpc_opcode prefix_opcodes[] = {
>+{"pnop",	  PMRR,		       PREFIX_MASK,	POWERXX, 0,	{0}},

... everything with the 32 prefix bits matching the pattern decodes to PNOP, regardless of
any of the 32 suffix bits? The testcase added covers only the case of the suffix bits all being
zero.


Jan