From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 6F065384F021 for ; Thu, 20 Oct 2022 09:29:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 6F065384F021 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id C1382300089; Thu, 20 Oct 2022 09:29:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1666258154; bh=cqjVfRw22ZK50iTwDmJFzzfAC5M71DRek8GtIBTQibQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=ZVL7g6jA6RnGjFo7oOfDM2la5Y2GqqhKHETrEgxMWU2xV1FJrko6O1yE5aALCut9d fwEDr8T9Xz9s3z0Q7M7Vv4AJjx3rOz6PPMlNGDhzEhH+RhmGaoNgx4nZnZpORjHbD4 DjbTUiH2w1HrUXE7ZIgC/NzDupacc0dDf6KXgOWw= From: Tsukasa OI To: Tsukasa OI , Andrew Burgess , Mike Frysinger , Nick Clifton Cc: binutils@sourceware.org Subject: [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments Date: Thu, 20 Oct 2022 09:26:01 +0000 Message-Id: <5ab303a5bdfc1da7832f8fa22f57678c9ef1a5fa.1666257885.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Clang generates a warning if there is a redundant self-assignment ("-Wself-assign"). On the default configuration, it causes a build failure (unless "--disable-werror" is specified). However, removing self-assignments in step_once function makes the code less readable. Instead, this commit inserts dummy addition to match the comments "Value added == 0". This is redundant but will suppress warnings and matches with other branches better. It will be also optimized away so we can ignore performance impact on this. --- sim/h8300/compile.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index 9be7dd565a9..f7d8d590b69 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch? */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && !h && (10 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0x6; /* Value added == 6. */ @@ -4174,7 +4174,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu) res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */ if (!c && (0 <= (res >> 4) && (res >> 4) <= 9) && !h && (0 <= (res & 0xf) && (res & 0xf) <= 9)) - res = res; /* Value added == 0. */ + res = res + 0x0; /* Value added == 0. */ else if (!c && (0 <= (res >> 4) && (res >> 4) <= 8) && h && (6 <= (res & 0xf) && (res & 0xf) <= 15)) res = res + 0xfa; /* Value added == 0xfa. */ -- 2.34.1