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From: Andrew Burgess <aburgess@redhat.com>
To: binutils@sourceware.org
Cc: Andrew Burgess <aburgess@redhat.com>
Subject: [PATCHv2 1/2] opcodes: add new sub-mnemonic disassembler style
Date: Mon, 18 Jul 2022 17:31:33 +0100	[thread overview]
Message-ID: <5e70342a930400db9327baffb34961c8d81a6740.1658161688.git.aburgess@redhat.com> (raw)
In-Reply-To: <cover.1658161688.git.aburgess@redhat.com>

When adding libopcodes disassembler styling support for AArch64, it
feels like the results would be improved by having a new sub-mnemonic
style.  This will be used in cases like:

  add    w16, w7, w1, uxtb #2
                      ^^^^----- Here

And:

  cinc   w0, w1, ne
                 ^^----- Here

This commit just adds the new style, and prepares objdump to handle
the style.  A later commit will add AArch64 styling, and will actually
make use of the style.

As this style is currently unused, there should be no user visible
changes after this commit.
---
 binutils/objdump.c | 2 ++
 include/dis-asm.h  | 7 +++++++
 2 files changed, 9 insertions(+)

diff --git a/binutils/objdump.c b/binutils/objdump.c
index 67824053527..4076587151c 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -2167,6 +2167,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style)
 	{
 	case dis_style_symbol: color = 32; break;
         case dis_style_assembler_directive:
+	case dis_style_sub_mnemonic:
 	case dis_style_mnemonic: color = 33; break;
 	case dis_style_register: color = 34; break;
 	case dis_style_address:
@@ -2185,6 +2186,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style)
 	{
 	case dis_style_symbol: color = 40; break;
         case dis_style_assembler_directive:
+	case dis_style_sub_mnemonic:
 	case dis_style_mnemonic: color = 142; break;
 	case dis_style_register: color = 27; break;
 	case dis_style_address:
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 4f91df12498..f1a83dc84e5 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -62,6 +62,13 @@ enum disassembler_style
      instructions.  */
   dis_style_mnemonic,
 
+  /* Some architectures include additional mnemonic like fields within the
+     instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where
+     the 'lsl' is an additional piece of text that describes how the
+     instruction should behave.  This sub-mnemonic style can be used for
+     these pieces of text.  */
+  dis_style_sub_mnemonic,
+
   /* For things that aren't real machine instructions, but rather
      assembler directives, e.g. .byte, etc.  */
   dis_style_assembler_directive,
-- 
2.25.4


  reply	other threads:[~2022-07-18 16:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-12 13:36 [PATCH] libopcodes/ppc: add support for disassembler styling Andrew Burgess
2022-07-14  2:09 ` Alan Modra
2022-07-14  6:08   ` Jan Beulich
2022-07-14 11:18     ` Alan Modra
2022-07-18 16:31 ` [PATCHv2 0/2] PPC Styled Disassembler Support Andrew Burgess
2022-07-18 16:31   ` Andrew Burgess [this message]
2022-07-18 16:31   ` [PATCHv2 2/2] libopcodes/ppc: add support for disassembler styling Andrew Burgess
2022-07-21  9:31     ` Alan Modra
2022-07-25 13:14       ` Andrew Burgess
  -- strict thread matches above, loose matches on Subject: below --
2022-06-21 11:22 [PATCH 0/2] AArch64 libopcodes styling Andrew Burgess
2022-07-05 12:45 ` [PATCHv2 " Andrew Burgess
2022-07-05 12:46   ` [PATCHv2 1/2] opcodes: add new sub-mnemonic disassembler style Andrew Burgess

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