From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: binutils@sourceware.org
Subject: [PATCH 11/57][Arm][GAS] Add support for MVE instructions: vadc, vsbc and vbrsr
Date: Wed, 01 May 2019 17:05:00 -0000 [thread overview]
Message-ID: <6093cd14-e552-f897-ef5f-52b6ece89885@arm.com> (raw)
In-Reply-To: <19569550-4d2e-0bb3-592a-d91050d490f6@arm.com>
[-- Attachment #1: Type: text/plain, Size: 768 bytes --]
Hi,
This patch adds support for MVE instructions VADC, VSBC and VBRSR.
gas/ChangeLog:
2019-05-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (M_MNEM_vadc, M_MNEM_vadci, M_MNEM_vbrsr):
New instruction encodings.
(do_mve_vadc): New encoding instruction.
(do_mve_vbrsr): Likewise.
(do_mve_vsbc): Likewise.
* testsuite/gas/arm/mve-vadc-bad.d: New test.
* testsuite/gas/arm/mve-vadc-bad.l: New test.
* testsuite/gas/arm/mve-vadc-bad.s: New test.
* testsuite/gas/arm/mve-vbrsr-bad.d: New test.
* testsuite/gas/arm/mve-vbrsr-bad.l: New test.
* testsuite/gas/arm/mve-vbrsr-bad.s: New test.
* testsuite/gas/arm/mve-vsbc-bad.d: New test.
* testsuite/gas/arm/mve-vsbc-bad.l: New test.
* testsuite/gas/arm/mve-vsbc-bad.s: New test.
[-- Attachment #2: 11.patch --]
[-- Type: text/x-patch, Size: 11365 bytes --]
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index b6ca4a48626f199347b7f1b2d281065198fd43ca..91754e3da9d500300443e28455ee6f248ded249b 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -14139,6 +14139,9 @@ do_t_loloop (void)
#define M_MNEM_vmovlb 0xeea00f40
#define M_MNEM_vmovnt 0xfe311e81
#define M_MNEM_vmovnb 0xfe310e81
+#define M_MNEM_vadc 0xee300f00
+#define M_MNEM_vadci 0xee301f00
+#define M_MNEM_vbrsr 0xfe011e60
/* Neon instruction encoder helpers. */
@@ -16761,6 +16764,52 @@ do_neon_qdmulh (void)
}
}
+static void
+do_mve_vadc (void)
+{
+ enum neon_shape rs = neon_select_shape (NS_QQQ, NS_NULL);
+ struct neon_type_el et
+ = neon_check_type (3, rs, N_KEY | N_I32, N_EQK, N_EQK);
+
+ if (et.type == NT_invtype)
+ first_error (BAD_EL_TYPE);
+
+ if (inst.cond > COND_ALWAYS)
+ inst.pred_insn_type = INSIDE_VPT_INSN;
+ else
+ inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
+
+ mve_encode_qqq (0, 64);
+}
+
+static void
+do_mve_vbrsr (void)
+{
+ enum neon_shape rs = neon_select_shape (NS_QQR, NS_NULL);
+ struct neon_type_el et
+ = neon_check_type (3, rs, N_EQK, N_EQK, N_8 | N_16 | N_32 | N_KEY);
+
+ if (inst.cond > COND_ALWAYS)
+ inst.pred_insn_type = INSIDE_VPT_INSN;
+ else
+ inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
+
+ mve_encode_qqr (et.size, 0);
+}
+
+static void
+do_mve_vsbc (void)
+{
+ neon_check_type (3, NS_QQQ, N_EQK, N_EQK, N_I32 | N_KEY);
+
+ if (inst.cond > COND_ALWAYS)
+ inst.pred_insn_type = INSIDE_VPT_INSN;
+ else
+ inst.pred_insn_type = MVE_OUTSIDE_PRED_INSN;
+
+ mve_encode_qqq (1, 64);
+}
+
static void
do_mve_vmull (void)
{
@@ -23911,6 +23960,10 @@ static const struct asm_opcode insns[] =
ToC("vpsteee", fe712f4d, 0, (), mve_vpt),
/* MVE and MVE FP only. */
+ mCEF(vadc, _vadc, 3, (RMQ, RMQ, RMQ), mve_vadc),
+ mCEF(vadci, _vadci, 3, (RMQ, RMQ, RMQ), mve_vadc),
+ mToC("vsbc", fe300f00, 3, (RMQ, RMQ, RMQ), mve_vsbc),
+ mToC("vsbci", fe301f00, 3, (RMQ, RMQ, RMQ), mve_vsbc),
mCEF(vmullb, _vmullb, 3, (RMQ, RMQ, RMQ), mve_vmull),
mCEF(vabav, _vabav, 3, (RRnpcsp, RMQ, RMQ), mve_vabav),
mCEF(vmladav, _vmladav, 3, (RRe, RMQ, RMQ), mve_vmladav),
@@ -23947,6 +24000,7 @@ static const struct asm_opcode insns[] =
mCEF(vmovnt, _vmovnt, 2, (RMQ, RMQ), mve_movn),
mCEF(vmovnb, _vmovnb, 2, (RMQ, RMQ), mve_movn),
+ mCEF(vbrsr, _vbrsr, 3, (RMQ, RMQ, RR), mve_vbrsr),
#undef ARM_VARIANT
#define ARM_VARIANT & fpu_vfp_ext_v1
diff --git a/gas/testsuite/gas/arm/mve-vadc-bad.d b/gas/testsuite/gas/arm/mve-vadc-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..81d95c2c57f970f833cc2059ddef5164948b85fd
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vadc-bad.d
@@ -0,0 +1,5 @@
+#name: Bad MVE VADC instructions
+#as: -march=armv8.1-m.main+mve.fp
+#error_output: mve-vadc-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vadc-bad.l b/gas/testsuite/gas/arm/mve-vadc-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..ca1c3a579fa7ccbe803a7ea92407b4e594367433
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vadc-bad.l
@@ -0,0 +1,31 @@
+[^:]*: Assembler messages:
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Error: bad type in SIMD instruction -- `vadc.i8 q0,q1,q2'
+[^:]*:14: Error: bad type in SIMD instruction -- `vadc.i16 q0,q1,q2'
+[^:]*:15: Error: bad type in SIMD instruction -- `vadc.i64 q0,q1,q2'
+[^:]*:16: Error: bad type in SIMD instruction -- `vadc.f32 q0,q1,q2'
+[^:]*:17: Error: bad type in SIMD instruction -- `vadci.i8 q0,q1,q2'
+[^:]*:18: Error: bad type in SIMD instruction -- `vadci.i16 q0,q1,q2'
+[^:]*:19: Error: bad type in SIMD instruction -- `vadci.i64 q0,q1,q2'
+[^:]*:20: Error: bad type in SIMD instruction -- `vadci.f32 q0,q1,q2'
+[^:]*:22: Error: syntax error -- `vadceq.i32 q0,q1,q2'
+[^:]*:23: Error: syntax error -- `vadceq.i32 q0,q1,q2'
+[^:]*:25: Error: syntax error -- `vadceq.i32 q0,q1,q2'
+[^:]*:26: Error: vector predicated instruction should be in VPT/VPST block -- `vadct.i32 q0,q1,q2'
+[^:]*:28: Error: instruction missing MVE vector predication code -- `vadc.i32 q0,q1,q2'
+[^:]*:30: Error: syntax error -- `vadcieq.i32 q0,q1,q2'
+[^:]*:31: Error: syntax error -- `vadcieq.i32 q0,q1,q2'
+[^:]*:33: Error: syntax error -- `vadcieq.i32 q0,q1,q2'
+[^:]*:34: Error: vector predicated instruction should be in VPT/VPST block -- `vadcit.i32 q0,q1,q2'
+[^:]*:36: Error: instruction missing MVE vector predication code -- `vadci.i32 q0,q1,q2'
diff --git a/gas/testsuite/gas/arm/mve-vadc-bad.s b/gas/testsuite/gas/arm/mve-vadc-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..6627c9e54f081c2f7811ce15072dc0839f3739cb
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vadc-bad.s
@@ -0,0 +1,36 @@
+.macro cond
+.irp cond, eq, ne, gt, ge, lt, le
+.irp mnem, vadc.i32, vadci.i32
+it \cond
+\mnem q0, q1, q2
+.endr
+.endr
+.endm
+
+.syntax unified
+.thumb
+cond
+vadc.i8 q0, q1, q2
+vadc.i16 q0, q1, q2
+vadc.i64 q0, q1, q2
+vadc.f32 q0, q1, q2
+vadci.i8 q0, q1, q2
+vadci.i16 q0, q1, q2
+vadci.i64 q0, q1, q2
+vadci.f32 q0, q1, q2
+it eq
+vadceq.i32 q0, q1, q2
+vadceq.i32 q0, q1, q2
+vpst
+vadceq.i32 q0, q1, q2
+vadct.i32 q0, q1, q2
+vpst
+vadc.i32 q0, q1, q2
+it eq
+vadcieq.i32 q0, q1, q2
+vadcieq.i32 q0, q1, q2
+vpst
+vadcieq.i32 q0, q1, q2
+vadcit.i32 q0, q1, q2
+vpst
+vadci.i32 q0, q1, q2
diff --git a/gas/testsuite/gas/arm/mve-vbrsr-bad.d b/gas/testsuite/gas/arm/mve-vbrsr-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..b4fc21aba00d159293ba9a9656060a2f612ccf25
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vbrsr-bad.d
@@ -0,0 +1,5 @@
+#name: bad MVE VBRSR instructions
+#as: -march=armv8.1-m.main+mve.fp
+#error_output: mve-vbrsr-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vbrsr-bad.l b/gas/testsuite/gas/arm/mve-vbrsr-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..d0b8de9178e2f74eff436f53c5f69411403d1922
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vbrsr-bad.l
@@ -0,0 +1,14 @@
+[^:]*: Assembler messages:
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:10: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:11: Error: bad type in SIMD instruction -- `vbrsr.64 q0,q1,r2'
+[^:]*:12: Error: ARM register expected -- `vbrsr.32 q0,q1,q2'
+[^:]*:14: Error: syntax error -- `vbrsreq.32 q0,q1,r2'
+[^:]*:15: Error: syntax error -- `vbrsreq.32 q0,q1,r2'
+[^:]*:17: Error: syntax error -- `vbrsreq.32 q0,q1,r2'
+[^:]*:19: Error: instruction missing MVE vector predication code -- `vbrsr.32 q0,q1,r2'
+[^:]*:20: Error: vector predicated instruction should be in VPT/VPST block -- `vbrsrt.32 q0,q1,r2'
diff --git a/gas/testsuite/gas/arm/mve-vbrsr-bad.s b/gas/testsuite/gas/arm/mve-vbrsr-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..af02bd941d721d6b1be27953746260038892b6fd
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vbrsr-bad.s
@@ -0,0 +1,20 @@
+.macro cond
+.irp cond, eq, ne, gt, ge, lt, le
+it \cond
+vbrsr.16 q0, q1, r2
+.endr
+.endm
+
+.syntax unified
+.thumb
+cond
+vbrsr.64 q0, q1, r2
+vbrsr.32 q0, q1, q2
+it eq
+vbrsreq.32 q0, q1, r2
+vbrsreq.32 q0, q1, r2
+vpst
+vbrsreq.32 q0, q1, r2
+vpst
+vbrsr.32 q0, q1, r2
+vbrsrt.32 q0, q1, r2
diff --git a/gas/testsuite/gas/arm/mve-vsbc-bad.d b/gas/testsuite/gas/arm/mve-vsbc-bad.d
new file mode 100644
index 0000000000000000000000000000000000000000..29186c1cac47f2d35068a00d026ab6858fc84eda
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vsbc-bad.d
@@ -0,0 +1,5 @@
+#name: bad MVE VSBC instructions
+#as: -march=armv8.1-m.main+mve
+#error_output: mve-vsbc-bad.l
+
+.*: +file format .*arm.*
diff --git a/gas/testsuite/gas/arm/mve-vsbc-bad.l b/gas/testsuite/gas/arm/mve-vsbc-bad.l
new file mode 100644
index 0000000000000000000000000000000000000000..e730751262dd0d3765a8bd6d1947a724a3236979
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vsbc-bad.l
@@ -0,0 +1,25 @@
+[^:]*: Assembler messages:
+[^:]*:10: Error: bad type in SIMD instruction -- `vsbc.i16 q0,q1,q2'
+[^:]*:11: Error: bad type in SIMD instruction -- `vsbci.i16 q0,q1,q2'
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:12: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:13: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:15: Error: syntax error -- `vsbceq.i32 q0,q1,q2'
+[^:]*:16: Error: syntax error -- `vsbceq.i32 q0,q1,q2'
+[^:]*:18: Error: syntax error -- `vsbceq.i32 q0,q1,q2'
+[^:]*:20: Error: instruction missing MVE vector predication code -- `vsbc.i32 q0,q1,q2'
+[^:]*:21: Error: vector predicated instruction should be in VPT/VPST block -- `vsbct.i32 q0,q1,q2'
+[^:]*:23: Error: syntax error -- `vsbcieq.i32 q0,q1,q2'
+[^:]*:24: Error: syntax error -- `vsbcieq.i32 q0,q1,q2'
+[^:]*:26: Error: syntax error -- `vsbcieq.i32 q0,q1,q2'
+[^:]*:28: Error: instruction missing MVE vector predication code -- `vsbci.i32 q0,q1,q2'
+[^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vsbcit.i32 q0,q1,q2'
diff --git a/gas/testsuite/gas/arm/mve-vsbc-bad.s b/gas/testsuite/gas/arm/mve-vsbc-bad.s
new file mode 100644
index 0000000000000000000000000000000000000000..869ba6e228bdd21b6f9282b62447e66a3c7adb81
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-vsbc-bad.s
@@ -0,0 +1,29 @@
+.macro cond op
+.irp cond, eq, ne, gt, ge, lt, le
+it \cond
+\op\().i32 q0, q1, q2
+.endr
+.endm
+
+.syntax unified
+.thumb
+vsbc.i16 q0, q1, q2
+vsbci.i16 q0, q1, q2
+cond vsbc
+cond vsbci
+it eq
+vsbceq.i32 q0, q1, q2
+vsbceq.i32 q0, q1, q2
+vpst
+vsbceq.i32 q0, q1, q2
+vpst
+vsbc.i32 q0, q1, q2
+vsbct.i32 q0, q1, q2
+it eq
+vsbcieq.i32 q0, q1, q2
+vsbcieq.i32 q0, q1, q2
+vpst
+vsbcieq.i32 q0, q1, q2
+vpst
+vsbci.i32 q0, q1, q2
+vsbcit.i32 q0, q1, q2
next prev parent reply other threads:[~2019-05-01 17:05 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 16:51 [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 16:53 ` [PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fp Andre Vieira (lists)
2019-05-01 16:55 ` [PATCH 2/57][Arm][GAS] Add support for MVE instructions: vpst, vadd, vsub and vabd Andre Vieira (lists)
2019-05-02 10:56 ` Nick Clifton
2019-05-13 13:42 ` Andre Vieira (lists)
[not found] ` <98e50dc4-7b0e-d727-0c20-34711be86533@redhat.com>
[not found] ` <4e56a5f3-bcde-f4cd-21d4-35cc3f11b5e8@arm.com>
2019-05-14 16:53 ` Nick Clifton
2019-05-14 16:54 ` Nick Clifton
2019-05-01 16:56 ` [PATCH 3/57][Arm][GAS] Add support for MVE instructions: vabs and vneg Andre Vieira (lists)
2019-05-01 16:57 ` [PATCH 4/57][Arm][GAS] Add support for MVE instructions: vabav, vmladav and vmlsdav Andre Vieira (lists)
2019-05-01 16:59 ` [PATCH 5/57][Arm][GAS] Add support for MVE instructions: vmull{b,t} Andre Vieira (lists)
2019-05-01 17:00 ` [PATCH 6/57][Arm][GAS] Add support for MVE instructions: vst/vld{2,4} Andre Vieira (lists)
2019-05-01 17:01 ` [PATCH 7/57][Arm][GAS] Add support for MVE instructions: vstr/vldr Andre Vieira (lists)
2019-05-01 17:02 ` [PATCH 8/57][Arm][GAS] Add support for MVE instructions: vcvt Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 10/57][Arm][GAS] Add support for MVE instructions: vcmp and vpt Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 9/57][Arm][GAS] Add support for MVE instructions: vmov Andre Vieira (lists)
2019-05-01 17:05 ` Andre Vieira (lists) [this message]
2019-05-01 17:06 ` [PATCH 12/57][Arm][GAS] Add support for MVE instructions: vaddlv and vaddv Andre Vieira (lists)
2019-05-01 17:07 ` [PATCH 13/57][Arm][GAS] Add support for MVE instructions: vand, vbic, vorr, vorn and veor Andre Vieira (lists)
2019-05-01 17:08 ` [PATCH 14/57][Arm][GAS] Add support for MVE instructions: vcadd, vcmla and vcmul Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 16/57][Arm][GAS] Add support for MVE instructions: vdup, vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 15/57][Arm][GAS] Add support for MVE instructions: vcls, vclz and vfmas Andre Vieira (lists)
2019-05-01 17:11 ` [PATCH 17/57][Arm][GAS] Add support for MVE instructions: vfma and vfms Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 19/57][Arm][GAS] Add support for MVE instructions: vmax[nm][a] and vmin[nm][a] Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 18/57][Arm][GAS] Add support for MVE instructions: vhcadd, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 21/57][Arm][GAS] Add support for MVE instructions: vmaxv, vmaxav, vminv and vminav Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 20/57][Arm][GAS] Add support for MVE instructions: vmaxnmv, vmaxnmav, vminnmv and vminnmav Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 23/57][Arm][GAS] Add support for MVE instructions: vmla, vmul, vqadd and vqsub Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 22/57][Arm][GAS] Add support for MVE instructions: vmlaldav, vmlalv, vmlsldav, vrmlaldavh, vrmlalvh and vrmlsldavh Andre Vieira (lists)
2019-05-01 17:16 ` [PATCH 24/57][Arm][GAS] Add support for MVE instructions: vmlas, vmulh and vrmulh Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 25/57][Arm][GAS] Add support for MVE instruction: vmvn, vqabs and vqneg Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 26/57][Arm][GAS] Add support for MVE instructions: vpnot and vpsel Andre Vieira (lists)
2019-05-01 17:18 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:19 ` [PATCH 28/57][Arm][GAS] Add support for MVE instructions: vqdmlah, vqrdmlah, vqdmlash, vqrdmlash, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:30 ` [PATCH 27/57][Arm][GAS] Add support for MVE instructions: vqdmladh, vqrdmladh, vqdmlsdh and vqrdmlsdh Andre Vieira (lists)
2019-05-01 17:31 ` [PATCH 29/57][Arm][GAS] Add support for MVE instructions: vqdmullt and vqdmullb Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 31/57][Arm][GAS] Add support for MVE instructions: vshrn[tb], vrshrn[tb], vqshrn[tb], vqshrun[tb], vqrshrn[tb] and vqrshrun[tb] Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 30/57][Arm][GAS] Add support for MVE instructions: vqmovnt, vqmovnb, vqmovunt, vqmovunb, vqrshl and vrshl Andre Vieira (lists)
2019-05-01 17:33 ` [PATCH 32/57][Arm][GAS] Add support for MVE instructions: vrintn, vrintx, vrinta, vrintz, vrintm and vrintp Andre Vieira (lists)
2019-05-01 17:34 ` [PATCH 34/57][Arm][GAS] Add support for MVE instructions: vshl and vqshl Andre Vieira (lists)
2019-05-01 17:34 ` [PATCH 33/57][Arm][GAS] Add support for MVE instructions: vshr, vrshr, vsli, vsri, vrev16, vrev32 and vrev64 Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 36/57][Arm][GAS] Add support for MVE instructions: wlstp, dlstp, letp and lctp Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 35/57][Arm][GAS] Add support for MVE instructions: vshlc and vshll Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructions Andre Vieira (lists)
2019-05-01 17:39 ` [PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmp Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst[24] Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfma, vfms, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:41 ` [PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and vstr[bhw] Andre Vieira (lists)
2019-05-01 17:42 ` [PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores and gather loads Andre Vieira (lists)
2019-05-01 17:43 ` [PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint Andre Vieira (lists)
2019-05-02 9:54 ` Nick Clifton
2019-05-13 13:38 ` Andre Vieira (lists)
2019-05-01 17:44 ` [PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vorr, vorn, vmovx and vbic Andre Vieira (lists)
2019-05-01 17:44 ` [PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, vqdmull, vqmovn, vqmovun and vmovn Andre Vieira (lists)
2019-05-01 17:45 ` [PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav, vmladav, vmlas, vrmlsldavh, vmlsldav, vmlsdav, vrmlaldavh, vqdmlah, vqrdmlash, vqrdmlash, vqdmlsdh, vqrdmlsdh, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructions Andre Vieira (lists)
2019-05-01 17:47 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wlstp and dlstp Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, vabd, vabs, vadd, vsbc and vsub Andre Vieira (lists)
2019-05-01 17:49 ` [PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vcls, vclz and vctp Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vrmulh and vneg Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a)v, vmaxnm(a), vmaxnm(a)v, vmin(a), vmin(a)v, vminnm(a), vminnm(a)v and vmla Andre Vieira (lists)
2019-05-01 17:51 ` [PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, vqabs, vqadd, vqsub, vqneg and vrev Andre Vieira (lists)
2019-05-01 18:23 ` [PATCH 57/57][Arm][GAS] MVE Tests Andre Vieira (lists)
2019-05-01 18:24 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-02 10:03 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
2019-05-02 10:18 ` Nick Clifton
2019-05-13 13:39 ` [PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWS Andre Vieira (lists)
2019-05-02 13:39 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
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