* [Patch] Fix for bug 3000
@ 2006-08-15 0:41 Meissner, Michael
2006-08-16 21:58 ` Daniel Jacobowitz
0 siblings, 1 reply; 2+ messages in thread
From: Meissner, Michael @ 2006-08-15 0:41 UTC (permalink / raw)
To: binutils
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I committed the enclosed patch that Dwarak Rajagopal has submitted and
was approved by H. J.
--
Michael Meissner
AMD, MS 83-29
90 Central Street
Boxborough, MA 01719
[-- Attachment #2: binutils-3000.patch --]
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==================== opcodes changes
2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-dis.c (MXC,EMC): Define.
(OP_MXC): New function to handle cvt* (convert instructions) between
%xmm and %mm register correctly.
(OP_EMC): ditto.
(prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
with EMC/MXC.
==================== gas/testsuite changes
2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* sse2.d : Fixed the correct result for cvtpi2pd,cvtpd2pi
and cvttpd2pi.
diff -puwr --exclude='*.gmo' --exclude='*.info' binutils/gas/testsuite/gas/i386/sse2.d binutils-fix/gas/testsuite/gas/i386/sse2.d
--- binutils/gas/testsuite/gas/i386/sse2.d 2006-08-02 15:22:30.363151000 -0500
+++ binutils-fix/gas/testsuite/gas/i386/sse2.d 2006-08-02 15:24:44.640182000 -0500
@@ -61,16 +61,16 @@ Disassembly of section .text:
[ ]+f5: f2 0f c2 f8 07[ ]+cmpordsd %xmm0,%xmm7
[ ]+fa: 66 0f 2f c1[ ]+comisd %xmm1,%xmm0
[ ]+fe: 66 0f 2f 0a[ ]+comisd \(%edx\),%xmm1
- 102: 66 0f 2a d3[ ]+cvtpi2pd %xmm3,%xmm2
+ 102: 66 0f 2a d3[ ]+cvtpi2pd %mm3,%xmm2
106: 66 0f 2a 1c 24[ ]+cvtpi2pd \(%esp\),%xmm3
10b: f2 0f 2a e5[ ]+cvtsi2sd %ebp,%xmm4
10f: f2 0f 2a 2e[ ]+cvtsi2sd \(%esi\),%xmm5
- 113: 66 0f 2d f7[ ]+cvtpd2pi %xmm7,%xmm6
- 117: 66 0f 2d 38[ ]+cvtpd2pi \(%eax\),%xmm7
+ 113: 66 0f 2d f7[ ]+cvtpd2pi %xmm7,%mm6
+ 117: 66 0f 2d 38[ ]+cvtpd2pi \(%eax\),%mm7
11b: f2 0f 2d 01[ ]+cvtsd2si \(%ecx\),%eax
11f: f2 0f 2d ca[ ]+cvtsd2si %xmm2,%ecx
- 123: 66 0f 2c 13[ ]+cvttpd2pi \(%ebx\),%xmm2
- 127: 66 0f 2c dc[ ]+cvttpd2pi %xmm4,%xmm3
+ 123: 66 0f 2c 13[ ]+cvttpd2pi \(%ebx\),%mm2
+ 127: 66 0f 2c dc[ ]+cvttpd2pi %xmm4,%mm3
12b: f2 0f 2c 65 00[ ]+cvttsd2si 0x0\(%ebp\),%esp
130: f2 0f 2c ee[ ]+cvttsd2si %xmm6,%ebp
134: 66 0f 5e c1[ ]+divpd[ ]+%xmm1,%xmm0
diff -puwr --exclude='*.gmo' --exclude='*.info' binutils/opcodes/i386-dis.c binutils-fix/opcodes/i386-dis.c
--- binutils/opcodes/i386-dis.c 2006-08-02 15:22:07.698332000 -0500
+++ binutils-fix/opcodes/i386-dis.c 2006-08-03 08:54:33.143106000 -0500
@@ -85,6 +85,8 @@ static void OP_MMX (int, int);
static void OP_XMM (int, int);
static void OP_EM (int, int);
static void OP_EX (int, int);
+static void OP_EMC (int,int);
+static void OP_MXC (int,int);
static void OP_MS (int, int);
static void OP_XS (int, int);
static void OP_M (int, int);
@@ -312,6 +314,8 @@ fetch_data (struct disassemble_info *inf
#define EX OP_EX, v_mode
#define MS OP_MS, v_mode
#define XS OP_XS, v_mode
+#define EMC OP_EMC, v_mode
+#define MXC OP_MXC, 0
#define VM OP_VMX, q_mode
#define OPSUF OP_3DNowSuffix, 0
#define OPSIMD OP_SIMD_Suffix, 0
@@ -1569,23 +1573,23 @@ static const struct dis386 prefix_user_t
},
/* PREGRP2 */
{
- { "cvtpi2ps", XM, EM, XX, XX },
+ { "cvtpi2ps", XM, EMC, XX, XX },
{ "cvtsi2ssY", XM, Ev, XX, XX },
- { "cvtpi2pd", XM, EM, XX, XX },
+ { "cvtpi2pd", XM, EMC, XX, XX },
{ "cvtsi2sdY", XM, Ev, XX, XX },
},
/* PREGRP3 */
{
- { "cvtps2pi", MX, EX, XX, XX },
+ { "cvtps2pi", MXC, EX, XX, XX },
{ "cvtss2siY", Gv, EX, XX, XX },
- { "cvtpd2pi", MX, EX, XX, XX },
+ { "cvtpd2pi", MXC, EX, XX, XX },
{ "cvtsd2siY", Gv, EX, XX, XX },
},
/* PREGRP4 */
{
- { "cvttps2pi", MX, EX, XX, XX },
+ { "cvttps2pi", MXC, EX, XX, XX },
{ "cvttss2siY", Gv, EX, XX, XX },
- { "cvttpd2pi", MX, EX, XX, XX },
+ { "cvttpd2pi", MXC, EX, XX, XX },
{ "cvttsd2siY", Gv, EX, XX, XX },
},
/* PREGRP5 */
@@ -4362,6 +4366,41 @@ OP_EM (int bytemode, int sizeflag)
oappend (scratchbuf + intel_syntax);
}
+/* cvt* are the only instructions in sse2 which have
+ both SSE and MMX operands and also have 0x66 prefix
+ in their opcode. 0x66 was originally used to differentiate
+ between SSE and MMX instruction(operands). So we have to handle the
+ cvt* separately using OP_EMC and OP_MXC */
+static void
+OP_EMC (int bytemode, int sizeflag)
+{
+ if (mod != 3)
+ {
+ if (intel_syntax && bytemode == v_mode)
+ {
+ bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ OP_E (bytemode, sizeflag);
+ return;
+ }
+
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ sprintf (scratchbuf, "%%mm%d", rm);
+ oappend (scratchbuf + intel_syntax);
+}
+
+static void
+OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+{
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ sprintf (scratchbuf, "%%mm%d", reg);
+ oappend (scratchbuf + intel_syntax);
+}
+
static void
OP_EX (int bytemode, int sizeflag)
{
Only in binutils-fix/opcodes: i386-dis.c~
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Patch] Fix for bug 3000
2006-08-15 0:41 [Patch] Fix for bug 3000 Meissner, Michael
@ 2006-08-16 21:58 ` Daniel Jacobowitz
0 siblings, 0 replies; 2+ messages in thread
From: Daniel Jacobowitz @ 2006-08-16 21:58 UTC (permalink / raw)
To: Meissner, Michael; +Cc: binutils
On Mon, Aug 14, 2006 at 07:53:59PM -0400, Meissner, Michael wrote:
> I committed the enclosed patch that Dwarak Rajagopal has submitted and
> was approved by H. J.
Thanks. Could you also please correct the GNU formatting problems with
this patch?
- Two spaces, not a tab, in the ChangeLog header; the opcodes/ChangeLog
entry doesn't look like the rest of the file.
- Capital letters at the beginning of ChangeLog entries (": Ditto.").
- Consistent English spacing in changelog entries:
> * i386-dis.c (MXC,EMC): Define.
Space after comma.
> (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
> instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
> with EMC/MXC.
Spaces after commas, no double spaces between words. I'm not sure what
this entry actually says, but then I don't speak x86, so that's not a
problem :-)
> +static void OP_EMC (int,int);
> +static void OP_MXC (int,int);
Spaces after commas again.
> +/* cvt* are the only instructions in sse2 which have
> + both SSE and MMX operands and also have 0x66 prefix
> + in their opcode. 0x66 was originally used to differentiate
> + between SSE and MMX instruction(operands). So we have to handle the
> + cvt* separately using OP_EMC and OP_MXC */
Two spaces between sentences, periods at the end of comments. Probably
a space before the beginning parenthesis?
--
Daniel Jacobowitz
CodeSourcery
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2006-08-16 21:58 ` Daniel Jacobowitz
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