From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 62CA23889E1E for ; Fri, 25 Nov 2022 02:17:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 62CA23889E1E Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id C2114300089; Fri, 25 Nov 2022 02:17:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1669342663; bh=gOsIfNNC+9ioZW0e64w7HHq97eij6EIv+myTakNVVMM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=LLp/J/DRWEJpZYuc+IQzUFFV8TF683z/C4zwlodnJC9H3nf4WEDrFf0x+SP49VwQ+ ga0yVA2EgyQgRmxDPSmyg0Vxvzucxmp+ekqNxsapuAZ1eKTxJFzTDuatH0mQTChLQF C9vqyuvLFXd+HzZp5E021eZSKAyZ7on7KfrZBkwA= From: Tsukasa OI To: Tsukasa OI , Jan Beulich , Nelson Chu Cc: binutils@sourceware.org Subject: [PATCH v3 1/2] RISC-V: Better support for long instructions (disassembler) Date: Fri, 25 Nov 2022 02:17:23 +0000 Message-Id: <66ca80358f78d66d66bbf390fc0be8bec8183e93.1669342633.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tsukasa OI Commit bb996692bd96 ("RISC-V/gas: allow generating up to 176-bit instructions with .insn") tried to start supporting long instructions but it was insufficient. 1. On the disassembler, disassembler dump was limited up to 64-bit. For long (unknown) instructions, instruction bits are incorrectly zeroed out. To solve these problems, this commit adds packet argument to support dumping instructions longer than 64-bits. This commit will be tested on the next commit "RISC-V: Better support for long instructions (assembler)". opcodes/ChangeLog: * riscv-dis.c (riscv_disassemble_insn): Print unknown instruction using the new argument packet. (riscv_disassemble_data): Add unused argument packet. (print_insn_riscv): Pass packet to the disassemble function. --- opcodes/riscv-dis.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 3a31647a2f80..59ebbaf13417 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -641,7 +641,10 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info this is little-endian code. */ static int -riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) +riscv_disassemble_insn (bfd_vma memaddr, + insn_t word, + const bfd_byte *packet, + disassemble_info *info) { const struct riscv_opcode *op; static bool init = false; @@ -806,8 +809,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) ", "); (*info->fprintf_styled_func) (info->stream, dis_style_immediate, "0x%02x", - (unsigned int) (word & 0xff)); - word >>= 8; + (unsigned int) (*packet++)); } } break; @@ -983,6 +985,7 @@ riscv_data_length (bfd_vma memaddr, static int riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED, insn_t data, + const bfd_byte *packet ATTRIBUTE_UNUSED, disassemble_info *info) { info->display_endian = info->endian; @@ -1037,7 +1040,7 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info) bfd_vma dump_size; int status; enum riscv_seg_mstate mstate; - int (*riscv_disassembler) (bfd_vma, insn_t, struct disassemble_info *); + int (*riscv_disassembler) (bfd_vma, insn_t, const bfd_byte*, struct disassemble_info *); if (info->disassembler_options != NULL) { @@ -1081,7 +1084,7 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info) } insn = (insn_t) bfd_get_bits (packet, dump_size * 8, false); - return (*riscv_disassembler) (memaddr, insn, info); + return (*riscv_disassembler) (memaddr, insn, packet, info); } disassembler_ftype -- 2.38.1