From: Jan Beulich <jbeulich@suse.com>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH 3/8] x86: don't use opcode_length to identify pseudo prefixes
Date: Tue, 23 Mar 2021 08:36:17 +0100 [thread overview]
Message-ID: <66e56e87-11b9-0e9b-7212-a7af318a4eec@suse.com> (raw)
In-Reply-To: <CAMe9rOrm49Ybig9eBCAzqt78HWogAX=WmoXUtNu+DcdzR3Dtig@mail.gmail.com>
On 22.03.2021 18:55, H.J. Lu wrote:
> On Mon, Mar 22, 2021 at 9:43 AM Jan Beulich <jbeulich@suse.com> wrote:
>> --- a/opcodes/i386-opc.tbl
>> +++ b/opcodes/i386-opc.tbl
>> @@ -849,19 +849,19 @@ rex.wrb, 0x4d, None, 1, Cpu64, No_bSuf|N
>> rex.wrx, 0x4e, None, 1, Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> rex.wrxb, 0x4f, None, 1, Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>>
>> -// Pseudo prefixes (opcode_length == 0)
>> +// Pseudo prefixes (base_opcode == 0)
>>
>> -{disp8}, Prefix_Disp8, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{disp16}, Prefix_Disp16, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{disp32}, Prefix_Disp32, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{load}, Prefix_Load, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{store}, Prefix_Store, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{vex}, Prefix_VEX, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{vex2}, Prefix_VEX, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{vex3}, Prefix_VEX3, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{evex}, Prefix_EVEX, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{rex}, Prefix_REX, None, 0, Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> -{nooptimize}, Prefix_NoOptimize, None, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{disp8}, 0, Prefix_Disp8, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{disp16}, 0, Prefix_Disp16, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{disp32}, 0, Prefix_Disp32, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{load}, 0, Prefix_Load, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{store}, 0, Prefix_Store, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{vex}, 0, Prefix_VEX, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{vex2}, 0, Prefix_VEX, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{vex3}, 0, Prefix_VEX3, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{evex}, 0, Prefix_EVEX, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{rex}, 0, Prefix_REX, 0, Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>> +{nooptimize}, 0, Prefix_NoOptimize, 0, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsPrefix, {}
>
> Please define an opcode macro for pseudo prefix, something like
>
> #define PSEUDO_PREFIX 0
Sure. Seeing your request I'm actually considering to go further and
introduce a pseudo-prefix template. Would you be okay with this?
Jan
next prev parent reply other threads:[~2021-03-23 7:36 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-22 16:40 [PATCH 0/8] x86: work towards further opcode table compaction Jan Beulich
2021-03-22 16:42 ` [PATCH 1/8] x86: unbreak certain MPX insn operand forms Jan Beulich
2021-03-22 17:58 ` H.J. Lu
2021-03-22 16:42 ` [PATCH 2/8] x86: don't open-code PREFIX_NONE Jan Beulich
2021-03-22 17:58 ` H.J. Lu
2021-03-22 16:43 ` [PATCH 3/8] x86: don't use opcode_length to identify pseudo prefixes Jan Beulich
2021-03-22 17:55 ` H.J. Lu
2021-03-23 7:36 ` Jan Beulich [this message]
2021-03-23 12:05 ` H.J. Lu
2021-03-23 16:42 ` [PATCH v2] " Jan Beulich
2021-03-23 18:32 ` H.J. Lu
2021-03-22 16:44 ` [PATCH 5/8] x86: re-order two fields of struct insn_template Jan Beulich
2021-03-22 18:03 ` H.J. Lu
2021-03-22 16:45 ` [PATCH 6/8] x86: re-number PREFIX_0X<nn> Jan Beulich
2021-03-22 18:03 ` H.J. Lu
2021-03-22 16:46 ` [PATCH 7/8] x86: derive mandatory prefix attribute from base opcode Jan Beulich
2021-03-22 18:03 ` H.J. Lu
2021-03-23 16:36 ` Jan Beulich
2021-03-23 18:34 ` H.J. Lu
2021-03-24 7:27 ` Jan Beulich
2021-03-24 13:43 ` H.J. Lu
[not found] ` <65b17a6a-cc6a-a706-5e95-a7284c45beb1@suse.com>
2021-03-22 18:02 ` [PATCH 8/8] x86: derive opcode length from opcode value H.J. Lu
[not found] ` <f116024a-077d-c64e-f37c-1da8299272f0@suse.com>
2021-03-22 18:04 ` [PATCH 4/8] x86: split opcode prefix and opcode space representation H.J. Lu
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