From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id BE0A8385041B for ; Fri, 8 Jul 2022 10:25:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BE0A8385041B Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-619--_G6FaMNN9OmxANuSOTUxA-1; Fri, 08 Jul 2022 06:25:47 -0400 X-MC-Unique: -_G6FaMNN9OmxANuSOTUxA-1 Received: by mail-wm1-f72.google.com with SMTP id t4-20020a1c7704000000b003a2cfaeca37so827234wmi.5 for ; Fri, 08 Jul 2022 03:25:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=stI1rZT/Q8P6P88JHwcKJ6ZNd48qFKsgUJxJZ0ZoO3Y=; b=UaIrCO/7G+pGdik/E4zJbKvGYq/NqlrjwEwSXtvECig5xOEpTw5TAkorIW2KJrO8Lp K1YPN+ktNWiXLtbhP9pGnk4QM5RLaojdiLlKetdV2/jOaUJSsDiYYRL5hnPy7un6UTKt tdANPQypSZEJkE3lOYWLumRYPuaD/0Zn+Hf9f72RVIlwQf+bM19VHIgQuDkJ8nlIDd2J t/UAFDxZQ02hCx6ajejd+upuL8urO1KGFREaKAwZFwku25sy8dLg65kC9MzGMObfC+eE abICLtWjJ1l3SgSMvKRX2hNM75DSb94ccT730airw77k1R0EgbGmStGDIHz2z8ixVBrY +c3g== X-Gm-Message-State: AJIora9J2xzvjs0laS5tZq7s11DvvGDL/GS04YQ+JxpQlj60IyKe6Qdl NzURYuVPhgFk/ylgKuPJatT4QQSuTd3OOMSnqJRZmHZVYQ4WFDcexDbLq3NIDRPGybc+6/izYJw qo5iNPD7QWSAGCQqnKG8+xT8KWeCPc9AbWbOK2Kk75MaMjsLmvCkSUwso+EOoikaNTmrTzw== X-Received: by 2002:adf:e5c3:0:b0:21d:6be1:9c43 with SMTP id a3-20020adfe5c3000000b0021d6be19c43mr2522313wrn.625.1657275944414; Fri, 08 Jul 2022 03:25:44 -0700 (PDT) X-Google-Smtp-Source: AGRyM1v9tpWkGqwmTEMwUBZBoGXvHyKttT3lgvX4s6WvsO+3simVYjS8sJzpzNyYoVKld183eDspVg== X-Received: by 2002:adf:e5c3:0:b0:21d:6be1:9c43 with SMTP id a3-20020adfe5c3000000b0021d6be19c43mr2522289wrn.625.1657275944106; Fri, 08 Jul 2022 03:25:44 -0700 (PDT) Received: from localhost (15.72.115.87.dyn.plus.net. [87.115.72.15]) by smtp.gmail.com with ESMTPSA id k1-20020a05600c0b4100b003a2d45472b6sm1589461wmr.28.2022.07.08.03.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 03:25:43 -0700 (PDT) From: Andrew Burgess To: binutils@sourceware.org Cc: Andrew Burgess Subject: [PATCHv4 1/2] opcodes: add new sub-mnemonic disassembler style Date: Fri, 8 Jul 2022 11:25:39 +0100 Message-Id: <68e849a9a7464cf67dcbbd8f8d3fba627852edb6.1657275775.git.aburgess@redhat.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: References: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII"; x-default=true X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 Jul 2022 10:25:53 -0000 When adding libopcodes disassembler styling support for AArch64, it feels like the results would be improved by having a new sub-mnemonic style. This will be used in cases like: add w16, w7, w1, uxtb #2 ^^^^----- Here And: cinc w0, w1, ne ^^----- Here This commit just adds the new style, and prepares objdump to handle the style. A later commit will add AArch64 styling, and will actually make use of the style. As this style is currently unused, there should be no user visible changes after this commit. --- binutils/objdump.c | 2 ++ include/dis-asm.h | 7 +++++++ 2 files changed, 9 insertions(+) diff --git a/binutils/objdump.c b/binutils/objdump.c index 67824053527..4076587151c 100644 --- a/binutils/objdump.c +++ b/binutils/objdump.c @@ -2167,6 +2167,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) { case dis_style_symbol: color = 32; break; case dis_style_assembler_directive: + case dis_style_sub_mnemonic: case dis_style_mnemonic: color = 33; break; case dis_style_register: color = 34; break; case dis_style_address: @@ -2185,6 +2186,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) { case dis_style_symbol: color = 40; break; case dis_style_assembler_directive: + case dis_style_sub_mnemonic: case dis_style_mnemonic: color = 142; break; case dis_style_register: color = 27; break; case dis_style_address: diff --git a/include/dis-asm.h b/include/dis-asm.h index 4f91df12498..f1a83dc84e5 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -62,6 +62,13 @@ enum disassembler_style instructions. */ dis_style_mnemonic, + /* Some architectures include additional mnemonic like fields within the + instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where + the 'lsl' is an additional piece of text that describes how the + instruction should behave. This sub-mnemonic style can be used for + these pieces of text. */ + dis_style_sub_mnemonic, + /* For things that aren't real machine instructions, but rather assembler directives, e.g. .byte, etc. */ dis_style_assembler_directive, -- 2.25.4