From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 81883 invoked by alias); 11 Feb 2020 10:25:03 -0000 Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org Received: (qmail 81580 invoked by uid 89); 11 Feb 2020 10:24:57 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-9.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,SCC_5_SHORT_WORD_LINES,SPF_PASS autolearn=ham version=3.3.1 spammy=H*i:sk:1e1b8eb, H*MI:sk:1e1b8eb, H*f:sk:1e1b8eb X-HELO: mx2.suse.de Received: from mx2.suse.de (HELO mx2.suse.de) (195.135.220.15) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 11 Feb 2020 10:24:55 +0000 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 6F36CAE06; Tue, 11 Feb 2020 10:24:43 +0000 (UTC) Subject: [PATCH v5 1/5] x86: also disallow non-byte/-word registers with byte/word suffix From: Jan Beulich To: "binutils@sourceware.org" Cc: "H.J. Lu" References: <1e1b8eba-93ff-39ed-460a-a922d12af27e@suse.com> Message-ID: <6fbca201-5ae8-cf70-0614-f7f2efa6628f@suse.com> Date: Tue, 11 Feb 2020 10:25:00 -0000 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <1e1b8eba-93ff-39ed-460a-a922d12af27e@suse.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2020-02/txt/msg00166.txt.bz2 Along the lines of be4c5e58bd ("x86: Always disallow double word suffix with word general register") also adjust check_{byte,word}_reg(), to make overall behavior consistent again in this regard. gas/ 2020-02-XX Jan Beulich PR gas/25438 * config/tc-i386.c (REGISTER_WARNINGS): Delete. (check_byte_reg): Skip only source operand of CRC32. Drop Non- 64-bit-only warning. (check_word_reg): Consistently error on mismatching register size and suffix. * testsuite/gas/i386/general.s: Replace dword GPR with word one for movw. Replace suffix / GPR for orb. * testsuite/gas/i386/inval.s: Add tests for movw with dword and byte GPRs as well as ones for inb/outb with a word accumulator. * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l, testsuite/gas/i386/inval.l: Adjust expectations. --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -44,10 +44,6 @@ #endif #endif -#ifndef REGISTER_WARNINGS -#define REGISTER_WARNINGS 1 -#endif - #ifndef INFER_ADDR_PREFIX #define INFER_ADDR_PREFIX 1 #endif @@ -6637,31 +6633,10 @@ check_byte_reg (void) && i.tm.operand_types[op].bitfield.word) continue; - /* crc32 doesn't generate this warning. */ - if (i.tm.base_opcode == 0xf20f38f0) + /* crc32 only wants its source operand checked here. */ + if (i.tm.base_opcode == 0xf20f38f0 && op) continue; - if ((i.types[op].bitfield.word - || i.types[op].bitfield.dword - || i.types[op].bitfield.qword) - && i.op[op].regs->reg_num < 4 - /* Prohibit these changes in 64bit mode, since the lowering - would be more complicated. */ - && flag_code != CODE_64BIT) - { -#if REGISTER_WARNINGS - if (!quiet_warnings) - as_warn (_("using `%s%s' instead of `%s%s' due to `%c' suffix"), - register_prefix, - (i.op[op].regs + (i.types[op].bitfield.word - ? REGNAM_AL - REGNAM_AX - : REGNAM_AL - REGNAM_EAX))->reg_name, - register_prefix, - i.op[op].regs->reg_name, - i.suffix); -#endif - continue; - } /* Any other register is bad. */ if (i.types[op].bitfield.class == Reg || i.types[op].bitfield.class == RegMMX @@ -6817,29 +6792,17 @@ check_word_reg (void) i.suffix); return 0; } - /* Warn if the e or r prefix on a general reg is present. */ - else if ((!quiet_warnings || flag_code == CODE_64BIT) - && (i.types[op].bitfield.dword + /* Error if the e or r prefix on a general reg is present. */ + else if ((i.types[op].bitfield.dword || i.types[op].bitfield.qword) && (i.tm.operand_types[op].bitfield.class == Reg || i.tm.operand_types[op].bitfield.instance == Accum) && i.tm.operand_types[op].bitfield.word) { - /* Prohibit these changes in the 64bit mode, since the - lowering is more complicated. */ - if (flag_code == CODE_64BIT) - { - as_bad (_("incorrect register `%s%s' used with `%c' suffix"), - register_prefix, i.op[op].regs->reg_name, - i.suffix); - return 0; - } -#if REGISTER_WARNINGS - as_warn (_("using `%s%s' instead of `%s%s' due to `%c' suffix"), - register_prefix, - (i.op[op].regs + REGNAM_AX - REGNAM_EAX)->reg_name, - register_prefix, i.op[op].regs->reg_name, i.suffix); -#endif + as_bad (_("incorrect register `%s%s' used with `%c' suffix"), + register_prefix, i.op[op].regs->reg_name, + i.suffix); + return 0; } return 1; } --- a/gas/testsuite/gas/i386/general.l +++ b/gas/testsuite/gas/i386/general.l @@ -9,12 +9,6 @@ .*:25: Warning:.* .*:27: Warning:.* .*:29: Warning:.* -.*:48: Warning:.* -.*:51: Warning:.* -.*:124: Warning:.* -.*:125: Warning:.* -.*:126: Warning:.* -.*:127: Warning:.* .*:128: Warning:.* .*:129: Warning:.* .*:130: Warning:.* @@ -90,12 +84,10 @@ 45 008d 661F popw %ds 46 008f 668CD8 mov %ds,%ax 47 0092 668CD8 movw %ds,%ax - 48 0095 668CD8 movw %ds,%eax -.*Warning:.* + 48 0095 668CDF movw %ds,%di 49 0098 8ED8 mov %ax,%ds 50 009a 8ED8 movw %ax,%ds - 51 009c 8ED8 movw %eax,%ds -.*Warning:.* + 51 009c 8EDF movw %di,%ds 52 53 # test various pushes 54 009e 6A0A pushl \$10 @@ -167,15 +159,11 @@ 120 012e 0F9303 setaeb \(%ebx\) 121 0131 0F93C0 setae %al 122 - 123 #these should give warnings - 124 0134 0C01 orb \$1,%ax -.*Warning:.* - 125 0136 0C01 orb \$1,%eax -.*Warning:.* - 126 0138 80CB01 orb \$1,%bx -.*Warning:.* - 127 013b 80CB01 orb \$1,%ebx -.*Warning:.* + 123 0134 0C01 orb \$1,%al + 124 0136 0D000100 00 orl \$0x100,%eax + 125 013b 80CB01 orb \$1,%bl + 126 + 127 #these should give warnings 128 013e D9C1 fldl %st\(1\) .*Warning:.* 129 0140 DDD2 fstl %st\(2\) --- a/gas/testsuite/gas/i386/general.s +++ b/gas/testsuite/gas/i386/general.s @@ -45,10 +45,10 @@ popw %ds mov %ds,%ax movw %ds,%ax - movw %ds,%eax + movw %ds,%di mov %ax,%ds movw %ax,%ds - movw %eax,%ds + movw %di,%ds # test various pushes pushl $10 @@ -120,11 +120,11 @@ setaeb (%ebx) setae %al + orb $1,%al + orl $0x100,%eax + orb $1,%bl + #these should give warnings - orb $1,%ax - orb $1,%eax - orb $1,%bx - orb $1,%ebx fldl %st(1) fstl %st(2) fstpl %st(3) --- a/gas/testsuite/gas/i386/intelbad.l +++ b/gas/testsuite/gas/i386/intelbad.l @@ -154,7 +154,7 @@ .*:172: Error: .* .*:174: Error: .* .*:175: Error: .* -.*:176: Warning: .* +.*:176: Error: .* .*:177: Error: .* .*:178: Error: .* .*:180: Error: .* --- a/gas/testsuite/gas/i386/inval.l +++ b/gas/testsuite/gas/i386/inval.l @@ -91,6 +91,12 @@ .*:104: Error: .* .*:105: Error: .* .*:106: Error: .* +.*:108: Error: .* +.*:109: Error: .* +.*:110: Error: .* +.*:112: Error: .* +.*:113: Error: .* +.*:114: Error: .* GAS LISTING .* @@ -203,3 +209,14 @@ GAS LISTING .* [ ]*[1-9][0-9]*[ ]+movl %ds, %ax [ ]*[1-9][0-9]*[ ]+movl %ax, %ds [ ]*[1-9][0-9]*[ ]+movl %ax, %bx +[ ]*[1-9][0-9]*[ ]+ +[ ]*[1-9][0-9]*[ ]+movw %ds, %eax +[ ]*[1-9][0-9]*[ ]+movw %eax, %ds +[ ]*[1-9][0-9]*[ ]+movw %eax, %ebx +[ ]*[1-9][0-9]*[ ]+ +[ ]*[1-9][0-9]*[ ]+inb %dx, %ax +[ ]*[1-9][0-9]*[ ]+outb %ax, %dx +[ ]*[1-9][0-9]*[ ]+movb %ax, %bx + GAS LISTING .* + + --- a/gas/testsuite/gas/i386/inval.s +++ b/gas/testsuite/gas/i386/inval.s @@ -104,3 +104,11 @@ movnti word ptr [eax], ax movl %ds, %ax movl %ax, %ds movl %ax, %bx + + movw %ds, %eax + movw %eax, %ds + movw %eax, %ebx + + inb %dx, %ax + outb %ax, %dx + movb %ax, %bx