From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: binutils@sourceware.org
Subject: [PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, vqdmull, vqmovn, vqmovun and vmovn
Date: Wed, 01 May 2019 17:44:00 -0000 [thread overview]
Message-ID: <734602f2-761f-b93e-2db1-afbe4fa5de02@arm.com> (raw)
In-Reply-To: <19569550-4d2e-0bb3-592a-d91050d490f6@arm.com>
[-- Attachment #1: Type: text/plain, Size: 479 bytes --]
Hi,
This patch adds support for MVE instructions: VMOVL, VMULL, VQDMULL,
VQMOVN, VQMOVUN, and VMOVN.
opcodes/ChangeLog:
2019-05-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
Michael Collison <michael.collison@arm.com>
* arm-dis.c (enum mve_instructions): Add new instructions.
(is_mve_encoding_conflict): Handle new instructions.
(is_mve_undefined): Likewise.
(is_mve_unpredictable): Likewise.
(print_mve_size): Likewise.
(print_insn_mve): Likewise.
[-- Attachment #2: 46.patch --]
[-- Type: text/x-patch, Size: 6890 bytes --]
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index eb468afc2bc15725709bf9033e0b1288545429b4..e6383355496aa2ef8dc8dd5f5fc3bd1ffcb67905 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -144,6 +144,14 @@ enum mve_instructions
MVE_VBIC_IMM,
MVE_VBIC_REG,
MVE_VMOVX,
+ MVE_VMOVL,
+ MVE_VMOVN,
+ MVE_VMULL_INT,
+ MVE_VMULL_POLY,
+ MVE_VQDMULL_T1,
+ MVE_VQDMULL_T2,
+ MVE_VQMOVN,
+ MVE_VQMOVUN,
MVE_NONE
};
@@ -1913,6 +1921,7 @@ static const struct opcode32 neon_opcodes[] =
%B print v{st,ld}[24] any one operands
%E print vmov, vmvn, vorr, vbic encoded constant
%N print generic index for vmov
+ %T print bottom ('b') or top ('t') of source register
%<bitfield>r print as an ARM register
%<bitfield>d print the bitfield in decimal
@@ -2280,12 +2289,36 @@ static const struct mopcode32 mve_opcodes[] =
0xee100b10, 0xff100f1f,
"vmov%c.%u%5-6,21-22s\t%12-15r, %17-19,7Q[%N]"},
+ /* Vector VMOVL long. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VMOVL,
+ 0xeea00f40, 0xefa70fd1,
+ "vmovl%T%v.%u%19-20s\t%13-15,22Q, %1-3,5Q"},
+
+ /* Vector VMOV and narrow. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VMOVN,
+ 0xfe310e81, 0xffb30fd1,
+ "vmovn%T%v.i%18-19s\t%13-15,22Q, %1-3,5Q"},
+
/* Floating point move extract. */
{ARM_FEATURE_COPROC (FPU_MVE_FP),
MVE_VMOVX,
0xfeb00a40, 0xffbf0fd0,
"vmovx.f16\t%22,12-15F, %5,0-3F"},
+ /* Vector VMULL integer. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VMULL_INT,
+ 0xee010e00, 0xef810f51,
+ "vmull%T%v.%u%20-21s\t%13-15,22Q, %17-19,7Q, %1-3,5Q"},
+
+ /* Vector VMULL polynomial. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VMULL_POLY,
+ 0xee310e00, 0xefb10f51,
+ "vmull%T%v.%28s\t%13-15,22Q, %17-19,7Q, %1-3,5Q"},
+
/* Vector VMVN immediate to vector. */
{ARM_FEATURE_COPROC (FPU_MVE),
MVE_VMVN_IMM,
@@ -2310,6 +2343,30 @@ static const struct mopcode32 mve_opcodes[] =
0xef200150, 0xffb11f51,
"vorr%v\t%13-15,22Q, %17-19,7Q, %1-3,5Q"},
+ /* Vector VQDMULL T1 variant. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VQDMULL_T1,
+ 0xee300f01, 0xefb10f51,
+ "vqdmull%T%v.s%28s\t%13-15,22Q, %17-19,7Q, %1-3,5Q"},
+
+ /* Vector VQDMULL T2 variant. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VQDMULL_T2,
+ 0xee300f60, 0xefb10f70,
+ "vqdmull%T%v.s%28s\t%13-15,22Q, %17-19,7Q, %0-3r"},
+
+ /* Vector VQMOVN. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VQMOVN,
+ 0xee330e01, 0xefb30fd1,
+ "vqmovn%T%v.%u%18-19s\t%13-15,22Q, %1-3,5Q"},
+
+ /* Vector VQMOVUN. */
+ {ARM_FEATURE_COPROC (FPU_MVE),
+ MVE_VQMOVUN,
+ 0xee310e81, 0xffb30fd1,
+ "vqmovun%T%v.s%18-19s\t%13-15,22Q, %1-3,5Q"},
+
/* Vector VRINT floating point. */
{ARM_FEATURE_COPROC (FPU_MVE_FP),
MVE_VRINT_FP,
@@ -4420,6 +4477,7 @@ is_mve_encoding_conflict (unsigned long given,
else
return FALSE;
+ case MVE_VMULL_INT:
case MVE_VHADD_T2:
case MVE_VHSUB_T2:
case MVE_VCMP_VEC_T1:
@@ -4505,6 +4563,23 @@ is_mve_encoding_conflict (unsigned long given,
else
return FALSE;
+ case MVE_VMOVL:
+ {
+ unsigned long size = arm_decode_field (given, 19, 20);
+ if ((size == 0) || (size == 3))
+ return TRUE;
+ else
+ return FALSE;
+ }
+
+ case MVE_VMOVN:
+ case MVE_VQMOVUN:
+ case MVE_VQMOVN:
+ if (arm_decode_field (given, 18, 19) == 3)
+ return TRUE;
+ else
+ return FALSE;
+
default:
return FALSE;
@@ -4858,6 +4933,15 @@ is_mve_undefined (unsigned long given, enum mve_instructions matched_insn,
else
return FALSE;
+ case MVE_VMOVN:
+ if (arm_decode_field (given, 18, 19) == 2)
+ {
+ *undefined_code = UNDEF_SIZE_2;
+ return TRUE;
+ }
+ else
+ return FALSE;
+
default:
return FALSE;
}
@@ -5129,6 +5213,86 @@ is_mve_unpredictable (unsigned long given, enum mve_instructions matched_insn,
return FALSE;
}
+ case MVE_VMULL_INT:
+ {
+ unsigned long Qd;
+ unsigned long Qm;
+ unsigned long Qn;
+
+ if (arm_decode_field (given, 20, 21) == 2)
+ {
+ Qd = arm_decode_field_multiple (given, 13, 15, 22, 22);
+ Qm = arm_decode_field_multiple (given, 1, 3, 5, 5);
+ Qn = arm_decode_field_multiple (given, 17, 19, 7, 7);
+
+ if ((Qd == Qn) || (Qd == Qm))
+ {
+ *unpredictable_code = UNPRED_Q_REGS_EQ_AND_SIZE_2;
+ return TRUE;
+ }
+ else
+ return FALSE;
+ }
+ else
+ return FALSE;
+ }
+
+ case MVE_VQDMULL_T1:
+ {
+ unsigned long Qd;
+ unsigned long Qm;
+ unsigned long Qn;
+
+ if (arm_decode_field (given, 28, 28) == 1)
+ {
+ Qd = arm_decode_field_multiple (given, 13, 15, 22, 22);
+ Qm = arm_decode_field_multiple (given, 1, 3, 5, 5);
+ Qn = arm_decode_field_multiple (given, 17, 19, 7, 7);
+
+ if ((Qd == Qn) || (Qd == Qm))
+ {
+ *unpredictable_code = UNPRED_Q_REGS_EQ_AND_SIZE_1;
+ return TRUE;
+ }
+ else
+ return FALSE;
+ }
+ else
+ return FALSE;
+ }
+
+ case MVE_VQDMULL_T2:
+ {
+ unsigned long gpr = arm_decode_field (given, 0, 3);
+ if (gpr == 0xd)
+ {
+ *unpredictable_code = UNPRED_R13;
+ return TRUE;
+ }
+ else if (gpr == 0xf)
+ {
+ *unpredictable_code = UNPRED_R15;
+ return TRUE;
+ }
+
+ if (arm_decode_field (given, 28, 28) == 1)
+ {
+ unsigned long Qd
+ = arm_decode_field_multiple (given, 13, 15, 22, 22);
+ unsigned long Qn = arm_decode_field_multiple (given, 17, 19, 7, 7);
+
+ if ((Qd == Qn))
+ {
+ *unpredictable_code = UNPRED_Q_REGS_EQ_AND_SIZE_1;
+ return TRUE;
+ }
+ else
+ return FALSE;
+ }
+
+ return FALSE;
+ }
+
default:
return FALSE;
}
@@ -5807,6 +5971,24 @@ print_mve_size (struct disassemble_info *info,
func (stream, "16");
break;
+ case MVE_VMOVN:
+ case MVE_VQDMULL_T1:
+ case MVE_VQDMULL_T2:
+ case MVE_VQMOVN:
+ case MVE_VQMOVUN:
+ if (size == 0)
+ func (stream, "16");
+ else if (size == 1)
+ func (stream, "32");
+ break;
+
+ case MVE_VMOVL:
+ if (size == 1)
+ func (stream, "8");
+ else if (size == 2)
+ func (stream, "16");
+ break;
+
case MVE_VDUP:
switch (size)
{
@@ -5871,6 +6053,13 @@ print_mve_size (struct disassemble_info *info,
}
break;
+ case MVE_VMULL_POLY:
+ if (size == 0)
+ func (stream, "p8");
+ else if (size == 1)
+ func (stream, "p16");
+ break;
+
case MVE_VMVN_IMM:
switch (size)
{
@@ -7446,6 +7635,13 @@ print_insn_mve (struct disassemble_info *info, long given)
print_mve_vmov_index (info, given);
break;
+ case 'T':
+ if (arm_decode_field (given, 12, 12) == 0)
+ func (stream, "b");
+ else
+ func (stream, "t");
+ break;
+
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
{
next prev parent reply other threads:[~2019-05-01 17:44 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 16:51 [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 16:53 ` [PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fp Andre Vieira (lists)
2019-05-01 16:55 ` [PATCH 2/57][Arm][GAS] Add support for MVE instructions: vpst, vadd, vsub and vabd Andre Vieira (lists)
2019-05-02 10:56 ` Nick Clifton
2019-05-13 13:42 ` Andre Vieira (lists)
[not found] ` <98e50dc4-7b0e-d727-0c20-34711be86533@redhat.com>
[not found] ` <4e56a5f3-bcde-f4cd-21d4-35cc3f11b5e8@arm.com>
2019-05-14 16:53 ` Nick Clifton
2019-05-14 16:54 ` Nick Clifton
2019-05-01 16:56 ` [PATCH 3/57][Arm][GAS] Add support for MVE instructions: vabs and vneg Andre Vieira (lists)
2019-05-01 16:57 ` [PATCH 4/57][Arm][GAS] Add support for MVE instructions: vabav, vmladav and vmlsdav Andre Vieira (lists)
2019-05-01 16:59 ` [PATCH 5/57][Arm][GAS] Add support for MVE instructions: vmull{b,t} Andre Vieira (lists)
2019-05-01 17:00 ` [PATCH 6/57][Arm][GAS] Add support for MVE instructions: vst/vld{2,4} Andre Vieira (lists)
2019-05-01 17:01 ` [PATCH 7/57][Arm][GAS] Add support for MVE instructions: vstr/vldr Andre Vieira (lists)
2019-05-01 17:02 ` [PATCH 8/57][Arm][GAS] Add support for MVE instructions: vcvt Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 9/57][Arm][GAS] Add support for MVE instructions: vmov Andre Vieira (lists)
2019-05-01 17:03 ` [PATCH 10/57][Arm][GAS] Add support for MVE instructions: vcmp and vpt Andre Vieira (lists)
2019-05-01 17:05 ` [PATCH 11/57][Arm][GAS] Add support for MVE instructions: vadc, vsbc and vbrsr Andre Vieira (lists)
2019-05-01 17:06 ` [PATCH 12/57][Arm][GAS] Add support for MVE instructions: vaddlv and vaddv Andre Vieira (lists)
2019-05-01 17:07 ` [PATCH 13/57][Arm][GAS] Add support for MVE instructions: vand, vbic, vorr, vorn and veor Andre Vieira (lists)
2019-05-01 17:08 ` [PATCH 14/57][Arm][GAS] Add support for MVE instructions: vcadd, vcmla and vcmul Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 16/57][Arm][GAS] Add support for MVE instructions: vdup, vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:09 ` [PATCH 15/57][Arm][GAS] Add support for MVE instructions: vcls, vclz and vfmas Andre Vieira (lists)
2019-05-01 17:11 ` [PATCH 17/57][Arm][GAS] Add support for MVE instructions: vfma and vfms Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 18/57][Arm][GAS] Add support for MVE instructions: vhcadd, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:12 ` [PATCH 19/57][Arm][GAS] Add support for MVE instructions: vmax[nm][a] and vmin[nm][a] Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 20/57][Arm][GAS] Add support for MVE instructions: vmaxnmv, vmaxnmav, vminnmv and vminnmav Andre Vieira (lists)
2019-05-01 17:13 ` [PATCH 21/57][Arm][GAS] Add support for MVE instructions: vmaxv, vmaxav, vminv and vminav Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 22/57][Arm][GAS] Add support for MVE instructions: vmlaldav, vmlalv, vmlsldav, vrmlaldavh, vrmlalvh and vrmlsldavh Andre Vieira (lists)
2019-05-01 17:15 ` [PATCH 23/57][Arm][GAS] Add support for MVE instructions: vmla, vmul, vqadd and vqsub Andre Vieira (lists)
2019-05-01 17:16 ` [PATCH 24/57][Arm][GAS] Add support for MVE instructions: vmlas, vmulh and vrmulh Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 26/57][Arm][GAS] Add support for MVE instructions: vpnot and vpsel Andre Vieira (lists)
2019-05-01 17:17 ` [PATCH 25/57][Arm][GAS] Add support for MVE instruction: vmvn, vqabs and vqneg Andre Vieira (lists)
2019-05-01 17:18 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:19 ` [PATCH 28/57][Arm][GAS] Add support for MVE instructions: vqdmlah, vqrdmlah, vqdmlash, vqrdmlash, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:30 ` [PATCH 27/57][Arm][GAS] Add support for MVE instructions: vqdmladh, vqrdmladh, vqdmlsdh and vqrdmlsdh Andre Vieira (lists)
2019-05-01 17:31 ` [PATCH 29/57][Arm][GAS] Add support for MVE instructions: vqdmullt and vqdmullb Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 30/57][Arm][GAS] Add support for MVE instructions: vqmovnt, vqmovnb, vqmovunt, vqmovunb, vqrshl and vrshl Andre Vieira (lists)
2019-05-01 17:32 ` [PATCH 31/57][Arm][GAS] Add support for MVE instructions: vshrn[tb], vrshrn[tb], vqshrn[tb], vqshrun[tb], vqrshrn[tb] and vqrshrun[tb] Andre Vieira (lists)
2019-05-01 17:33 ` [PATCH 32/57][Arm][GAS] Add support for MVE instructions: vrintn, vrintx, vrinta, vrintz, vrintm and vrintp Andre Vieira (lists)
2019-05-01 17:34 ` [PATCH 34/57][Arm][GAS] Add support for MVE instructions: vshl and vqshl Andre Vieira (lists)
2019-05-01 17:34 ` [PATCH 33/57][Arm][GAS] Add support for MVE instructions: vshr, vrshr, vsli, vsri, vrev16, vrev32 and vrev64 Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 35/57][Arm][GAS] Add support for MVE instructions: vshlc and vshll Andre Vieira (lists)
2019-05-01 17:36 ` [PATCH 36/57][Arm][GAS] Add support for MVE instructions: wlstp, dlstp, letp and lctp Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructions Andre Vieira (lists)
2019-05-01 17:38 ` [PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in coprocessor instructions Andre Vieira (lists)
2019-05-01 17:39 ` [PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmp Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfma, vfms, vhadd, vhsub and vrhadd Andre Vieira (lists)
2019-05-01 17:40 ` [PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst[24] Andre Vieira (lists)
2019-05-01 17:41 ` [PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and vstr[bhw] Andre Vieira (lists)
2019-05-01 17:42 ` [PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores and gather loads Andre Vieira (lists)
2019-05-01 17:43 ` [PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint Andre Vieira (lists)
2019-05-02 9:54 ` Nick Clifton
2019-05-13 13:38 ` Andre Vieira (lists)
2019-05-01 17:44 ` Andre Vieira (lists) [this message]
2019-05-01 17:44 ` [PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vorr, vorn, vmovx and vbic Andre Vieira (lists)
2019-05-01 17:45 ` [PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav, vmladav, vmlas, vrmlsldavh, vmlsldav, vmlsdav, vrmlaldavh, vqdmlah, vqrdmlash, vqrdmlash, vqdmlsdh, vqrdmlsdh, vqdmulh and vqrdmulh Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructions Andre Vieira (lists)
2019-05-01 17:46 ` [PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, vidup and viwdup Andre Vieira (lists)
2019-05-01 17:47 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, vabd, vabs, vadd, vsbc and vsub Andre Vieira (lists)
2019-05-01 17:48 ` [PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wlstp and dlstp Andre Vieira (lists)
2019-05-01 17:49 ` [PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vcls, vclz and vctp Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a)v, vmaxnm(a), vmaxnm(a)v, vmin(a), vmin(a)v, vminnm(a), vminnm(a)v and vmla Andre Vieira (lists)
2019-05-01 17:50 ` [PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vrmulh and vneg Andre Vieira (lists)
2019-05-01 17:51 ` [PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, vqabs, vqadd, vqsub, vqneg and vrev Andre Vieira (lists)
2019-05-01 18:23 ` [PATCH 57/57][Arm][GAS] MVE Tests Andre Vieira (lists)
2019-05-01 18:24 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-01 18:25 ` Andre Vieira (lists)
2019-05-02 10:03 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
2019-05-02 10:18 ` Nick Clifton
2019-05-13 13:39 ` [PATCH, binutils, Arm] Add Armv8.1-M Mainline and MVE enablement to NEWS Andre Vieira (lists)
2019-05-02 13:39 ` [PATCH 0/57][Arm][binutils]: Add support for Armv8.1-M Mainline MVE instructions Nick Clifton
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