From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by sourceware.org (Postfix) with ESMTPS id 0804B386102F for ; Fri, 26 Mar 2021 13:50:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0804B386102F X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 24B0AAB8A; Fri, 26 Mar 2021 13:50:12 +0000 (UTC) Subject: [PATCH 7/7] x86: drop seg_entry To: Binutils References: <139e8ac5-fda2-caaf-39e0-35a56b1c0e0f@suse.com> From: Jan Beulich Message-ID: <751ab64f-f643-c79a-8f4b-1326a612f789@suse.com> Date: Fri, 26 Mar 2021 14:50:10 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: <139e8ac5-fda2-caaf-39e0-35a56b1c0e0f@suse.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3033.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Mar 2021 13:50:14 -0000 Use struct reg_entry instead for most purposes, with a separate array holding just the respective opcode prefix bytes. gas/ 2021-03-XX Jan Beulich * config/tc-i386.c (build_modrm_byte): Change return type. Change type of "default_seg". Use NULL. Adjust setting of "default_seg". (reg_ds, reg_es, reg_ss): New. (struct _i386_insn): Change type of seg[]. (md_begin): Initialize reg_ds, reg_es, and reg_ss. (swap_operands): Change type of "temp_seg". (check_string): Adjust %es check. (process_operands): Change type of "default_seg". Use NULL. Adjust segment override processing.. (i386_att_operand): Adjust segment override handling. * config/tc-i386-intel.c (i386_intel_operand): Likewise. opcodes/ 2021-03-XX Jan Beulich * i386-opc.c (cs, ds, ss, es, fs, gs): Delete. (i386_seg_prefixes): New. * i386-opc.h (cs, ds, ss, es, fs, gs): Delete. (i386_seg_prefixes): Declare. --- a/gas/config/tc-i386-intel.c +++ b/gas/config/tc-i386-intel.c @@ -1028,16 +1028,10 @@ i386_intel_operand (char *operand_string as_warn (_("redundant segment overrides")); break; } - switch (i386_regtab[expP->X_add_number].reg_num) - { - case 0: i.seg[i.mem_operands] = &es; break; - case 1: i.seg[i.mem_operands] = &cs; break; - case 2: i.seg[i.mem_operands] = &ss; break; - case 3: i.seg[i.mem_operands] = &ds; break; - case 4: i.seg[i.mem_operands] = &fs; break; - case 5: i.seg[i.mem_operands] = &gs; break; - case RegFlat: i.seg[i.mem_operands] = NULL; break; - } + if (i386_regtab[expP->X_add_number].reg_num == RegFlat) + i.seg[i.mem_operands] = NULL; + else + i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number]; } if (!i386_index_check (operand_string)) --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -190,7 +190,7 @@ static int check_qword_reg (void); static int check_word_reg (void); static int finalize_imm (void); static int process_operands (void); -static const seg_entry *build_modrm_byte (void); +static const reg_entry *build_modrm_byte (void); static void output_insn (void); static void output_imm (fragS *, offsetT); static void output_disp (fragS *, offsetT); @@ -215,6 +215,9 @@ static const reg_entry bad_reg = { "reg_num) + { + case 0: reg_es = regtab; break; + case 2: reg_ss = regtab; break; + case 3: reg_ds = regtab; break; + } + break; + case RegMask: if (!regtab->reg_num) reg_k0 = regtab; @@ -5522,7 +5534,7 @@ swap_operands (void) if (i.mem_operands == 2) { - const seg_entry *temp_seg; + const reg_entry *temp_seg; temp_seg = i.seg[0]; i.seg[0] = i.seg[1]; i.seg[1] = temp_seg; @@ -6752,7 +6764,7 @@ check_string (void) unsigned int es_op = i.tm.opcode_modifier.isstring - IS_STRING_ES_OP0; unsigned int op = i.tm.operand_types[0].bitfield.baseindex ? es_op : 0; - if (i.seg[op] != NULL && i.seg[op] != &es) + if (i.seg[op] != NULL && i.seg[op] != reg_es) { as_bad (_("`%s' operand %u must use `%ses' segment"), i.tm.name, @@ -7543,7 +7555,7 @@ process_operands (void) /* Default segment register this instruction will use for memory accesses. 0 means unknown. This is only for optimizing out unnecessary segment overrides. */ - const seg_entry *default_seg = 0; + const reg_entry *default_seg = NULL; if (i.tm.opcode_modifier.sse2avx) { @@ -7730,13 +7742,13 @@ process_operands (void) else if (i.tm.opcode_modifier.opcodespace == SPACE_BASE && (i.tm.base_opcode & ~3) == MOV_AX_DISP32) { - default_seg = &ds; + default_seg = reg_ds; } else if (i.tm.opcode_modifier.isstring) { /* For the string instructions that allow a segment override on one of their operands, the default segment is ds. */ - default_seg = &ds; + default_seg = reg_ds; } else if (i.short_form) { @@ -7789,9 +7801,9 @@ process_operands (void) point, and the specified segment prefix will always be used. */ if (i.seg[0] && i.seg[0] != default_seg - && i.seg[0]->seg_prefix != i.prefix[SEG_PREFIX]) + && i386_seg_prefixes[i.seg[0]->reg_num] != i.prefix[SEG_PREFIX]) { - if (!add_prefix (i.seg[0]->seg_prefix)) + if (!add_prefix (i386_seg_prefixes[i.seg[0]->reg_num])) return 0; } return 1; @@ -7816,10 +7828,10 @@ static INLINE void set_rex_vrex (const r i.vrex |= rex_bit; } -static const seg_entry * +static const reg_entry * build_modrm_byte (void) { - const seg_entry *default_seg = 0; + const reg_entry *default_seg = NULL; unsigned int source, dest; int vex_3_sources; @@ -8103,7 +8115,7 @@ build_modrm_byte (void) } } - default_seg = &ds; + default_seg = reg_ds; if (i.base_reg == 0) { @@ -8197,7 +8209,7 @@ build_modrm_byte (void) i.rm.regmem = i.index_reg->reg_num - 6; break; case 5: /* (%bp) */ - default_seg = &ss; + default_seg = reg_ss; if (i.index_reg == 0) { i.rm.regmem = 6; @@ -8258,7 +8270,7 @@ build_modrm_byte (void) if (!(i.base_reg->reg_flags & RegRex) && (i.base_reg->reg_num == EBP_REG_NUM || i.base_reg->reg_num == ESP_REG_NUM)) - default_seg = &ss; + default_seg = reg_ss; if (i.base_reg->reg_num == 5 && i.disp_operands == 0) { fake_zero_displacement = 1; @@ -11325,27 +11337,7 @@ i386_att_operand (char *operand_string) ++op_string; if (*op_string == ':' && r->reg_type.bitfield.class == SReg) { - switch (r->reg_num) - { - case 0: - i.seg[i.mem_operands] = &es; - break; - case 1: - i.seg[i.mem_operands] = &cs; - break; - case 2: - i.seg[i.mem_operands] = &ss; - break; - case 3: - i.seg[i.mem_operands] = &ds; - break; - case 4: - i.seg[i.mem_operands] = &fs; - break; - case 5: - i.seg[i.mem_operands] = &gs; - break; - } + i.seg[i.mem_operands] = r; /* Skip the ':' and whitespace. */ ++op_string; --- a/opcodes/i386-opc.c +++ b/opcodes/i386-opc.c @@ -23,10 +23,12 @@ #include "i386-opc.h" #include "i386-tbl.h" -/* Segment stuff. */ -const seg_entry cs = { "cs", 0x2e }; -const seg_entry ds = { "ds", 0x3e }; -const seg_entry ss = { "ss", 0x36 }; -const seg_entry es = { "es", 0x26 }; -const seg_entry fs = { "fs", 0x64 }; -const seg_entry gs = { "gs", 0x65 }; +/* To be indexed by segment register number. */ +const unsigned char i386_seg_prefixes[] = { + ES_PREFIX_OPCODE, + CS_PREFIX_OPCODE, + SS_PREFIX_OPCODE, + DS_PREFIX_OPCODE, + FS_PREFIX_OPCODE, + GS_PREFIX_OPCODE +}; --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -992,17 +992,4 @@ reg_entry; extern const reg_entry i386_regtab[]; extern const unsigned int i386_regtab_size; - -typedef struct -{ - char *seg_name; - unsigned int seg_prefix; -} -seg_entry; - -extern const seg_entry cs; -extern const seg_entry ds; -extern const seg_entry ss; -extern const seg_entry es; -extern const seg_entry fs; -extern const seg_entry gs; +extern const unsigned char i386_seg_prefixes[6];