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From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: YunQiang Su <yunqiang.su@cipunited.com>
Cc: Binutils <binutils@sourceware.org>, YunQiang Su <syq@debian.org>,
	"Maciej W. Rozycki" <macro@orcam.me.uk>,
	Xi Ruoyao <xry111@xry111.site>,
	richard.sandiford@arm.com
Subject: Re: [PATCH] MIPS: gas: alter 64 or 32 for r6 triples if march is implicit
Date: Sat, 6 May 2023 09:42:48 +0100	[thread overview]
Message-ID: <76C4F9A0-BE4B-444A-BC6E-04364EF8C268@flygoat.com> (raw)
In-Reply-To: <20230506083718.3669965-1-yunqiang.su@cipunited.com>



> 2023年5月6日 09:37,YunQiang Su <yunqiang.su@cipunited.com> 写道:
> 
> When configure with triples mipsisa[32,64]r6[el,], the march value
> is pinned to a fix value if not given explicitly. for example
>   mipsisa32r6-linux-gnu -n32 xx.s
> will complains that:
>   -march=mips32r6 is not compatible with the selected ABI
> 
> Since we are using these triples as a regular linux distributions,
> let's alter march according to ABI.

Hi,

Hmm, why people wants to build n32 binary on mips32r6 CPU?
For multiline folks they should use mipsisa64r6 base triple which will accept
all 3 ABIs.

Thanks
Jiaxun


> ---
> gas/config/tc-mips.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
> 
> diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
> index 8a970ceada2..d99736df26a 100644
> --- a/gas/config/tc-mips.c
> +++ b/gas/config/tc-mips.c
> @@ -20247,6 +20247,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
>     : ISA_MIPS1);
>     }
> 
> +  /* mipsisa32r6-linux-gnu refuses -n32/-64 swtiches:
> + -march=mips32r6 is not compatible with the selected ABI
> +     Let's workaround it when -march options are not given explicitly.
> +     We treat it some like -march=from-abi */
> +  if ((strcasecmp (cpu_string, "mips32r6") == 0 || strcasecmp (cpu_string, "mips64r6") == 0)
> + && strcasecmp (option, "default CPU") == 0)
> +    {
> +      if (ABI_NEEDS_32BIT_REGS (mips_abi))
> + return mips_cpu_info_from_isa (ISA_MIPS32R6);
> +
> +      if (ABI_NEEDS_64BIT_REGS (mips_abi))
> + return mips_cpu_info_from_isa (ISA_MIPS64R6);
> +
> +      if (file_mips_opts.gp >= 0)
> + return mips_cpu_info_from_isa (file_mips_opts.gp == 32
> +       ? ISA_MIPS32R6 : ISA_MIPS64R6);
> +    }
> +
>   /* 'default' has traditionally been a no-op.  Probably not very useful.  */
>   if (strcasecmp (cpu_string, "default") == 0)
>     return 0;
> -- 
> 2.30.2
> 


  reply	other threads:[~2023-05-06  8:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-06  8:37 YunQiang Su
2023-05-06  8:42 ` Jiaxun Yang [this message]
2023-05-06  8:52   ` YunQiang Su
2023-05-06  9:15     ` Jiaxun Yang
2023-05-07 18:17       ` Maciej W. Rozycki
2023-05-07 18:34         ` Jiaxun Yang
2023-05-07 19:01           ` Maciej W. Rozycki
2023-05-08  9:16             ` YunQiang Su
2023-05-08 12:25               ` Maciej W. Rozycki
2023-05-08 13:00                 ` YunQiang Su
2023-05-08 14:43                   ` Maciej W. Rozycki
2023-05-08 19:06                     ` Maciej W. Rozycki
2023-05-09  3:16                       ` YunQiang Su
2023-05-09  7:58                         ` Richard Sandiford
2023-05-08  9:18           ` YunQiang Su
2023-05-08  9:39           ` Andreas Schwab
2023-05-08 10:51             ` YunQiang Su

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