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X-Spam-Status: No, score=-13.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 7/25/23 13:44, Jose E. Marchesi wrote: > > Hi David. > > Thanks for the patch. > OK. Pushed, thanks. > >> This patch updates the pseudo-C dialect templates for the BPF v3 atomic >> instructions. The templates match the strings emitted by clang -S for >> these instructions. >> >> The tests and documentation are updated accordingly. >> >> gas/ >> * doc/c-bpf.texi (BPF Instructions): Update entries for atomic >> and 32-bit atomic instructions. >> * testsuite/gas/bpf/atomic.s: Test AAND, AAND32, AOR, AOR32, >> AXOR, AXOR32, AFADD, AFADD32, AFAND, AFAND32, AFOR, AFOR32, >> AFXOR and AFXOR32 instructions. >> * testsuite/gas/bpf/atomic.d: Likewise. >> * testsuite/gas/bpf/atomic-be.d: Likewise. >> * testsuite/gas/bpf/atomic-pseudoc.s: Likewise. >> * testsuite/gas/bpf/atomic-pseudoc.d: Likewise. >> * testsuite/gas/bpf/atomic-be-pseudoc.d: Likewise. >> * testsuite/gas/bpf/atomic-v1.s: New test. >> * testsuite/gas/bpf/atomic-v1.d: Likewise. >> * testuiste/gas/bpf/atomic-v1-be.d: Likewise. >> * testuiste/gas/bpf/bpf.exp: Run new tests. >> >> opcodes/ >> * bpf-opc.c (bpf_opcodes): Update pseudo-C dialect templates for: >> BPF_INSN_AADD, BPF_INSN_AOR, BPF_INSN_AAND, BPF_INSN_AXOR, >> BPF_INSN_AFADD, BPF_INSN_AFOR, BPF_INSN_AFAND, BPF_INSN_AFXOR, >> BPF_INSN_AADD32, BPF_INSN_AOR32, BPF_INSN_AAND32, >> BPF_INSN_AXOR32, BPF_INSN_AFADD32, BPF_INSN_AFOR32, >> BPF_INSN_AFAND32, and BPF_INSN_AFXOR32 instructions. >> --- >> gas/doc/c-bpf.texi | 46 +++++++++++------------ >> gas/testsuite/gas/bpf/atomic-be-pseudoc.d | 20 +++++++++- >> gas/testsuite/gas/bpf/atomic-be.d | 20 ++++++++-- >> gas/testsuite/gas/bpf/atomic-pseudoc.d | 20 +++++++++- >> gas/testsuite/gas/bpf/atomic-pseudoc.s | 22 +++++++++-- >> gas/testsuite/gas/bpf/atomic-v1-be.d | 12 ++++++ >> gas/testsuite/gas/bpf/atomic-v1.d | 12 ++++++ >> gas/testsuite/gas/bpf/atomic-v1.s | 5 +++ >> gas/testsuite/gas/bpf/atomic.d | 14 +++++++ >> gas/testsuite/gas/bpf/atomic.s | 18 ++++++++- >> gas/testsuite/gas/bpf/bpf.exp | 2 + >> opcodes/bpf-opc.c | 32 ++++++++-------- >> 12 files changed, 171 insertions(+), 52 deletions(-) >> create mode 100644 gas/testsuite/gas/bpf/atomic-v1-be.d >> create mode 100644 gas/testsuite/gas/bpf/atomic-v1.d >> create mode 100644 gas/testsuite/gas/bpf/atomic-v1.s >> >> diff --git a/gas/doc/c-bpf.texi b/gas/doc/c-bpf.texi >> index 4cb15616515..689786e81d5 100644 >> --- a/gas/doc/c-bpf.texi >> +++ b/gas/doc/c-bpf.texi >> @@ -750,43 +750,41 @@ for swapping 64-bit quantities and another for 32-bit quantities. >> >> @table @code >> @item aadd [rd + offset16], rs >> -@itemx *(u64 *)(rd + offset16) = rs >> +@itemx lock *(u64 *)(rd + offset16) = rs >> Atomic add instruction. >> >> @item aor [rd + offset16], rs >> -@itemx *(u64 *) (rd + offset16) |= rs >> +@itemx lock *(u64 *) (rd + offset16) |= rs >> Atomic or instruction. >> >> @item aand [rd + offset16], rs >> -@itemx *(u64 *) (rd + offset16) &= rs >> +@itemx lock *(u64 *) (rd + offset16) &= rs >> Atomic and instruction. >> >> @item axor [rd + offset16], rs >> -@itemx *(u64 *) (rd + offset16) ^= rs >> -Atomic xor instruction >> -@item xaddw [%d+offset16],%s >> -Exchange-and-add a 32-bit value at the specified location. >> +@itemx lock *(u64 *) (rd + offset16) ^= rs >> +Atomic xor instruction. >> @end table >> >> @noindent >> The following variants perform fetching before the atomic operation. >> >> @table @code >> -@item afadd [dr + offset16], rs >> -@itemx ??? >> +@item afadd [rd + offset16], rs >> +@itemx rs = atomic_fetch_add ((u64 *)(rd + offset16), rs) >> Atomic fetch-and-add instruction. >> >> -@item afor [dr + offset16], rs >> -@itemx ??? >> +@item afor [rd + offset16], rs >> +@itemx rs = atomic_fetch_or ((u64 *)(rd + offset16), rs) >> Atomic fetch-and-or instruction. >> >> -@item afand [dr + offset16], rs >> -@itemx ??? >> +@item afand [rd + offset16], rs >> +@itemx rs = atomic_fetch_and ((u64 *)(rd + offset16), rs) >> Atomic fetch-and-and instruction. >> >> -@item afxor [dr + offset16], rs >> -@itemx ??? >> -Atomic fetch-and-or instruction >> +@item afxor [rd + offset16], rs >> +@itemx rs = atomic_fetch_xor ((u64 *)(rd + offset16), rs) >> +Atomic fetch-and-or instruction. >> @end table >> >> The above instructions were introduced in the V3 of the BPF >> @@ -805,19 +803,19 @@ for swapping 32-bit quantities and another for 32-bit quantities. >> >> @table @code >> @item aadd32 [rd + offset16], rs >> -@itemx *(u32 *)(rd + offset16) = rs >> +@itemx lock *(u32 *)(rd + offset16) = rs >> Atomic add instruction. >> >> @item aor32 [rd + offset16], rs >> -@itemx *(u32 *) (rd + offset16) |= rs >> +@itemx lock *(u32 *) (rd + offset16) |= rs >> Atomic or instruction. >> >> @item aand32 [rd + offset16], rs >> -@itemx *(u32 *) (rd + offset16) &= rs >> +@itemx lock *(u32 *) (rd + offset16) &= rs >> Atomic and instruction. >> >> @item axor32 [rd + offset16], rs >> -@itemx *(u32 *) (rd + offset16) ^= rs >> +@itemx lock *(u32 *) (rd + offset16) ^= rs >> Atomic xor instruction >> @end table >> >> @@ -826,19 +824,19 @@ The following variants perform fetching before the atomic operation. >> >> @table @code >> @item afadd32 [dr + offset16], rs >> -@itemx ??? >> +@itemx ws = atomic_fetch_add ((u32 *)(rd + offset16), ws) >> Atomic fetch-and-add instruction. >> >> @item afor32 [dr + offset16], rs >> -@itemx ??? >> +@itemx ws = atomic_fetch_or ((u32 *)(rd + offset16), ws) >> Atomic fetch-and-or instruction. >> >> @item afand32 [dr + offset16], rs >> -@itemx ??? >> +@itemx ws = atomic_fetch_and ((u32 *)(rd + offset16), ws) >> Atomic fetch-and-and instruction. >> >> @item afxor32 [dr + offset16], rs >> -@itemx ??? >> +@itemx ws = atomic_fetch_xor ((u32 *)(rd + offset16), ws) >> Atomic fetch-and-or instruction >> @end table >> >> diff --git a/gas/testsuite/gas/bpf/atomic-be-pseudoc.d b/gas/testsuite/gas/bpf/atomic-be-pseudoc.d >> index a57322e49d9..e0da408ca5a 100644 >> --- a/gas/testsuite/gas/bpf/atomic-be-pseudoc.d >> +++ b/gas/testsuite/gas/bpf/atomic-be-pseudoc.d >> @@ -8,5 +8,21 @@ >> Disassembly of section .text: >> >> 0+ <.text>: >> - 0: db 12 1e ef 00 00 00 00 \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> - 8: c3 12 1e ef 00 00 00 00 \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 0: db 12 1e ef 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> + 8: c3 12 1e ef 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 10: db 12 1e ef 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> + 18: c3 12 1e ef 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 20: db 12 1e ef 00 00 00 50 lock \*\(u64\*\)\(r1\+0x1eef\)\&=r2 >> + 28: c3 12 1e ef 00 00 00 50 lock \*\(u32\*\)\(r1\+0x1eef\)\&=r2 >> + 30: db 12 1e ef 00 00 00 40 lock \*\(u64\*\)\(r1\+0x1eef\)\|=r2 >> + 38: c3 12 1e ef 00 00 00 40 lock \*\(u32\*\)\(r1\+0x1eef\)\|=r2 >> + 40: db 12 1e ef 00 00 00 a0 lock \*\(u64\*\)\(r1\+0x1eef\)\^=r2 >> + 48: c3 12 1e ef 00 00 00 a0 lock \*\(u32\*\)\(r1\+0x1eef\)\^=r2 >> + 50: db 12 1e ef 00 00 00 01 r2=atomic_fetch_add\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 58: c3 12 1e ef 00 00 00 01 w2=atomic_fetch_add\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 60: db 12 1e ef 00 00 00 51 r2=atomic_fetch_and\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 68: c3 12 1e ef 00 00 00 51 w2=atomic_fetch_and\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 70: db 12 1e ef 00 00 00 41 r2=atomic_fetch_or\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 78: c3 12 1e ef 00 00 00 41 w2=atomic_fetch_or\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 80: db 12 1e ef 00 00 00 a1 r2=atomic_fetch_xor\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 88: c3 12 1e ef 00 00 00 a1 w2=atomic_fetch_xor\(\(u32\*\)\(r1\+0x1eef\),w2\) >> diff --git a/gas/testsuite/gas/bpf/atomic-be.d b/gas/testsuite/gas/bpf/atomic-be.d >> index fa81d8f6ffb..42a0037035e 100644 >> --- a/gas/testsuite/gas/bpf/atomic-be.d >> +++ b/gas/testsuite/gas/bpf/atomic-be.d >> @@ -1,6 +1,6 @@ >> #as: -EB -mdialect=normal >> #source: atomic.s >> -#objdump: -dr -M hex,v1 >> +#objdump: -dr -M hex >> #name: eBPF atomic instructions, big endian >> >> .*: +file format .*bpf.* >> @@ -8,5 +8,19 @@ >> Disassembly of section .text: >> >> 0+ <.text>: >> - 0: db 12 1e ef 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2 >> - 8: c3 12 1e ef 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2 >> + 0: db 12 1e ef 00 00 00 00 aadd \[%r1\+0x1eef\],%r2 >> + 8: c3 12 1e ef 00 00 00 00 aadd32 \[%r1\+0x1eef\],%r2 >> + 10: db 12 1e ef 00 00 00 50 aand \[%r1\+0x1eef\],%r2 >> + 18: c3 12 1e ef 00 00 00 50 aand32 \[%r1\+0x1eef\],%r2 >> + 20: db 12 1e ef 00 00 00 40 aor \[%r1\+0x1eef\],%r2 >> + 28: c3 12 1e ef 00 00 00 40 aor32 \[%r1\+0x1eef\],%r2 >> + 30: db 12 1e ef 00 00 00 a0 axor \[%r1\+0x1eef\],%r2 >> + 38: c3 12 1e ef 00 00 00 a0 axor32 \[%r1\+0x1eef\],%r2 >> + 40: db 12 1e ef 00 00 00 01 afadd \[%r1\+0x1eef\],%r2 >> + 48: c3 12 1e ef 00 00 00 01 afadd32 \[%r1\+0x1eef\],%r2 >> + 50: db 12 1e ef 00 00 00 51 afand \[%r1\+0x1eef\],%r2 >> + 58: c3 12 1e ef 00 00 00 51 afand32 \[%r1\+0x1eef\],%r2 >> + 60: db 12 1e ef 00 00 00 41 afor \[%r1\+0x1eef\],%r2 >> + 68: c3 12 1e ef 00 00 00 41 afor32 \[%r1\+0x1eef\],%r2 >> + 70: db 12 1e ef 00 00 00 a1 afxor \[%r1\+0x1eef\],%r2 >> + 78: c3 12 1e ef 00 00 00 a1 afxor32 \[%r1\+0x1eef\],%r2 >> diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.d b/gas/testsuite/gas/bpf/atomic-pseudoc.d >> index 3aafd47e0d8..30bfba64380 100644 >> --- a/gas/testsuite/gas/bpf/atomic-pseudoc.d >> +++ b/gas/testsuite/gas/bpf/atomic-pseudoc.d >> @@ -8,5 +8,21 @@ >> Disassembly of section .text: >> >> 0+ <.text>: >> - 0: db 21 ef 1e 00 00 00 00 \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> - 8: c3 21 ef 1e 00 00 00 00 \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 0: db 21 ef 1e 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> + 8: c3 21 ef 1e 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 10: db 21 ef 1e 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2 >> + 18: c3 21 ef 1e 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2 >> + 20: db 21 ef 1e 50 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\&=r2 >> + 28: c3 21 ef 1e 50 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\&=r2 >> + 30: db 21 ef 1e 40 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\|=r2 >> + 38: c3 21 ef 1e 40 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\|=r2 >> + 40: db 21 ef 1e a0 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\^=r2 >> + 48: c3 21 ef 1e a0 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\^=r2 >> + 50: db 21 ef 1e 01 00 00 00 r2=atomic_fetch_add\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 58: c3 21 ef 1e 01 00 00 00 w2=atomic_fetch_add\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 60: db 21 ef 1e 51 00 00 00 r2=atomic_fetch_and\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 68: c3 21 ef 1e 51 00 00 00 w2=atomic_fetch_and\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 70: db 21 ef 1e 41 00 00 00 r2=atomic_fetch_or\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 78: c3 21 ef 1e 41 00 00 00 w2=atomic_fetch_or\(\(u32\*\)\(r1\+0x1eef\),w2\) >> + 80: db 21 ef 1e a1 00 00 00 r2=atomic_fetch_xor\(\(u64\*\)\(r1\+0x1eef\),r2\) >> + 88: c3 21 ef 1e a1 00 00 00 w2=atomic_fetch_xor\(\(u32\*\)\(r1\+0x1eef\),w2\) >> diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.s b/gas/testsuite/gas/bpf/atomic-pseudoc.s >> index ac73cadf999..514cfa91fb7 100644 >> --- a/gas/testsuite/gas/bpf/atomic-pseudoc.s >> +++ b/gas/testsuite/gas/bpf/atomic-pseudoc.s >> @@ -1,4 +1,20 @@ >> - # Test for eBPF ADDW and ADDDW pseudo-C instructions >> + # Test for eBPF atomic pseudo-C instructions. >> .text >> - *(u64 *)(r1 + 7919) += r2 >> - *(u32 *)(r1 + 7919) += r2 >> + lock *(u64 *)(r1 + 0x1eef) += r2 >> + lock *(u32 *)(r1 + 0x1eef) += r2 >> + lock *(u64*)(r1+0x1eef)+=r2 >> + lock *(u32*)(r1+0x1eef)+=r2 >> + lock *(u64*)(r1+0x1eef)&=r2 >> + lock *(u32*)(r1+0x1eef)&=r2 >> + lock *(u64*)(r1+0x1eef)|=r2 >> + lock *(u32*)(r1+0x1eef)|=r2 >> + lock *(u64*)(r1+0x1eef)^=r2 >> + lock *(u32*)(r1+0x1eef)^=r2 >> + r2 = atomic_fetch_add((u64*)(r1+0x1eef),r2) >> + w2 = atomic_fetch_add((u32*)(r1+0x1eef),w2) >> + r2 = atomic_fetch_and((u64*)(r1+0x1eef),r2) >> + w2 = atomic_fetch_and((u32*)(r1+0x1eef),w2) >> + r2 = atomic_fetch_or((u64*)(r1+0x1eef),r2) >> + w2 = atomic_fetch_or((u32*)(r1+0x1eef),w2) >> + r2 = atomic_fetch_xor((u64*)(r1+0x1eef),r2) >> + w2 = atomic_fetch_xor((u32*)(r1+0x1eef),w2) >> diff --git a/gas/testsuite/gas/bpf/atomic-v1-be.d b/gas/testsuite/gas/bpf/atomic-v1-be.d >> new file mode 100644 >> index 00000000000..54536e457c2 >> --- /dev/null >> +++ b/gas/testsuite/gas/bpf/atomic-v1-be.d >> @@ -0,0 +1,12 @@ >> +#as: -EB -mdialect=normal >> +#source: atomic-v1.s >> +#objdump: -dr -M hex,v1 >> +#name: eBPF atomic instructions, big endian >> + >> +.*: +file format .*bpf.* >> + >> +Disassembly of section .text: >> + >> +0+ <.text>: >> + 0: db 12 1e ef 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2 >> + 8: c3 12 1e ef 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2 >> diff --git a/gas/testsuite/gas/bpf/atomic-v1.d b/gas/testsuite/gas/bpf/atomic-v1.d >> new file mode 100644 >> index 00000000000..c0de79a6404 >> --- /dev/null >> +++ b/gas/testsuite/gas/bpf/atomic-v1.d >> @@ -0,0 +1,12 @@ >> +#as: -EL -mdialect=normal >> +#source: atomic-v1.s >> +#objdump: -dr -M hex,v1 >> +#name: eBPF atomic instructions, little endian >> + >> +.*: +file format .*bpf.* >> + >> +Disassembly of section .text: >> + >> +0+ <.text>: >> + 0: db 21 ef 1e 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2 >> + 8: c3 21 ef 1e 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2 >> diff --git a/gas/testsuite/gas/bpf/atomic-v1.s b/gas/testsuite/gas/bpf/atomic-v1.s >> new file mode 100644 >> index 00000000000..564d7d8da4f >> --- /dev/null >> +++ b/gas/testsuite/gas/bpf/atomic-v1.s >> @@ -0,0 +1,5 @@ >> + >> + # Test for eBPF XADDW and XADDDW instructions. >> + .text >> + xadddw [%r1+0x1eef], %r2 >> + xaddw [%r1+0x1eef], %r2 >> diff --git a/gas/testsuite/gas/bpf/atomic.d b/gas/testsuite/gas/bpf/atomic.d >> index 0a27cae0019..f7925b330ac 100644 >> --- a/gas/testsuite/gas/bpf/atomic.d >> +++ b/gas/testsuite/gas/bpf/atomic.d >> @@ -10,3 +10,17 @@ Disassembly of section .text: >> 0+ <.text>: >> 0: db 21 ef 1e 00 00 00 00 aadd \[%r1\+0x1eef\],%r2 >> 8: c3 21 ef 1e 00 00 00 00 aadd32 \[%r1\+0x1eef\],%r2 >> + 10: db 21 ef 1e 50 00 00 00 aand \[%r1\+0x1eef\],%r2 >> + 18: c3 21 ef 1e 50 00 00 00 aand32 \[%r1\+0x1eef\],%r2 >> + 20: db 21 ef 1e 40 00 00 00 aor \[%r1\+0x1eef\],%r2 >> + 28: c3 21 ef 1e 40 00 00 00 aor32 \[%r1\+0x1eef\],%r2 >> + 30: db 21 ef 1e a0 00 00 00 axor \[%r1\+0x1eef\],%r2 >> + 38: c3 21 ef 1e a0 00 00 00 axor32 \[%r1\+0x1eef\],%r2 >> + 40: db 21 ef 1e 01 00 00 00 afadd \[%r1\+0x1eef\],%r2 >> + 48: c3 21 ef 1e 01 00 00 00 afadd32 \[%r1\+0x1eef\],%r2 >> + 50: db 21 ef 1e 51 00 00 00 afand \[%r1\+0x1eef\],%r2 >> + 58: c3 21 ef 1e 51 00 00 00 afand32 \[%r1\+0x1eef\],%r2 >> + 60: db 21 ef 1e 41 00 00 00 afor \[%r1\+0x1eef\],%r2 >> + 68: c3 21 ef 1e 41 00 00 00 afor32 \[%r1\+0x1eef\],%r2 >> + 70: db 21 ef 1e a1 00 00 00 afxor \[%r1\+0x1eef\],%r2 >> + 78: c3 21 ef 1e a1 00 00 00 afxor32 \[%r1\+0x1eef\],%r2 >> diff --git a/gas/testsuite/gas/bpf/atomic.s b/gas/testsuite/gas/bpf/atomic.s >> index 4669f4adf04..781a2e965ac 100644 >> --- a/gas/testsuite/gas/bpf/atomic.s >> +++ b/gas/testsuite/gas/bpf/atomic.s >> @@ -1,5 +1,19 @@ >> - # Test for eBPF ADDW and ADDDW instructions >> + # Test for eBPF atomic instructions >> .text >> aadd [%r1+0x1eef], %r2 >> aadd32 [%r1+0x1eef], %r2 >> - >> + aand [%r1+0x1eef], %r2 >> + aand32 [%r1+0x1eef], %r2 >> + aor [%r1+0x1eef], %r2 >> + aor32 [%r1+0x1eef], %r2 >> + axor [%r1+0x1eef], %r2 >> + axor32 [%r1+0x1eef], %r2 >> + >> + afadd [%r1+0x1eef], %r2 >> + afadd32 [%r1+0x1eef], %r2 >> + afand [%r1+0x1eef], %r2 >> + afand32 [%r1+0x1eef], %r2 >> + afor [%r1+0x1eef], %r2 >> + afor32 [%r1+0x1eef], %r2 >> + afxor [%r1+0x1eef], %r2 >> + afxor32 [%r1+0x1eef], %r2 >> diff --git a/gas/testsuite/gas/bpf/bpf.exp b/gas/testsuite/gas/bpf/bpf.exp >> index adf413f834c..1d683d55215 100644 >> --- a/gas/testsuite/gas/bpf/bpf.exp >> +++ b/gas/testsuite/gas/bpf/bpf.exp >> @@ -34,6 +34,7 @@ if {[istarget bpf*-*-*]} { >> run_dump_test jump-pseudoc >> run_dump_test jump32 >> run_dump_test jump32-pseudoc >> + run_dump_test atomic-v1 >> run_dump_test atomic >> run_dump_test atomic-pseudoc >> run_dump_test indcall-1 >> @@ -55,6 +56,7 @@ if {[istarget bpf*-*-*]} { >> run_dump_test jump-be-pseudoc >> run_dump_test jump32-be >> run_dump_test jump32-be-pseudoc >> + run_dump_test atomic-v1-be >> run_dump_test atomic-be >> run_dump_test atomic-be-pseudoc >> } >> diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c >> index 00a21c6039c..ee6719bdc06 100644 >> --- a/opcodes/bpf-opc.c >> +++ b/opcodes/bpf-opc.c >> @@ -364,43 +364,43 @@ const struct bpf_opcode bpf_opcodes[] = >> BPF_V3, BPF_CODE, BPF_CLASS_JMP32|BPF_CODE_JNE|BPF_SRC_K}, >> >> /* Atomic instructions. */ >> - {BPF_INSN_AADD, "aadd%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) += %sr", >> + {BPF_INSN_AADD, "aadd%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) += %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AADD}, >> - {BPF_INSN_AOR, "aor%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) |= %sr", >> + {BPF_INSN_AOR, "aor%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) |= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AOR}, >> - {BPF_INSN_AAND, "aand%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) &= %sr", >> + {BPF_INSN_AAND, "aand%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) &= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AAND}, >> - {BPF_INSN_AXOR, "axor%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) ^= %sr", >> + {BPF_INSN_AXOR, "axor%W[ %dr %o16 ] , %sr", "lock%w* ( u64 * ) ( %dr %o16 ) ^= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AXOR}, >> >> /* Atomic instructions with fetching. */ >> - {BPF_INSN_AFADD, "afadd%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFADD, "afadd%W[ %dr %o16 ] , %sr", "%sr = atomic_fetch_add ( ( u64 * ) ( %dr %o16 ) , %sr )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AFADD}, >> - {BPF_INSN_AFOR, "afor%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFOR, "afor%W[ %dr %o16 ] , %sr", "%sr = atomic_fetch_or ( ( u64 * ) ( %dr %o16 ) , %sr )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AFOR}, >> - {BPF_INSN_AFAND, "afand%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFAND, "afand%W[ %dr %o16 ] , %sr", "%sr = atomic_fetch_and ( ( u64 * ) ( %dr %o16 ) , %sr )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AFAND}, >> - {BPF_INSN_AFXOR, "afxor%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFXOR, "afxor%W[ %dr %o16 ] , %sr", "%sr = atomic_fetch_xor ( ( u64 * ) ( %dr %o16 ) , %sr )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AFXOR}, >> >> /* Atomic instructions (32-bit.) */ >> - {BPF_INSN_AADD32, "aadd32%W[ %dr %o16 ] , %sr", "* ( u32 * ) ( %dr %o16 ) += %sr", >> + {BPF_INSN_AADD32, "aadd32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) += %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AADD}, >> - {BPF_INSN_AOR32, "aor32%W[ %dr %o16 ] , %sr", "* ( u32 * ) ( %dr %o16 ) |= %sr", >> + {BPF_INSN_AOR32, "aor32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) |= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AOR}, >> - {BPF_INSN_AAND32, "aand32%W[ %dr %o16 ] , %sr", "* ( u32 * ) ( %dr %o16 ) &= %sr", >> + {BPF_INSN_AAND32, "aand32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) &= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AAND}, >> - {BPF_INSN_AXOR32, "axor32%W[ %dr %o16 ] , %sr", "* ( u32 * ) ( %dr %o16 ) ^= %sr", >> + {BPF_INSN_AXOR32, "axor32%W[ %dr %o16 ] , %sr", "lock%w* ( u32 * ) ( %dr %o16 ) ^= %sr", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AXOR}, >> >> /* Atomic instructions with fetching (32-bit.) */ >> - {BPF_INSN_AFADD32, "afadd32 %W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFADD32, "afadd32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_add ( ( u32 * ) ( %dr %o16 ) , %sw )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFADD}, >> - {BPF_INSN_AFOR32, "afor32%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFOR32, "afor32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_or ( ( u32 * ) ( %dr %o16 ) , %sw )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFOR}, >> - {BPF_INSN_AFAND32, "afand32%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFAND32, "afand32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_and ( ( u32 * ) ( %dr %o16 ) , %sw )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFAND}, >> - {BPF_INSN_AFXOR32, "afxor32%W[ %dr %o16 ] , %sr", "???", >> + {BPF_INSN_AFXOR32, "afxor32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_xor ( ( u32 * ) ( %dr %o16 ) , %sw )", >> BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFXOR}, >> >> /* Old versions of aadd and aadd32. */