From: Jan Beulich <jbeulich@suse.com>
To: Andrew Carlotti <andrew.carlotti@arm.com>
Cc: Binutils <binutils@sourceware.org>,
Richard Earnshaw <rearnsha@arm.com>,
Marcus Shawcroft <marcus.shawcroft@arm.com>,
Nick Clifton <nickc@redhat.com>
Subject: Re: [PATCH 3/6] Arm64: check tied operand specifier in aarch64-gen
Date: Mon, 18 Mar 2024 09:35:01 +0100 [thread overview]
Message-ID: <86bac3d3-977c-4a62-b71a-7bf86c0a6a54@suse.com> (raw)
In-Reply-To: <5f39bfec-6bee-aec4-f4e1-301e6a639f6f@e124511.cambridge.arm.com>
On 15.03.2024 17:09, Andrew Carlotti wrote:
> On Fri, Feb 23, 2024 at 12:29:00PM +0100, Jan Beulich wrote:
>> Make sure that field actually matches the specified operands. Don't
>> follow existing F_PSEUDO checking in using assertions, though. Print
>> meaingful error messages, thus - while not having a line number
>> available - at least providing some indication of where things are
>> wrong.
>
> This new check should be helpful. However, some mnemonics have a lot of
> variants, so could you also add the opcode (and maybe the mask) to the new
> error messages? For example:
>
> extq (0x05602400,0xfff0fc00): operands 1 and 2 match, but tied=0
Hmm, yes, I could do that for disambiguation; not sure if the mask value
really is needed there - I fear overloading the message. What I was
instead hoping for though is an idea how to report the line number. Imo
that would be far better, just that the way the header file is used
doesn't easily lend itself to doing so.
Jan
next prev parent reply other threads:[~2024-03-18 8:35 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-23 11:26 [PATCH 0/6] Arm64: (mostly) SVE adjustments Jan Beulich
2024-02-23 11:28 ` [PATCH 1/6] Arm64: correct B16B16 indexed bf{mla,mls,mul} Jan Beulich
2024-03-20 15:54 ` Richard Earnshaw (lists)
2024-03-20 16:09 ` Jan Beulich
2024-02-23 11:28 ` [PATCH 2/6] Arm64: check matching operands for predicated B16B16 insns Jan Beulich
2024-03-20 16:19 ` Richard Earnshaw (lists)
2024-02-23 11:29 ` [PATCH 3/6] Arm64: check tied operand specifier in aarch64-gen Jan Beulich
2024-03-15 16:09 ` Andrew Carlotti
2024-03-18 8:35 ` Jan Beulich [this message]
2024-03-20 16:51 ` Richard Earnshaw (lists)
2024-03-21 7:38 ` Jan Beulich
2024-02-23 11:29 ` [PATCH 4/6] Arm64: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate) Jan Beulich
2024-05-09 14:31 ` Richard Earnshaw (lists)
2024-02-23 11:30 ` [PATCH 5/6] Arm64: correct SVE2.1 ld2q (scalar plus scalar) Jan Beulich
2024-05-09 14:34 ` Richard Earnshaw (lists)
2024-02-23 11:30 ` [PATCH 6/6] gas/NEWS: drop mention of Arm64's SVE2.1 and SME2.1 Jan Beulich
2024-03-15 16:20 ` [PATCH 0/6] Arm64: (mostly) SVE adjustments Andrew Carlotti
2024-03-18 8:23 ` Jan Beulich
2024-05-09 14:17 ` Richard Earnshaw (lists)
2024-05-14 6:57 ` Jan Beulich
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