From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9464 invoked by alias); 7 Aug 2011 09:09:47 -0000 Received: (qmail 9456 invoked by uid 22791); 7 Aug 2011 09:09:46 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-wy0-f169.google.com (HELO mail-wy0-f169.google.com) (74.125.82.169) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sun, 07 Aug 2011 09:09:32 +0000 Received: by wyi11 with SMTP id 11so564675wyi.0 for ; Sun, 07 Aug 2011 02:09:31 -0700 (PDT) Received: by 10.227.42.2 with SMTP id q2mr3466171wbe.19.1312708170945; Sun, 07 Aug 2011 02:09:30 -0700 (PDT) Received: from localhost (rsandifo.gotadsl.co.uk [82.133.89.107]) by mx.google.com with ESMTPS id o19sm3611972wbh.9.2011.08.07.02.09.27 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 07 Aug 2011 02:09:29 -0700 (PDT) From: Richard Sandiford To: "Maciej W. Rozycki" Mail-Followup-To: "Maciej W. Rozycki" ,binutils@sourceware.org, Chao-ying Fu , Rich Fuhler , David Lau , Kevin Mills , Ilie Garbacea , Catherine Moore , Nathan Sidwell , Joseph Myers , rdsandiford@googlemail.com Cc: binutils@sourceware.org, Chao-ying Fu , Rich Fuhler , David Lau , Kevin Mills , Ilie Garbacea , Catherine Moore , Nathan Sidwell , Joseph Myers Subject: Re: [PATCH] MIPS: MCU ASE support References: Date: Sun, 07 Aug 2011 09:09:00 -0000 In-Reply-To: (Maciej W. Rozycki's message of "Wed, 3 Aug 2011 15:33:33 +0100 (BST)") Message-ID: <871uwxlha3.fsf@firetop.home> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-08/txt/msg00064.txt.bz2 "Maciej W. Rozycki" writes: > gas/ > 2011-08-03 Chao-ying Fu > Maciej W. Rozycki > > * config/tc-mips.c (mips_set_options): Add ase_mcu. > (mips_opts): Initialise ase_mcu to -1. > (ISA_SUPPORTS_MCU_ASE): New macro. > (MIPS_CPU_ASE_MCU): Likewise. > (is_opcode_valid): Handle MCU. > (macro_build, macro): Likewise. > (validate_mips_insn, validate_micromips_insn): Likewise. > (mips_ip): Likewise. > (options): Add OPTION_MCU and OPTION_NO_MCU. > (md_longopts): Add mmcu and mno-mcu. > (md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU. > (mips_after_parse_args): Handle MCU. > (s_mipsset): Likewise. > (md_show_usage): Handle MCU options. > > * doc/as.texinfo: Document -mmcu and -mno-mcu options. > * doc/c-mips.texi: Likewise, and document ".set mcu" and > ".set nomcu" directives. > > gas/testsuite/ > 2011-08-03 Maciej W. Rozycki > Chao-ying Fu > > * gas/mips/micromips@mcu.d: New test. > * gas/mips/mcu.d: Likewise. > * gas/mips/mcu.s: New test source. > * gas/mips/mips.exp: Run the new tests. > > include/opcode/ > 2011-08-03 Chao-ying Fu > Maciej W. Rozycki > > * mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros. > (OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine. > (INSN_ASE_MASK): Add the MCU bit. > (INSN_MCU): New macro. > (M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values. > (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros. > > opcodes/ > 2011-08-03 Chao-ying Fu > Maciej W. Rozycki > > * mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2" > and "mips64r2". > (print_insn_args, print_insn_micromips): Handle MCU. > * micromips-opc.c (MC): New macro. > (micromips_opcodes): Add "aclr", "aset" and "iret". > * mips-opc.c (MC): New macro. > (mips_builtin_opcodes): Add "aclr", "aset" and "iret". OK, thanks. Richard