* [PATH] AMD MWAITX enablement @ 2015-06-02 6:56 Pawar, Amit 2015-06-02 8:22 ` Jan Beulich 0 siblings, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-02 6:56 UTC (permalink / raw) To: binutils [-- Attachment #1: Type: text/plain, Size: 239 bytes --] Hi All, PFA, the patch enables support for MWAITX CPU and has been tested on x86-64 and found no regressions. This is my first patch and please let me know how do I apply to trunk or can somebody apply from my side? Regards, Amit [-- Attachment #2: mwaitx.patch --] [-- Type: application/octet-stream, Size: 16989 bytes --] diff --git a/gas/ChangeLog b/gas/ChangeLog index dd2f446..c5d2bc8 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-05-28 Amit Pawar <Amit.Pawar@amd.com> + + * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. + * doc/c-i386.texi: Add mwaitx cpu. + 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (parse_sys_reg): New parameter. Check target diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 34b5c28..581370a 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -954,6 +954,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512VBMI_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, + CPU_MWAITX_FLAGS, 0, 0 }, }; #ifdef I386COFF @@ -3329,7 +3331,8 @@ process_immext (void) { expressionS *exp; - if ((i.tm.cpu_flags.bitfield.cpusse3 || i.tm.cpu_flags.bitfield.cpusvme) + if ((i.tm.cpu_flags.bitfield.cpusse3 || i.tm.cpu_flags.bitfield.cpusvme || + i.tm.cpu_flags.bitfield.cpumwaitx) && i.operands > 0) { /* MONITOR/MWAIT as well as SVME instructions have fixed operands diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6118987..4af05e3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{rtm}, @code{invpcid}, @code{clflush}, +@code{mwaitx}, @code{clzero}, @code{lwp}, @code{fma4}, @@ -1112,7 +1113,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 233e138..71bbd01 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2015-05-29 Amit Pawar <Amit.Pawar@amd.com> + + * gas/i386/i386.exp: Add new mwaitx test cases. + * gas/i386/x86-64-mwaitx-znver1.d: New. + * gas/i386/x86-64-mwaitx-reg.l: New. + * gas/i386/mwaitx-znver1.d: New. + * gas/i386/x86-64-mwaitx-reg.s: New. + * gas/i386/mwaitx-bdver4.d: New. + * gas/i386/x86-64-mwaitx-bdver4.d: New. + * gas/i386/mwaitx.s: New. + * gas/i386/mwaitx-reg.s: New. + * gas/i386/x86-64-mwaitx.s: New. + * gas/i386/mwaitx-reg.l: New. + 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * pan-directive.d: New. diff --git a/gas/testsuite/gas/i386/mwaitx-bdver4.d b/gas/testsuite/gas/i386/mwaitx-bdver4.d new file mode 100644 index 0000000..5c4c891 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: i386 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx +#pass diff --git a/gas/testsuite/gas/i386/mwaitx-reg.l b/gas/testsuite/gas/i386/mwaitx-reg.l new file mode 100644 index 0000000..b5c212a --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.l @@ -0,0 +1,52 @@ +#as: -march=mwaitx +.*: Assembler messages: +#eax +.*:[0-9]*: Error: .*eax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.* + +#ebx +.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.* + +#ecx +.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.* + +#edx +.*:[0-9]*: Error: .*edx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.* + +#esp +.*:[0-9]*: Error: .*esp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.* + +#ebp +.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.* + +#esi +.*:[0-9]*: Error: .*esi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.* + +#edi +.*:[0-9]*: Error: .*edi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/mwaitx-reg.s b/gas/testsuite/gas/i386/mwaitx-reg.s new file mode 100644 index 0000000..91f34d2 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.s @@ -0,0 +1,7 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di + monitorx %e\reg, %ecx, %edx + monitorx %eax, %e\reg, %edx + monitorx %eax, %ecx, %e\reg + mwaitx %e\reg, %ecx + mwaitx %eax, %e\reg +.endr diff --git a/gas/testsuite/gas/i386/mwaitx.s b/gas/testsuite/gas/i386/mwaitx.s new file mode 100644 index 0000000..dddc684 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %eax, %ecx, %edx + monitorx %ax, %ecx, %edx + monitorx + mwaitx %eax, %ecx + mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d new file mode 100644 index 0000000..d75ec3b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: x86-64-mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: x86_64 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +0000000000000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l new file mode 100644 index 0000000..6be79c1 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l @@ -0,0 +1,108 @@ +#as: -march=mwaitx +.*: Assembler messages: +#rax +.*:[0-9]*: Error: .*rax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.* + +#rbx +.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.* + +#rcx +.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.* + +#rdx +.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.* + +#rsp +.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.* + +#rbp +.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.* + +#rsi +.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.* + +#rdi +.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.* + +#r8 +.*:[0-9]*: Error: .*r8.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.* + +#r9 +.*:[0-9]*: Error: .*r9.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.* + +#r10 +.*:[0-9]*: Error: .*r10.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.* + +#r11 +.*:[0-9]*: Error: .*r11.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.* + +#r12 +.*:[0-9]*: Error: .*r12.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.* + +#r13 +.*:[0-9]*: Error: .*r13.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.* + +#r14 +.*:[0-9]*: Error: .*r14.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.* + +#r15 +.*:[0-9]*: Error: .*r15.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s new file mode 100644 index 0000000..3108adc --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s @@ -0,0 +1,7 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15 + monitorx %r\reg, %rcx, %rdx + monitorx %rax, %r\reg, %rdx + monitorx %rax, %rcx, %r\reg + mwaitx %r\reg, %rcx + mwaitx %rax, %r\reg +.endr diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx.s b/gas/testsuite/gas/i386/x86-64-mwaitx.s new file mode 100644 index 0000000..889218c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %rax, %rcx, %rdx + monitorx %eax, %rcx, %rdx + monitorx + mwaitx %rax, %rcx + mwaitx diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f4688c8..26e2daa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2015-05-29 Amit Pawar <Amit.Pawar@amd.com> + + * i386-dis.c (rm_table): Add monitorx/mwaitx. + * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. + * i386-opc.h: Add CpuMWAITX. + * i386-opc.tbl: Add monitorx and mwaitx. + * i386-init.h: Re-generated. + * i386-tbl.h: Re-generated. + 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * aarch64-opc.c (F_ARCHEXT): New. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 767bab3..7212993 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -12072,8 +12072,8 @@ static const struct dis386 rm_table[][8] = { /* RM_0F01_REG_7 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { Bad_Opcode }, - { Bad_Opcode }, + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mwaitx", { { OP_Mwait, 0 } }, 0 }, { "clzero", { Skip_MODRM }, 0 }, }, { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0523936..5aca18a 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,9 +94,9 @@ static initializer cpu_flag_init[] = { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", @@ -253,6 +253,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" }, { "CPU_CLZERO_FLAGS", "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, }; static initializer operand_type_init[] = @@ -457,6 +459,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuMPX), BITFIELD (CpuAVX512IFMA), BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuAMD64), BITFIELD (CpuIntel64), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 62ac42a..d598ce5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -194,6 +194,8 @@ enum CpuAVX512IFMA, /* Intel AVX-512 VBMI Instructions support required. */ CpuAVX512VBMI, + /* mwaitx instruction required */ + CpuMWAITX, /* Clzero instruction required */ CpuCLZERO, /* 64bit support required */ @@ -304,6 +306,7 @@ typedef union i386_cpu_flags unsigned int cpupcommit:1; unsigned int cpuavx512ifma:1; unsigned int cpuavx512vbmi:1; + unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpu64:1; unsigned int cpuno64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a3bd7de..00a1bb0 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| // CLZERO instructions end +// MONITORX/MWAITX instructions +monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } +// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } + +mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "mwaitx %eax,%ecx" is accepted. +mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32 } +// Need to ensure only "mwaitx %rax,%rcx" is accepted. +mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64 } +// MONITORX/MWAITX instructions end ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-02 6:56 [PATH] AMD MWAITX enablement Pawar, Amit @ 2015-06-02 8:22 ` Jan Beulich 2015-06-02 13:35 ` Pawar, Amit 2015-06-08 6:16 ` Pawar, Amit 0 siblings, 2 replies; 27+ messages in thread From: Jan Beulich @ 2015-06-02 8:22 UTC (permalink / raw) To: Amit Pawar; +Cc: binutils >>> On 02.06.15 at 08:55, <Amit.Pawar@amd.com> wrote: >--- a/opcodes/i386-opc.tbl >+++ b/opcodes/i386-opc.tbl >@@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| > > // CLZERO instructions end > >+// MONITORX/MWAITX instructions >+monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } >+// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } >+// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } >+ >+mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } >+// Need to ensure only "mwaitx %eax,%ecx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32 } >+// Need to ensure only "mwaitx %rax,%rcx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64 } >+// MONITORX/MWAITX instructions end Looking at the earlier submitted Linux side patch at least one of the instructions also uses %ebx - why is that not being expressed by the instruction forms taking explicit operands? Jan ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-02 8:22 ` Jan Beulich @ 2015-06-02 13:35 ` Pawar, Amit 2015-06-08 6:16 ` Pawar, Amit 1 sibling, 0 replies; 27+ messages in thread From: Pawar, Amit @ 2015-06-02 13:35 UTC (permalink / raw) To: Jan Beulich; +Cc: binutils Thanks Jan and will come back with updated patch. --Amit -----Original Message----- From: Jan Beulich [mailto:JBeulich@suse.com] Sent: Tuesday, June 02, 2015 1:52 PM To: Pawar, Amit Cc: binutils@sourceware.org Subject: Re: [PATH] AMD MWAITX enablement >>> On 02.06.15 at 08:55, <Amit.Pawar@amd.com> wrote: >--- a/opcodes/i386-opc.tbl >+++ b/opcodes/i386-opc.tbl >@@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, >No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| > > // CLZERO instructions end > >+// MONITORX/MWAITX instructions >+monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } // Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } // Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } >+ >+mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } // Need to ensure only "mwaitx %eax,%ecx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32 } // Need to ensure only "mwaitx %rax,%rcx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, >+{ Reg64, Reg64 } // MONITORX/MWAITX instructions end Looking at the earlier submitted Linux side patch at least one of the instructions also uses %ebx - why is that not being expressed by the instruction forms taking explicit operands? Jan ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-02 8:22 ` Jan Beulich 2015-06-02 13:35 ` Pawar, Amit @ 2015-06-08 6:16 ` Pawar, Amit 2015-06-08 7:05 ` Jan Beulich 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-08 6:16 UTC (permalink / raw) To: Jan Beulich; +Cc: binutils [-- Attachment #1: Type: text/plain, Size: 2005 bytes --] Third operand has been added to MWAITX instruction. It has been tested for correctness and found no regression. Please let me know the process to apply to trunk or can you apply to trunk from my side. Amit Pawar -----Original Message----- From: Jan Beulich [mailto:JBeulich@suse.com] Sent: Tuesday, June 02, 2015 1:52 PM To: Pawar, Amit Cc: binutils@sourceware.org Subject: Re: [PATH] AMD MWAITX enablement >>> On 02.06.15 at 08:55, <Amit.Pawar@amd.com> wrote: >--- a/opcodes/i386-opc.tbl >+++ b/opcodes/i386-opc.tbl >@@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, >No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| > > // CLZERO instructions end > >+// MONITORX/MWAITX instructions >+monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } // Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } // Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. >+monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } >+ >+mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } // Need to ensure only "mwaitx %eax,%ecx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32 } // Need to ensure only "mwaitx %rax,%rcx" is accepted. >+mwaitx, 2, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, >+No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, >+{ Reg64, Reg64 } // MONITORX/MWAITX instructions end Looking at the earlier submitted Linux side patch at least one of the instructions also uses %ebx - why is that not being expressed by the instruction forms taking explicit operands? Jan [-- Attachment #2: mwaitx.patch.bz2 --] [-- Type: application/octet-stream, Size: 5200 bytes --] ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-08 6:16 ` Pawar, Amit @ 2015-06-08 7:05 ` Jan Beulich 2015-06-10 9:37 ` Pawar, Amit 2015-06-25 7:55 ` Pawar, Amit 0 siblings, 2 replies; 27+ messages in thread From: Jan Beulich @ 2015-06-08 7:05 UTC (permalink / raw) To: Amit Pawar; +Cc: binutils >>> On 08.06.15 at 08:15, <Amit.Pawar@amd.com> wrote: > Third operand has been added to MWAITX instruction. Thanks. And just to double check - in 64-bit mode it is RBX that matters, not EBX (i.e. the upper 32 bits are not being ignored)? (I suppose you realize that it's kind of difficult to review such a change without there being public documentation for these new instructions.) Jan ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-08 7:05 ` Jan Beulich @ 2015-06-10 9:37 ` Pawar, Amit 2015-06-25 7:55 ` Pawar, Amit 1 sibling, 0 replies; 27+ messages in thread From: Pawar, Amit @ 2015-06-10 9:37 UTC (permalink / raw) To: Jan Beulich; +Cc: binutils 64 bit version is provided for backward compatibility and upper 32 bits of RAX,RCX and RBX registers are not consumed by the MWAITX instruction. Only lower 32 bits of RAX,RCX,RBX (I,e EAX,ECX and EBX) are consumed. Documentation is in progress and on completion it will be released to the public. -----Original Message----- From: Jan Beulich [mailto:JBeulich@suse.com] Sent: Monday, June 08, 2015 12:35 PM To: Pawar, Amit Cc: binutils@sourceware.org Subject: RE: [PATH] AMD MWAITX enablement >>> On 08.06.15 at 08:15, <Amit.Pawar@amd.com> wrote: > Third operand has been added to MWAITX instruction. Thanks. And just to double check - in 64-bit mode it is RBX that matters, not EBX (i.e. the upper 32 bits are not being ignored)? (I suppose you realize that it's kind of difficult to review such a change without there being public documentation for these new instructions.) Jan ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-08 7:05 ` Jan Beulich 2015-06-10 9:37 ` Pawar, Amit @ 2015-06-25 7:55 ` Pawar, Amit 2015-06-25 9:26 ` H.J. Lu 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-25 7:55 UTC (permalink / raw) To: binutils; +Cc: Jan Beulich [-- Attachment #1: Type: text/plain, Size: 91 bytes --] PFA MWAITX rebase patch without generated header files. Is ok to apply? Regards, Amit [-- Attachment #2: mwaitx_v2.patch.bz2 --] [-- Type: application/octet-stream, Size: 5226 bytes --] ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-25 7:55 ` Pawar, Amit @ 2015-06-25 9:26 ` H.J. Lu 2015-06-26 5:46 ` Pawar, Amit 0 siblings, 1 reply; 27+ messages in thread From: H.J. Lu @ 2015-06-25 9:26 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Thu, Jun 25, 2015 at 12:55 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX rebase patch without generated header files. Is ok to apply? > > Regards, > Amit + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ ^^^^ Align it with "would be". + unsigned int x; + + if (strcmp(i.tm.name, "mwaitx") == 0) + { + x = 0; + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + x++; + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + x++; + if (register_number (i.op[x].regs) != x+1) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + } + else + { + for (x = 0; x < i.operands; x++) + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + + i.operands = 0; + } + Please use a single for loop and fix indentation like if ( { if ( { H.J. static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwait %eax,%ecx */ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Please fix comments. + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-25 9:26 ` H.J. Lu @ 2015-06-26 5:46 ` Pawar, Amit 2015-06-26 10:04 ` H.J. Lu 0 siblings, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 5:46 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich [-- Attachment #1: Type: text/plain, Size: 2575 bytes --] PFA MWAITX fixed patch. OK to apply? -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Thursday, June 25, 2015 2:56 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Thu, Jun 25, 2015 at 12:55 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX rebase patch without generated header files. Is ok to apply? > > Regards, > Amit + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ ^^^^ Align it with "would be". + unsigned int x; + + if (strcmp(i.tm.name, "mwaitx") == 0) + { + x = 0; + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + x++; + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + x++; + if (register_number (i.op[x].regs) != x+1) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + } + else + { + for (x = 0; x < i.operands; x++) + if (register_number (i.op[x].regs) != x) + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + + i.operands = 0; + } + Please use a single for loop and fix indentation like if ( { if ( { H.J. static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwait %eax,%ecx */ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Please fix comments. + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + -- H.J. [-- Attachment #2: mwaitx_v3.patch.bz2 --] [-- Type: application/octet-stream, Size: 5228 bytes --] ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 5:46 ` Pawar, Amit @ 2015-06-26 10:04 ` H.J. Lu 2015-06-26 11:09 ` Pawar, Amit 0 siblings, 1 reply; 27+ messages in thread From: H.J. Lu @ 2015-06-26 10:04 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX fixed patch. OK to apply? > Please change the operand check to if (i.tm.cpu_flags.bitfield.cpumwaitx) { if ( i.operands != 3) abort for (i = 0, i< 2; i++) ... if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... } -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 10:04 ` H.J. Lu @ 2015-06-26 11:09 ` Pawar, Amit 2015-06-26 11:55 ` H.J. Lu 0 siblings, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 11:09 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich [-- Attachment #1: Type: text/plain, Size: 675 bytes --] Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 3:34 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX fixed patch. OK to apply? > Please change the operand check to if (i.tm.cpu_flags.bitfield.cpumwaitx) { if ( i.operands != 3) abort for (i = 0, i< 2; i++) ... if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... } -- H.J. [-- Attachment #2: mwaitx_v4.patch --] [-- Type: application/octet-stream, Size: 25105 bytes --] diff --git a/gas/ChangeLog b/gas/ChangeLog index eb18335..5fcb7ef 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. + * doc/c-i386.texi: Add mwaitx cpu. + 2015-06-24 H.J. Lu <hongjiu.lu@intel.com> * doc/as.texinfo (.cfi_lsda): Remove the extra @section. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 34b5c28..2d63cb8 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -954,6 +954,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512VBMI_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, + CPU_MWAITX_FLAGS, 0, 0 }, }; #ifdef I386COFF @@ -3347,6 +3349,35 @@ process_immext (void) i.operands = 0; } + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ + unsigned int x; + + for (x = 0; x < 2; x++) + { + if (register_number (i.op[x].regs) != x) + { + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + } + + /* Check for third operand for mwaitx/monitorx insn*/ + if ( register_number (i.op[2].regs) != 2 + (i.tm.extension_opcode == 0xfb)) + { + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, 3, + i.tm.name); + } + + i.operands = 0; + } + /* These AMD 3DNow! and SSE2 instructions have an opcode suffix which is coded in the same place as an 8-bit immediate field would be. Here we fake an 8-bit immediate operand from the diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6118987..4af05e3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{rtm}, @code{invpcid}, @code{clflush}, +@code{mwaitx}, @code{clzero}, @code{lwp}, @code{fma4}, @@ -1112,7 +1113,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9430469..d62033a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * gas/i386/i386.exp: Add new mwaitx test cases. + * gas/i386/mwaitx.s: New. + * gas/i386/mwaitx-bdver4.d: New. + * gas/i386/x86-64-mwaitx.s: New. + * gas/i386/x86-64-mwaitx-bdver4.d: New. + * gas/i386/mwaitx-reg.s: New. + * gas/i386/mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.s: New. + * gas/i386/arch-13.s: Updated. + * gas/i386/arch-13.d: Updated. + * gas/i386/arch-13-znver1.d: Updated. + * gas/i386/x86-64-arch-3.s: Updated. + * gas/i386/x86-64-arch-3.d: Updated. + * gas/i386/x86-64-arch-3-znver1.d: Updated. + 2015-06-25 H.J. Lu <hongjiu.lu@intel.com> * gas/mmix/loc-3.d: Updated. diff --git a/gas/testsuite/gas/i386/arch-13-znver1.d b/gas/testsuite/gas/i386/arch-13-znver1.d index bafe606..b76cfab 100644 --- a/gas/testsuite/gas/i386/arch-13-znver1.d +++ b/gas/testsuite/gas/i386/arch-13-znver1.d @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.d b/gas/testsuite/gas/i386/arch-13.d index 370e641..6296ab7 100644 --- a/gas/testsuite/gas/i386/arch-13.d +++ b/gas/testsuite/gas/i386/arch-13.d @@ -1,4 +1,4 @@ -#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt +#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: i386 arch 13 @@ -16,4 +16,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.s b/gas/testsuite/gas/i386/arch-13.s index 5e1969f..4e82ff6 100644 --- a/gas/testsuite/gas/i386/arch-13.s +++ b/gas/testsuite/gas/i386/arch-13.s @@ -16,4 +16,8 @@ xsavec (%ecx) xsaves (%ecx) #CLFLUSHOPT clflushopt (%ecx) - +monitorx %eax, %ecx, %edx +monitorx %ax, %ecx, %edx +monitorx +mwaitx %eax, %ecx, %ebx +mwaitx diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9ff38d3..d36d5c6 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -340,6 +340,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512vbmi_vl-intel" run_dump_test "clzero" run_dump_test "disassem" + run_dump_test "mwaitx-bdver4" + run_list_test "mwaitx-reg" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. @@ -721,6 +723,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512vbmi_vl" run_dump_test "x86-64-avx512vbmi_vl-intel" run_dump_test "x86-64-clzero" + run_dump_test "x86-64-mwaitx-bdver4" + run_list_test "x86-64-mwaitx-reg" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/mwaitx-bdver4.d b/gas/testsuite/gas/i386/mwaitx-bdver4.d new file mode 100644 index 0000000..7a09db6 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: i386 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/mwaitx-reg.l b/gas/testsuite/gas/i386/mwaitx-reg.l new file mode 100644 index 0000000..68ea6e9 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.l @@ -0,0 +1,59 @@ +#as: -march=mwaitx +.*: Assembler messages: +#eax +.*:[0-9]*: Error: .*eax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*eax.* 3 .*mwaitx.* + +#ebx +.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.* + +#ecx +.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ecx.* 3 .*mwaitx.* + +#edx +.*:[0-9]*: Error: .*edx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 3 .*mwaitx.* + +#esp +.*:[0-9]*: Error: .*esp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 3 .*mwaitx.* + +#ebp +.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 3 .*mwaitx.* + +#esi +.*:[0-9]*: Error: .*esi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 3 .*mwaitx.* + +#edi +.*:[0-9]*: Error: .*edi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/mwaitx-reg.s b/gas/testsuite/gas/i386/mwaitx-reg.s new file mode 100644 index 0000000..aa2e229 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di + monitorx %e\reg, %ecx, %edx + monitorx %eax, %e\reg, %edx + monitorx %eax, %ecx, %e\reg + mwaitx %e\reg, %ecx, %ebx + mwaitx %eax, %e\reg, %ebx + mwaitx %eax, %ecx, %e\reg +.endr diff --git a/gas/testsuite/gas/i386/mwaitx.s b/gas/testsuite/gas/i386/mwaitx.s new file mode 100644 index 0000000..7bd7a3a --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %eax, %ecx, %edx + monitorx %ax, %ecx, %edx + monitorx + mwaitx %eax, %ecx, %ebx + mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d index 9066855..2fc0a1f 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d @@ -18,4 +18,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.d b/gas/testsuite/gas/i386/x86-64-arch-3.d index 7b0792a..6a7fb00 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3.d @@ -1,4 +1,4 @@ -#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt +#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: x86-64 arch 3 @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.s b/gas/testsuite/gas/i386/x86-64-arch-3.s index 76c4226..2096efc 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.s +++ b/gas/testsuite/gas/i386/x86-64-arch-3.s @@ -18,4 +18,8 @@ xsavec64 (%rcx) xsaves64 (%rcx) #CLFLUSHOPT clflushopt (%rcx) - +monitorx %rax,%rcx,%rdx +monitorx %eax,%rcx,%rdx +monitorx +mwaitx %rax,%rcx,%rbx +mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d new file mode 100644 index 0000000..f35ad11 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: x86-64-mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: x86_64 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +0000000000000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l new file mode 100644 index 0000000..ea1fef0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l @@ -0,0 +1,123 @@ +#as: -march=mwaitx +.*: Assembler messages: +#rax +.*:[0-9]*: Error: .*rax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rax.* 3 .*mwaitx.* + +#rbx +.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.* + +#rcx +.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rcx.* 3 .*mwaitx.* + +#rdx +.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 3 .*mwaitx.* + +#rsp +.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 3 .*mwaitx.* + +#rbp +.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 3 .*mwaitx.* + +#rsi +.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 3 .*mwaitx.* + +#rdi +.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 3 .*mwaitx.* + +#r8 +.*:[0-9]*: Error: .*r8.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 3 .*mwaitx.* + +#r9 +.*:[0-9]*: Error: .*r9.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 3 .*mwaitx.* + +#r10 +.*:[0-9]*: Error: .*r10.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 3 .*mwaitx.* + +#r11 +.*:[0-9]*: Error: .*r11.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 3 .*mwaitx.* + +#r12 +.*:[0-9]*: Error: .*r12.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 3 .*mwaitx.* + +#r13 +.*:[0-9]*: Error: .*r13.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 3 .*mwaitx.* + +#r14 +.*:[0-9]*: Error: .*r14.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 3 .*mwaitx.* + +#r15 +.*:[0-9]*: Error: .*r15.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s new file mode 100644 index 0000000..5df5f8c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15 + monitorx %r\reg, %rcx, %rdx + monitorx %rax, %r\reg, %rdx + monitorx %rax, %rcx, %r\reg + mwaitx %r\reg, %rcx, %rbx + mwaitx %rax, %r\reg, %rbx + mwaitx %rax, %rcx, %r\reg +.endr diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx.s b/gas/testsuite/gas/i386/x86-64-mwaitx.s new file mode 100644 index 0000000..0f58d3c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %rax, %rcx, %rdx + monitorx %eax, %rcx, %rdx + monitorx + mwaitx %rax, %rcx, %rbx + mwaitx diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 84eff1e..eeb1aa4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * i386-dis.c (rm_table): Add monitorx/mwaitx. + * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. + * i386-opc.h: Add CpuMWAITX. + * i386-opc.tbl: Add monitorx and mwaitx. + 2015-06-22 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (insert_ls): Test for invalid LS operands. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 767bab3..e768029 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -102,6 +102,7 @@ static void VPCMP_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); +static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -12072,8 +12073,8 @@ static const struct dis386 rm_table[][8] = { /* RM_0F01_REG_7 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { Bad_Opcode }, - { Bad_Opcode }, + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, { "clzero", { Skip_MODRM }, 0 }, }, { @@ -16452,6 +16453,25 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwaitx %eax,%ecx,%ebx */ + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + +static void OP_Mwait (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0523936..5aca18a 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,9 +94,9 @@ static initializer cpu_flag_init[] = { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", @@ -253,6 +253,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" }, { "CPU_CLZERO_FLAGS", "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, }; static initializer operand_type_init[] = @@ -457,6 +459,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuMPX), BITFIELD (CpuAVX512IFMA), BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuAMD64), BITFIELD (CpuIntel64), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 62ac42a..d598ce5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -194,6 +194,8 @@ enum CpuAVX512IFMA, /* Intel AVX-512 VBMI Instructions support required. */ CpuAVX512VBMI, + /* mwaitx instruction required */ + CpuMWAITX, /* Clzero instruction required */ CpuCLZERO, /* 64bit support required */ @@ -304,6 +306,7 @@ typedef union i386_cpu_flags unsigned int cpupcommit:1; unsigned int cpuavx512ifma:1; unsigned int cpuavx512vbmi:1; + unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpu64:1; unsigned int cpuno64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a3bd7de..ed6fe63 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| // CLZERO instructions end +// MONITORX/MWAITX instructions +monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } +// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } + +mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "mwaitx %eax,%ecx,%ebx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32, Reg32 } +// Need to ensure only "mwaitx %rax,%rcx,%rbx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64, Reg64 } +// MONITORX/MWAITX instructions end ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 11:09 ` Pawar, Amit @ 2015-06-26 11:55 ` H.J. Lu 2015-06-26 15:00 ` Pawar, Amit 0 siblings, 1 reply; 27+ messages in thread From: H.J. Lu @ 2015-06-26 11:55 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. Add if (i.operands != 3) abort (); + for (x = 0; x < 2; x++) + { ^^^ Remove it. + if (register_number (i.op[x].regs) != x) Use goto bad_register_operand; + { + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + } + + /* Check for third operand for mwaitx/monitorx insn*/ + if ( register_number (i.op[2].regs) != 2 + (i.tm.extension_opcode == 0xfb)) ^ Remove extra space. This line is too lone. Please break it into 2 lines: if (register_number (i.op[x].regs) != x + (i.tm.extension_opcode == 0xfb)) + { Add a label here bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, 3, ^^^ Change it to x + 1. + i.tm.name); + } + + i.operands = 0; + } > > -----Original Message----- > From: H.J. Lu [mailto:hjl.tools@gmail.com] > Sent: Friday, June 26, 2015 3:34 PM > To: Pawar, Amit > Cc: binutils@sourceware.org; Jan Beulich > Subject: Re: [PATH] AMD MWAITX enablement > > On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> PFA MWAITX fixed patch. OK to apply? >> > > Please change the operand check to > > if (i.tm.cpu_flags.bitfield.cpumwaitx) > { > if ( i.operands != 3) > abort > > for (i = 0, i< 2; i++) > ... > > if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... > } > > -- > H.J. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 11:55 ` H.J. Lu @ 2015-06-26 15:00 ` Pawar, Amit 2015-06-26 15:04 ` H.J. Lu 0 siblings, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 15:00 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich Comments are fixed and please suggest how to allow following instructions without operands --- Required ---- label: monitorx mwaitx -------------------- ---- Accepted---- monitorx %eax, %ecx, %edx mwaitx %eax, %ecx, %ebx -------------------- by adding following code if (i.operands != 3) abort (); -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 5:26 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. Add if (i.operands != 3) abort (); + for (x = 0; x < 2; x++) + { ^^^ Remove it. + if (register_number (i.op[x].regs) != x) Use goto bad_register_operand; + { + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + } + } + + /* Check for third operand for mwaitx/monitorx insn*/ + if ( register_number (i.op[2].regs) != 2 + (i.tm.extension_opcode == 0xfb)) ^ Remove extra space. This line is too lone. Please break it into 2 lines: if (register_number (i.op[x].regs) != x + (i.tm.extension_opcode == 0xfb)) + { Add a label here bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, 3, ^^^ Change it to x + 1. + i.tm.name); + } + + i.operands = 0; + } > > -----Original Message----- > From: H.J. Lu [mailto:hjl.tools@gmail.com] > Sent: Friday, June 26, 2015 3:34 PM > To: Pawar, Amit > Cc: binutils@sourceware.org; Jan Beulich > Subject: Re: [PATH] AMD MWAITX enablement > > On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> PFA MWAITX fixed patch. OK to apply? >> > > Please change the operand check to > > if (i.tm.cpu_flags.bitfield.cpumwaitx) > { > if ( i.operands != 3) > abort > > for (i = 0, i< 2; i++) > ... > > if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... > } > > -- > H.J. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 15:00 ` Pawar, Amit @ 2015-06-26 15:04 ` H.J. Lu 2015-06-26 16:26 ` Pawar, Amit 0 siblings, 1 reply; 27+ messages in thread From: H.J. Lu @ 2015-06-26 15:04 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich Please don't top post. On Fri, Jun 26, 2015 at 8:00 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > Comments are fixed and please suggest how to allow following instructions without operands > > --- Required ---- > label: > monitorx > mwaitx > -------------------- > > ---- Accepted---- > monitorx %eax, %ecx, %edx > mwaitx %eax, %ecx, %ebx > -------------------- > by adding following code > > if (i.operands != 3) > abort (); > > > -----Original Message----- > From: H.J. Lu [mailto:hjl.tools@gmail.com] > Sent: Friday, June 26, 2015 5:26 PM > To: Pawar, Amit > Cc: binutils@sourceware.org; Jan Beulich > Subject: Re: [PATH] AMD MWAITX enablement > > On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> >> Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. > > Add You have if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) { .... } If i.operands == 0, you won't reach if (i.operands != 3) abort (); Am I missing something? > if (i.operands != 3) > abort (); > > + for (x = 0; x < 2; x++) > + { > ^^^ Remove it. > > + if (register_number (i.op[x].regs) != x) > > Use > goto bad_register_operand; > > + { > + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), > + register_prefix, i.op[x].regs->reg_name, x + 1, > + i.tm.name); > + } > + } > + > + /* Check for third operand for mwaitx/monitorx insn*/ > + if ( register_number (i.op[2].regs) != 2 + > (i.tm.extension_opcode == 0xfb)) > ^ Remove extra space. > > This line is too lone. Please break it into 2 lines: > > if (register_number (i.op[x].regs) > != x + (i.tm.extension_opcode == 0xfb)) > > + { > > Add a label here > > bad_register_operand: > + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), > + register_prefix, i.op[x].regs->reg_name, 3, > > ^^^ Change it to x + 1. > + i.tm.name); > + } > + > + i.operands = 0; > + } > >> >> -----Original Message----- >> From: H.J. Lu [mailto:hjl.tools@gmail.com] >> Sent: Friday, June 26, 2015 3:34 PM >> To: Pawar, Amit >> Cc: binutils@sourceware.org; Jan Beulich >> Subject: Re: [PATH] AMD MWAITX enablement >> >> On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >>> PFA MWAITX fixed patch. OK to apply? >>> >> >> Please change the operand check to >> >> if (i.tm.cpu_flags.bitfield.cpumwaitx) >> { >> if ( i.operands != 3) >> abort >> >> for (i = 0, i< 2; i++) >> ... >> >> if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... >> } >> >> -- >> H.J. > > > > -- > H.J. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 15:04 ` H.J. Lu @ 2015-06-26 16:26 ` Pawar, Amit 2015-06-26 16:30 ` H.J. Lu 0 siblings, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 16:26 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 8:34 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement Please don't top post. [Pawar, Amit] Thank you and will take care. Please check inline comments. On Fri, Jun 26, 2015 at 8:00 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > Comments are fixed and please suggest how to allow following instructions without operands > > --- Required ---- > label: > monitorx > mwaitx > -------------------- > > ---- Accepted---- > monitorx %eax, %ecx, %edx > mwaitx %eax, %ecx, %ebx > -------------------- > by adding following code > > if (i.operands != 3) > abort (); > > > -----Original Message----- > From: H.J. Lu [mailto:hjl.tools@gmail.com] > Sent: Friday, June 26, 2015 5:26 PM > To: Pawar, Amit > Cc: binutils@sourceware.org; Jan Beulich > Subject: Re: [PATH] AMD MWAITX enablement > > On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> >> Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. > > Add You have if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) { .... } [Pawar, Amit] This condition was included to handle mwaitx cpu instructions with more than zero operands and skips for zero operands. If i.operands == 0, you won't reach >[Pawar, Amit] Zero operands instruction are allowed but should not enter here as it will get handled by normal code. if (i.operands != 3) abort (); [Pawar, Amit] Will throw error for zero operand instructions, as this is inside if case and which is not required here. Am I missing something? [Pawar, Amit] Please let me know if you need any more information. > if (i.operands != 3) > abort (); > > + for (x = 0; x < 2; x++) > + { > ^^^ Remove it. > > + if (register_number (i.op[x].regs) != x) > > Use > goto bad_register_operand; > > + { > + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), > + register_prefix, i.op[x].regs->reg_name, x + 1, > + i.tm.name); > + } > + } > + > + /* Check for third operand for mwaitx/monitorx insn*/ > + if ( register_number (i.op[2].regs) != 2 + > (i.tm.extension_opcode == 0xfb)) > ^ Remove extra space. > > This line is too lone. Please break it into 2 lines: > > if (register_number (i.op[x].regs) > != x + (i.tm.extension_opcode == 0xfb)) > > + { > > Add a label here > > bad_register_operand: > + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), > + register_prefix, i.op[x].regs->reg_name, 3, > > ^^^ Change it to x + 1. > + i.tm.name); > + } > + > + i.operands = 0; > + } > >> >> -----Original Message----- >> From: H.J. Lu [mailto:hjl.tools@gmail.com] >> Sent: Friday, June 26, 2015 3:34 PM >> To: Pawar, Amit >> Cc: binutils@sourceware.org; Jan Beulich >> Subject: Re: [PATH] AMD MWAITX enablement >> >> On Thu, Jun 25, 2015 at 10:46 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >>> PFA MWAITX fixed patch. OK to apply? >>> >> >> Please change the operand check to >> >> if (i.tm.cpu_flags.bitfield.cpumwaitx) >> { >> if ( i.operands != 3) >> abort >> >> for (i = 0, i< 2; i++) >> ... >> >> if (register_number (i.op[2].regs) != 2 + (opcode ==mwaitx ) ... >> } >> >> -- >> H.J. > > > > -- > H.J. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 16:26 ` Pawar, Amit @ 2015-06-26 16:30 ` H.J. Lu 2015-06-26 16:33 ` Pawar, Amit 2015-06-26 16:39 ` Pawar, Amit 0 siblings, 2 replies; 27+ messages in thread From: H.J. Lu @ 2015-06-26 16:30 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Fri, Jun 26, 2015 at 9:26 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > On Fri, Jun 26, 2015 at 8:00 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> >> Comments are fixed and please suggest how to allow following instructions without operands >> >> --- Required ---- >> label: >> monitorx >> mwaitx >> -------------------- >> >> ---- Accepted---- >> monitorx %eax, %ecx, %edx >> mwaitx %eax, %ecx, %ebx >> -------------------- >> by adding following code >> >> if (i.operands != 3) >> abort (); >> >> >> -----Original Message----- >> From: H.J. Lu [mailto:hjl.tools@gmail.com] >> Sent: Friday, June 26, 2015 5:26 PM >> To: Pawar, Amit >> Cc: binutils@sourceware.org; Jan Beulich >> Subject: Re: [PATH] AMD MWAITX enablement >> >> On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >>> >>> Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. >> >> Add > > You have > > if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > { > .... > } > [Pawar, Amit] This condition was included to handle mwaitx cpu instructions with more than zero > operands and skips for zero operands. > > If i.operands == 0, you won't reach >>[Pawar, Amit] Zero operands instruction are allowed but should not enter here as it will get > handled by normal code. > > if (i.operands != 3) > abort (); > [Pawar, Amit] Will throw error for zero operand instructions, as this is inside if case and which is > not required here. I meant if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) { if (i.operands != 3) abort (); ... } -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 16:30 ` H.J. Lu @ 2015-06-26 16:33 ` Pawar, Amit 2015-06-26 16:39 ` Pawar, Amit 1 sibling, 0 replies; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 16:33 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 10:00 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Fri, Jun 26, 2015 at 9:26 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > On Fri, Jun 26, 2015 at 8:00 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> >> Comments are fixed and please suggest how to allow following >> instructions without operands >> >> --- Required ---- >> label: >> monitorx >> mwaitx >> -------------------- >> >> ---- Accepted---- >> monitorx %eax, %ecx, %edx >> mwaitx %eax, %ecx, %ebx >> -------------------- >> by adding following code >> >> if (i.operands != 3) >> abort (); >> >> >> -----Original Message----- >> From: H.J. Lu [mailto:hjl.tools@gmail.com] >> Sent: Friday, June 26, 2015 5:26 PM >> To: Pawar, Amit >> Cc: binutils@sourceware.org; Jan Beulich >> Subject: Re: [PATH] AMD MWAITX enablement >> >> On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >>> >>> Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. >> >> Add > > You have > > if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > { > .... > } > [Pawar, Amit] This condition was included to handle mwaitx cpu > instructions with more than zero operands and skips for zero operands. > > If i.operands == 0, you won't reach >>[Pawar, Amit] Zero operands instruction are allowed but should not >>enter here as it will get > handled by normal code. > > if (i.operands != 3) > abort (); > [Pawar, Amit] Will throw error for zero operand instructions, as this > is inside if case and which is not required here. I meant if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) { if (i.operands != 3) abort (); ... } [Pawar, Amit] This will handle. Will send the updated patch. Thanks -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 16:30 ` H.J. Lu 2015-06-26 16:33 ` Pawar, Amit @ 2015-06-26 16:39 ` Pawar, Amit 2015-06-26 16:43 ` H.J. Lu 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 16:39 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich [-- Attachment #1: Type: text/plain, Size: 1957 bytes --] PFA MWAITX updated patch. Is it OK? -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 10:00 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Fri, Jun 26, 2015 at 9:26 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > > On Fri, Jun 26, 2015 at 8:00 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >> >> Comments are fixed and please suggest how to allow following >> instructions without operands >> >> --- Required ---- >> label: >> monitorx >> mwaitx >> -------------------- >> >> ---- Accepted---- >> monitorx %eax, %ecx, %edx >> mwaitx %eax, %ecx, %ebx >> -------------------- >> by adding following code >> >> if (i.operands != 3) >> abort (); >> >> >> -----Original Message----- >> From: H.J. Lu [mailto:hjl.tools@gmail.com] >> Sent: Friday, June 26, 2015 5:26 PM >> To: Pawar, Amit >> Cc: binutils@sourceware.org; Jan Beulich >> Subject: Re: [PATH] AMD MWAITX enablement >> >> On Fri, Jun 26, 2015 at 4:09 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: >>> >>> Operand check is required at that line as instructions MONITORX/MWAITX are accepted without operands also. >> >> Add > > You have > > if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > { > .... > } > [Pawar, Amit] This condition was included to handle mwaitx cpu > instructions with more than zero operands and skips for zero operands. > > If i.operands == 0, you won't reach >>[Pawar, Amit] Zero operands instruction are allowed but should not >>enter here as it will get > handled by normal code. > > if (i.operands != 3) > abort (); > [Pawar, Amit] Will throw error for zero operand instructions, as this > is inside if case and which is not required here. I meant if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) { if (i.operands != 3) abort (); ... } -- H.J. [-- Attachment #2: mwaitx_v5.patch --] [-- Type: application/octet-stream, Size: 24997 bytes --] diff --git a/gas/ChangeLog b/gas/ChangeLog index eb18335..5fcb7ef 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. + * doc/c-i386.texi: Add mwaitx cpu. + 2015-06-24 H.J. Lu <hongjiu.lu@intel.com> * doc/as.texinfo (.cfi_lsda): Remove the extra @section. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 34b5c28..bcf20de 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -954,6 +954,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512VBMI_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, + CPU_MWAITX_FLAGS, 0, 0 }, }; #ifdef I386COFF @@ -3347,6 +3349,34 @@ process_immext (void) i.operands = 0; } + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ + unsigned int x; + + if (i.operands != 3) + abort(); + + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[2].regs) != + ( 2 + (i.tm.extension_opcode == 0xfb))) + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } + + i.operands = 0; + } + /* These AMD 3DNow! and SSE2 instructions have an opcode suffix which is coded in the same place as an 8-bit immediate field would be. Here we fake an 8-bit immediate operand from the diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6118987..4af05e3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{rtm}, @code{invpcid}, @code{clflush}, +@code{mwaitx}, @code{clzero}, @code{lwp}, @code{fma4}, @@ -1112,7 +1113,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9430469..d62033a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * gas/i386/i386.exp: Add new mwaitx test cases. + * gas/i386/mwaitx.s: New. + * gas/i386/mwaitx-bdver4.d: New. + * gas/i386/x86-64-mwaitx.s: New. + * gas/i386/x86-64-mwaitx-bdver4.d: New. + * gas/i386/mwaitx-reg.s: New. + * gas/i386/mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.s: New. + * gas/i386/arch-13.s: Updated. + * gas/i386/arch-13.d: Updated. + * gas/i386/arch-13-znver1.d: Updated. + * gas/i386/x86-64-arch-3.s: Updated. + * gas/i386/x86-64-arch-3.d: Updated. + * gas/i386/x86-64-arch-3-znver1.d: Updated. + 2015-06-25 H.J. Lu <hongjiu.lu@intel.com> * gas/mmix/loc-3.d: Updated. diff --git a/gas/testsuite/gas/i386/arch-13-znver1.d b/gas/testsuite/gas/i386/arch-13-znver1.d index bafe606..b76cfab 100644 --- a/gas/testsuite/gas/i386/arch-13-znver1.d +++ b/gas/testsuite/gas/i386/arch-13-znver1.d @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.d b/gas/testsuite/gas/i386/arch-13.d index 370e641..6296ab7 100644 --- a/gas/testsuite/gas/i386/arch-13.d +++ b/gas/testsuite/gas/i386/arch-13.d @@ -1,4 +1,4 @@ -#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt +#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: i386 arch 13 @@ -16,4 +16,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.s b/gas/testsuite/gas/i386/arch-13.s index 5e1969f..4e82ff6 100644 --- a/gas/testsuite/gas/i386/arch-13.s +++ b/gas/testsuite/gas/i386/arch-13.s @@ -16,4 +16,8 @@ xsavec (%ecx) xsaves (%ecx) #CLFLUSHOPT clflushopt (%ecx) - +monitorx %eax, %ecx, %edx +monitorx %ax, %ecx, %edx +monitorx +mwaitx %eax, %ecx, %ebx +mwaitx diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9ff38d3..d36d5c6 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -340,6 +340,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512vbmi_vl-intel" run_dump_test "clzero" run_dump_test "disassem" + run_dump_test "mwaitx-bdver4" + run_list_test "mwaitx-reg" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. @@ -721,6 +723,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512vbmi_vl" run_dump_test "x86-64-avx512vbmi_vl-intel" run_dump_test "x86-64-clzero" + run_dump_test "x86-64-mwaitx-bdver4" + run_list_test "x86-64-mwaitx-reg" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/mwaitx-bdver4.d b/gas/testsuite/gas/i386/mwaitx-bdver4.d new file mode 100644 index 0000000..7a09db6 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: i386 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/mwaitx-reg.l b/gas/testsuite/gas/i386/mwaitx-reg.l new file mode 100644 index 0000000..68ea6e9 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.l @@ -0,0 +1,59 @@ +#as: -march=mwaitx +.*: Assembler messages: +#eax +.*:[0-9]*: Error: .*eax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*eax.* 3 .*mwaitx.* + +#ebx +.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.* + +#ecx +.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ecx.* 3 .*mwaitx.* + +#edx +.*:[0-9]*: Error: .*edx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 3 .*mwaitx.* + +#esp +.*:[0-9]*: Error: .*esp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 3 .*mwaitx.* + +#ebp +.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 3 .*mwaitx.* + +#esi +.*:[0-9]*: Error: .*esi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 3 .*mwaitx.* + +#edi +.*:[0-9]*: Error: .*edi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/mwaitx-reg.s b/gas/testsuite/gas/i386/mwaitx-reg.s new file mode 100644 index 0000000..aa2e229 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di + monitorx %e\reg, %ecx, %edx + monitorx %eax, %e\reg, %edx + monitorx %eax, %ecx, %e\reg + mwaitx %e\reg, %ecx, %ebx + mwaitx %eax, %e\reg, %ebx + mwaitx %eax, %ecx, %e\reg +.endr diff --git a/gas/testsuite/gas/i386/mwaitx.s b/gas/testsuite/gas/i386/mwaitx.s new file mode 100644 index 0000000..7bd7a3a --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %eax, %ecx, %edx + monitorx %ax, %ecx, %edx + monitorx + mwaitx %eax, %ecx, %ebx + mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d index 9066855..2fc0a1f 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d @@ -18,4 +18,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.d b/gas/testsuite/gas/i386/x86-64-arch-3.d index 7b0792a..6a7fb00 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3.d @@ -1,4 +1,4 @@ -#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt +#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: x86-64 arch 3 @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.s b/gas/testsuite/gas/i386/x86-64-arch-3.s index 76c4226..2096efc 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.s +++ b/gas/testsuite/gas/i386/x86-64-arch-3.s @@ -18,4 +18,8 @@ xsavec64 (%rcx) xsaves64 (%rcx) #CLFLUSHOPT clflushopt (%rcx) - +monitorx %rax,%rcx,%rdx +monitorx %eax,%rcx,%rdx +monitorx +mwaitx %rax,%rcx,%rbx +mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d new file mode 100644 index 0000000..f35ad11 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: x86-64-mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: x86_64 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +0000000000000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l new file mode 100644 index 0000000..ea1fef0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l @@ -0,0 +1,123 @@ +#as: -march=mwaitx +.*: Assembler messages: +#rax +.*:[0-9]*: Error: .*rax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rax.* 3 .*mwaitx.* + +#rbx +.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.* + +#rcx +.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rcx.* 3 .*mwaitx.* + +#rdx +.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 3 .*mwaitx.* + +#rsp +.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 3 .*mwaitx.* + +#rbp +.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 3 .*mwaitx.* + +#rsi +.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 3 .*mwaitx.* + +#rdi +.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 3 .*mwaitx.* + +#r8 +.*:[0-9]*: Error: .*r8.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 3 .*mwaitx.* + +#r9 +.*:[0-9]*: Error: .*r9.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 3 .*mwaitx.* + +#r10 +.*:[0-9]*: Error: .*r10.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 3 .*mwaitx.* + +#r11 +.*:[0-9]*: Error: .*r11.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 3 .*mwaitx.* + +#r12 +.*:[0-9]*: Error: .*r12.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 3 .*mwaitx.* + +#r13 +.*:[0-9]*: Error: .*r13.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 3 .*mwaitx.* + +#r14 +.*:[0-9]*: Error: .*r14.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 3 .*mwaitx.* + +#r15 +.*:[0-9]*: Error: .*r15.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s new file mode 100644 index 0000000..5df5f8c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15 + monitorx %r\reg, %rcx, %rdx + monitorx %rax, %r\reg, %rdx + monitorx %rax, %rcx, %r\reg + mwaitx %r\reg, %rcx, %rbx + mwaitx %rax, %r\reg, %rbx + mwaitx %rax, %rcx, %r\reg +.endr diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx.s b/gas/testsuite/gas/i386/x86-64-mwaitx.s new file mode 100644 index 0000000..0f58d3c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %rax, %rcx, %rdx + monitorx %eax, %rcx, %rdx + monitorx + mwaitx %rax, %rcx, %rbx + mwaitx diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 84eff1e..eeb1aa4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * i386-dis.c (rm_table): Add monitorx/mwaitx. + * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. + * i386-opc.h: Add CpuMWAITX. + * i386-opc.tbl: Add monitorx and mwaitx. + 2015-06-22 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (insert_ls): Test for invalid LS operands. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 767bab3..e768029 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -102,6 +102,7 @@ static void VPCMP_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); +static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -12072,8 +12073,8 @@ static const struct dis386 rm_table[][8] = { /* RM_0F01_REG_7 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { Bad_Opcode }, - { Bad_Opcode }, + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, { "clzero", { Skip_MODRM }, 0 }, }, { @@ -16452,6 +16453,25 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwaitx %eax,%ecx,%ebx */ + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + +static void OP_Mwait (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0523936..5aca18a 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,9 +94,9 @@ static initializer cpu_flag_init[] = { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", @@ -253,6 +253,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" }, { "CPU_CLZERO_FLAGS", "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, }; static initializer operand_type_init[] = @@ -457,6 +459,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuMPX), BITFIELD (CpuAVX512IFMA), BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuAMD64), BITFIELD (CpuIntel64), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 62ac42a..d598ce5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -194,6 +194,8 @@ enum CpuAVX512IFMA, /* Intel AVX-512 VBMI Instructions support required. */ CpuAVX512VBMI, + /* mwaitx instruction required */ + CpuMWAITX, /* Clzero instruction required */ CpuCLZERO, /* 64bit support required */ @@ -304,6 +306,7 @@ typedef union i386_cpu_flags unsigned int cpupcommit:1; unsigned int cpuavx512ifma:1; unsigned int cpuavx512vbmi:1; + unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpu64:1; unsigned int cpuno64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a3bd7de..ed6fe63 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| // CLZERO instructions end +// MONITORX/MWAITX instructions +monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } +// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } + +mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "mwaitx %eax,%ecx,%ebx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32, Reg32 } +// Need to ensure only "mwaitx %rax,%rcx,%rbx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64, Reg64 } +// MONITORX/MWAITX instructions end ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 16:39 ` Pawar, Amit @ 2015-06-26 16:43 ` H.J. Lu 2015-06-26 16:52 ` Pawar, Amit 2015-06-26 17:06 ` Pawar, Amit 0 siblings, 2 replies; 27+ messages in thread From: H.J. Lu @ 2015-06-26 16:43 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Fri, Jun 26, 2015 at 9:39 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX updated patch. Is it OK? > + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; Please fix indentation. + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[2].regs) != + ( 2 + (i.tm.extension_opcode == 0xfb))) ^^ Remove extra space before 2. Please use "x" instead of "2". + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } OK with those changes. Thanks. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 16:43 ` H.J. Lu @ 2015-06-26 16:52 ` Pawar, Amit 2015-06-26 18:02 ` Andreas Schwab 2015-06-26 17:06 ` Pawar, Amit 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 16:52 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich [-- Attachment #1: Type: text/plain, Size: 1040 bytes --] PFA MWAITX patch. Thank you. -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 10:14 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Fri, Jun 26, 2015 at 9:39 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX updated patch. Is it OK? > + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; Please fix indentation. + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[2].regs) != + ( 2 + (i.tm.extension_opcode == 0xfb))) ^^ Remove extra space before 2. Please use "x" instead of "2". + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } OK with those changes. Thanks. -- H.J. [-- Attachment #2: mwaitx_v6.patch --] [-- Type: application/octet-stream, Size: 24990 bytes --] diff --git a/gas/ChangeLog b/gas/ChangeLog index eb18335..5fcb7ef 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. + * doc/c-i386.texi: Add mwaitx cpu. + 2015-06-24 H.J. Lu <hongjiu.lu@intel.com> * doc/as.texinfo (.cfi_lsda): Remove the extra @section. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 34b5c28..bcf20de 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -954,6 +954,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512VBMI_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, + CPU_MWAITX_FLAGS, 0, 0 }, }; #ifdef I386COFF @@ -3347,6 +3349,34 @@ process_immext (void) i.operands = 0; } + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ + unsigned int x; + + if (i.operands != 3) + abort(); + + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[x].regs) != + (x + (i.tm.extension_opcode == 0xfb))) + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } + + i.operands = 0; + } + /* These AMD 3DNow! and SSE2 instructions have an opcode suffix which is coded in the same place as an 8-bit immediate field would be. Here we fake an 8-bit immediate operand from the diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6118987..4af05e3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{rtm}, @code{invpcid}, @code{clflush}, +@code{mwaitx}, @code{clzero}, @code{lwp}, @code{fma4}, @@ -1112,7 +1113,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9430469..d62033a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * gas/i386/i386.exp: Add new mwaitx test cases. + * gas/i386/mwaitx.s: New. + * gas/i386/mwaitx-bdver4.d: New. + * gas/i386/x86-64-mwaitx.s: New. + * gas/i386/x86-64-mwaitx-bdver4.d: New. + * gas/i386/mwaitx-reg.s: New. + * gas/i386/mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.s: New. + * gas/i386/arch-13.s: Updated. + * gas/i386/arch-13.d: Updated. + * gas/i386/arch-13-znver1.d: Updated. + * gas/i386/x86-64-arch-3.s: Updated. + * gas/i386/x86-64-arch-3.d: Updated. + * gas/i386/x86-64-arch-3-znver1.d: Updated. + 2015-06-25 H.J. Lu <hongjiu.lu@intel.com> * gas/mmix/loc-3.d: Updated. diff --git a/gas/testsuite/gas/i386/arch-13-znver1.d b/gas/testsuite/gas/i386/arch-13-znver1.d index bafe606..b76cfab 100644 --- a/gas/testsuite/gas/i386/arch-13-znver1.d +++ b/gas/testsuite/gas/i386/arch-13-znver1.d @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.d b/gas/testsuite/gas/i386/arch-13.d index 370e641..6296ab7 100644 --- a/gas/testsuite/gas/i386/arch-13.d +++ b/gas/testsuite/gas/i386/arch-13.d @@ -1,4 +1,4 @@ -#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt +#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: i386 arch 13 @@ -16,4 +16,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.s b/gas/testsuite/gas/i386/arch-13.s index 5e1969f..4e82ff6 100644 --- a/gas/testsuite/gas/i386/arch-13.s +++ b/gas/testsuite/gas/i386/arch-13.s @@ -16,4 +16,8 @@ xsavec (%ecx) xsaves (%ecx) #CLFLUSHOPT clflushopt (%ecx) - +monitorx %eax, %ecx, %edx +monitorx %ax, %ecx, %edx +monitorx +mwaitx %eax, %ecx, %ebx +mwaitx diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9ff38d3..d36d5c6 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -340,6 +340,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512vbmi_vl-intel" run_dump_test "clzero" run_dump_test "disassem" + run_dump_test "mwaitx-bdver4" + run_list_test "mwaitx-reg" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. @@ -721,6 +723,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512vbmi_vl" run_dump_test "x86-64-avx512vbmi_vl-intel" run_dump_test "x86-64-clzero" + run_dump_test "x86-64-mwaitx-bdver4" + run_list_test "x86-64-mwaitx-reg" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/mwaitx-bdver4.d b/gas/testsuite/gas/i386/mwaitx-bdver4.d new file mode 100644 index 0000000..7a09db6 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: i386 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/mwaitx-reg.l b/gas/testsuite/gas/i386/mwaitx-reg.l new file mode 100644 index 0000000..68ea6e9 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.l @@ -0,0 +1,59 @@ +#as: -march=mwaitx +.*: Assembler messages: +#eax +.*:[0-9]*: Error: .*eax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*eax.* 3 .*mwaitx.* + +#ebx +.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.* + +#ecx +.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ecx.* 3 .*mwaitx.* + +#edx +.*:[0-9]*: Error: .*edx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 3 .*mwaitx.* + +#esp +.*:[0-9]*: Error: .*esp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 3 .*mwaitx.* + +#ebp +.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 3 .*mwaitx.* + +#esi +.*:[0-9]*: Error: .*esi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 3 .*mwaitx.* + +#edi +.*:[0-9]*: Error: .*edi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/mwaitx-reg.s b/gas/testsuite/gas/i386/mwaitx-reg.s new file mode 100644 index 0000000..aa2e229 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di + monitorx %e\reg, %ecx, %edx + monitorx %eax, %e\reg, %edx + monitorx %eax, %ecx, %e\reg + mwaitx %e\reg, %ecx, %ebx + mwaitx %eax, %e\reg, %ebx + mwaitx %eax, %ecx, %e\reg +.endr diff --git a/gas/testsuite/gas/i386/mwaitx.s b/gas/testsuite/gas/i386/mwaitx.s new file mode 100644 index 0000000..7bd7a3a --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %eax, %ecx, %edx + monitorx %ax, %ecx, %edx + monitorx + mwaitx %eax, %ecx, %ebx + mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d index 9066855..2fc0a1f 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d @@ -18,4 +18,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.d b/gas/testsuite/gas/i386/x86-64-arch-3.d index 7b0792a..6a7fb00 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3.d @@ -1,4 +1,4 @@ -#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt +#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: x86-64 arch 3 @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.s b/gas/testsuite/gas/i386/x86-64-arch-3.s index 76c4226..2096efc 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.s +++ b/gas/testsuite/gas/i386/x86-64-arch-3.s @@ -18,4 +18,8 @@ xsavec64 (%rcx) xsaves64 (%rcx) #CLFLUSHOPT clflushopt (%rcx) - +monitorx %rax,%rcx,%rdx +monitorx %eax,%rcx,%rdx +monitorx +mwaitx %rax,%rcx,%rbx +mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d new file mode 100644 index 0000000..f35ad11 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: x86-64-mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: x86_64 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +0000000000000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l new file mode 100644 index 0000000..ea1fef0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l @@ -0,0 +1,123 @@ +#as: -march=mwaitx +.*: Assembler messages: +#rax +.*:[0-9]*: Error: .*rax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rax.* 3 .*mwaitx.* + +#rbx +.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.* + +#rcx +.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rcx.* 3 .*mwaitx.* + +#rdx +.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 3 .*mwaitx.* + +#rsp +.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 3 .*mwaitx.* + +#rbp +.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 3 .*mwaitx.* + +#rsi +.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 3 .*mwaitx.* + +#rdi +.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 3 .*mwaitx.* + +#r8 +.*:[0-9]*: Error: .*r8.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 3 .*mwaitx.* + +#r9 +.*:[0-9]*: Error: .*r9.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 3 .*mwaitx.* + +#r10 +.*:[0-9]*: Error: .*r10.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 3 .*mwaitx.* + +#r11 +.*:[0-9]*: Error: .*r11.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 3 .*mwaitx.* + +#r12 +.*:[0-9]*: Error: .*r12.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 3 .*mwaitx.* + +#r13 +.*:[0-9]*: Error: .*r13.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 3 .*mwaitx.* + +#r14 +.*:[0-9]*: Error: .*r14.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 3 .*mwaitx.* + +#r15 +.*:[0-9]*: Error: .*r15.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s new file mode 100644 index 0000000..5df5f8c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15 + monitorx %r\reg, %rcx, %rdx + monitorx %rax, %r\reg, %rdx + monitorx %rax, %rcx, %r\reg + mwaitx %r\reg, %rcx, %rbx + mwaitx %rax, %r\reg, %rbx + mwaitx %rax, %rcx, %r\reg +.endr diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx.s b/gas/testsuite/gas/i386/x86-64-mwaitx.s new file mode 100644 index 0000000..0f58d3c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %rax, %rcx, %rdx + monitorx %eax, %rcx, %rdx + monitorx + mwaitx %rax, %rcx, %rbx + mwaitx diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 84eff1e..eeb1aa4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-06-26 Amit Pawar <Amit.Pawar@amd.com> + + * i386-dis.c (rm_table): Add monitorx/mwaitx. + * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. + * i386-opc.h: Add CpuMWAITX. + * i386-opc.tbl: Add monitorx and mwaitx. + 2015-06-22 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (insert_ls): Test for invalid LS operands. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 767bab3..e768029 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -102,6 +102,7 @@ static void VPCMP_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); +static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -12072,8 +12073,8 @@ static const struct dis386 rm_table[][8] = { /* RM_0F01_REG_7 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { Bad_Opcode }, - { Bad_Opcode }, + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, { "clzero", { Skip_MODRM }, 0 }, }, { @@ -16452,6 +16453,25 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwaitx %eax,%ecx,%ebx */ + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + +static void OP_Mwait (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0523936..5aca18a 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,9 +94,9 @@ static initializer cpu_flag_init[] = { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", @@ -253,6 +253,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" }, { "CPU_CLZERO_FLAGS", "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, }; static initializer operand_type_init[] = @@ -457,6 +459,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuMPX), BITFIELD (CpuAVX512IFMA), BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuAMD64), BITFIELD (CpuIntel64), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 62ac42a..d598ce5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -194,6 +194,8 @@ enum CpuAVX512IFMA, /* Intel AVX-512 VBMI Instructions support required. */ CpuAVX512VBMI, + /* mwaitx instruction required */ + CpuMWAITX, /* Clzero instruction required */ CpuCLZERO, /* 64bit support required */ @@ -304,6 +306,7 @@ typedef union i386_cpu_flags unsigned int cpupcommit:1; unsigned int cpuavx512ifma:1; unsigned int cpuavx512vbmi:1; + unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpu64:1; unsigned int cpuno64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a3bd7de..ed6fe63 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| // CLZERO instructions end +// MONITORX/MWAITX instructions +monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } +// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } + +mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "mwaitx %eax,%ecx,%ebx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32, Reg32 } +// Need to ensure only "mwaitx %rax,%rcx,%rbx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64, Reg64 } +// MONITORX/MWAITX instructions end ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 16:52 ` Pawar, Amit @ 2015-06-26 18:02 ` Andreas Schwab 2015-06-27 5:20 ` Pawar, Amit 2015-06-30 6:58 ` Pawar, Amit 0 siblings, 2 replies; 27+ messages in thread From: Andreas Schwab @ 2015-06-26 18:02 UTC (permalink / raw) To: Pawar, Amit; +Cc: H.J. Lu, binutils, Jan Beulich "Pawar, Amit" <Amit.Pawar@amd.com> writes: > @@ -3347,6 +3349,34 @@ process_immext (void) > i.operands = 0; > } > > + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > + { > + /* MONITORX/MWAITX instructions have fixed operands with an opcode > + suffix which is coded in the same place as an 8-bit immediate field > + would be. > + Here we check those operands and remove them afterwards. */ > + unsigned int x; > + > + if (i.operands != 3) > + abort(); > + > + for (x = 0; x < 2; x++) > + if (register_number (i.op[x].regs) != x) > + goto bad_register_operand; > + > + /* Check for third operand for mwaitx/monitorx insn*/ > + if (register_number (i.op[x].regs) != > + (x + (i.tm.extension_opcode == 0xfb))) Line break before operator, not after. Andreas. -- Andreas Schwab, schwab@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for something completely different." ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 18:02 ` Andreas Schwab @ 2015-06-27 5:20 ` Pawar, Amit 2015-06-30 6:58 ` Pawar, Amit 1 sibling, 0 replies; 27+ messages in thread From: Pawar, Amit @ 2015-06-27 5:20 UTC (permalink / raw) To: Andreas Schwab; +Cc: H.J. Lu, binutils, Jan Beulich -----Original Message----- From: Andreas Schwab [mailto:schwab@linux-m68k.org] Sent: Friday, June 26, 2015 11:33 PM To: Pawar, Amit Cc: H.J. Lu; binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement "Pawar, Amit" <Amit.Pawar@amd.com> writes: > @@ -3347,6 +3349,34 @@ process_immext (void) > i.operands = 0; > } > > + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > + { > + /* MONITORX/MWAITX instructions have fixed operands with an opcode > + suffix which is coded in the same place as an 8-bit immediate field > + would be. > + Here we check those operands and remove them afterwards. */ > + unsigned int x; > + > + if (i.operands != 3) > + abort(); > + > + for (x = 0; x < 2; x++) > + if (register_number (i.op[x].regs) != x) > + goto bad_register_operand; > + > + /* Check for third operand for mwaitx/monitorx insn*/ > + if (register_number (i.op[x].regs) != > + (x + (i.tm.extension_opcode == 0xfb))) Line break before operator, not after. [Pawar, Amit] Fixed. Thank you. Andreas. -- Andreas Schwab, schwab@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for something completely different." ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 18:02 ` Andreas Schwab 2015-06-27 5:20 ` Pawar, Amit @ 2015-06-30 6:58 ` Pawar, Amit 2015-06-30 14:53 ` H.J. Lu 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-30 6:58 UTC (permalink / raw) To: Andreas Schwab; +Cc: H.J. Lu, binutils, Jan Beulich [-- Attachment #1: Type: text/plain, Size: 1369 bytes --] PFA patch created using "git format-patch -1". Please commit it. -----Original Message----- From: Andreas Schwab [mailto:schwab@linux-m68k.org] Sent: Friday, June 26, 2015 11:33 PM To: Pawar, Amit Cc: H.J. Lu; binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement "Pawar, Amit" <Amit.Pawar@amd.com> writes: > @@ -3347,6 +3349,34 @@ process_immext (void) > i.operands = 0; > } > > + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) > + { > + /* MONITORX/MWAITX instructions have fixed operands with an opcode > + suffix which is coded in the same place as an 8-bit immediate field > + would be. > + Here we check those operands and remove them afterwards. */ > + unsigned int x; > + > + if (i.operands != 3) > + abort(); > + > + for (x = 0; x < 2; x++) > + if (register_number (i.op[x].regs) != x) > + goto bad_register_operand; > + > + /* Check for third operand for mwaitx/monitorx insn*/ > + if (register_number (i.op[x].regs) != > + (x + (i.tm.extension_opcode == 0xfb))) Line break before operator, not after. Andreas. -- Andreas Schwab, schwab@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for something completely different." [-- Attachment #2: 0001-MWAITX-CPU.patch --] [-- Type: application/octet-stream, Size: 28265 bytes --] From ab6cf2d71393334bb48a3aacb4dd70e4f41e8461 Mon Sep 17 00:00:00 2001 From: Amit Pawar <Amit.Pawar@amd.com> Date: Tue, 30 Jun 2015 12:11:52 +0530 Subject: [PATCH] MWAITX CPU Patch adds MWAITX cpu to binutils. New testcases are added and few existing testcases are updated for gas. ChangeLog details are gas/ChangeLog: * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. * doc/c-i386.texi: Add mwaitx cpu. gas/testsuite/ChangeLog: * gas/i386/i386.exp: Add new mwaitx test cases. * gas/i386/mwaitx.s: New. * gas/i386/mwaitx-bdver4.d: New. * gas/i386/x86-64-mwaitx.s: New. * gas/i386/x86-64-mwaitx-bdver4.d: New. * gas/i386/mwaitx-reg.s: New. * gas/i386/mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.s: New. * gas/i386/arch-13.s: Updated. * gas/i386/arch-13.d: Updated. * gas/i386/arch-13-znver1.d: Updated. * gas/i386/x86-64-arch-3.s: Updated. * gas/i386/x86-64-arch-3.d: Updated. * gas/i386/x86-64-arch-3-znver1.d: Updated. opcode/ChangeLog: * i386-dis.c (rm_table): Add monitorx/mwaitx. * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. * i386-opc.h: Add CpuMWAITX. * i386-opc.tbl: Add monitorx and mwaitx. --- gas/ChangeLog | 5 ++ gas/config/tc-i386.c | 30 +++++++ gas/doc/c-i386.texi | 3 +- gas/testsuite/ChangeLog | 18 ++++ gas/testsuite/gas/i386/arch-13-znver1.d | 5 ++ gas/testsuite/gas/i386/arch-13.d | 7 +- gas/testsuite/gas/i386/arch-13.s | 6 +- gas/testsuite/gas/i386/i386.exp | 4 + gas/testsuite/gas/i386/mwaitx-bdver4.d | 17 ++++ gas/testsuite/gas/i386/mwaitx-reg.l | 59 ++++++++++++ gas/testsuite/gas/i386/mwaitx-reg.s | 8 ++ gas/testsuite/gas/i386/mwaitx.s | 9 ++ gas/testsuite/gas/i386/x86-64-arch-3-znver1.d | 5 ++ gas/testsuite/gas/i386/x86-64-arch-3.d | 7 +- gas/testsuite/gas/i386/x86-64-arch-3.s | 6 +- gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d | 17 ++++ gas/testsuite/gas/i386/x86-64-mwaitx-reg.l | 123 ++++++++++++++++++++++++++ gas/testsuite/gas/i386/x86-64-mwaitx-reg.s | 8 ++ gas/testsuite/gas/i386/x86-64-mwaitx.s | 9 ++ opcodes/ChangeLog | 7 ++ opcodes/i386-dis.c | 24 ++++- opcodes/i386-gen.c | 7 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 13 +++ 24 files changed, 391 insertions(+), 9 deletions(-) create mode 100644 gas/testsuite/gas/i386/mwaitx-bdver4.d create mode 100644 gas/testsuite/gas/i386/mwaitx-reg.l create mode 100644 gas/testsuite/gas/i386/mwaitx-reg.s create mode 100644 gas/testsuite/gas/i386/mwaitx.s create mode 100644 gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d create mode 100644 gas/testsuite/gas/i386/x86-64-mwaitx-reg.l create mode 100644 gas/testsuite/gas/i386/x86-64-mwaitx-reg.s create mode 100644 gas/testsuite/gas/i386/x86-64-mwaitx.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 7c49ea6..2a3954f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-06-30 Amit Pawar <Amit.Pawar@amd.com> + + * config/tc-i386.c: Updated to handle monitorx/mwaitx instruction. + * doc/c-i386.texi: Add mwaitx cpu. + 2015-06-28 H.J. Lu <hongjiu.lu@intel.com> * as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index d8405b5..3df06b1 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -954,6 +954,8 @@ static const arch_entry cpu_arch[] = CPU_AVX512VBMI_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN, CPU_CLZERO_FLAGS, 0, 0 }, + { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN, + CPU_MWAITX_FLAGS, 0, 0 }, }; #ifdef I386COFF @@ -3347,6 +3349,34 @@ process_immext (void) i.operands = 0; } + if (i.tm.cpu_flags.bitfield.cpumwaitx && i.operands > 0) + { + /* MONITORX/MWAITX instructions have fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate field + would be. + Here we check those operands and remove them afterwards. */ + unsigned int x; + + if (i.operands != 3) + abort(); + + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[x].regs) + != (x + (i.tm.extension_opcode == 0xfb))) + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } + + i.operands = 0; + } + /* These AMD 3DNow! and SSE2 instructions have an opcode suffix which is coded in the same place as an 8-bit immediate field would be. Here we fake an 8-bit immediate operand from the diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 6118987..4af05e3 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -189,6 +189,7 @@ accept various extension mnemonics. For example, @code{rtm}, @code{invpcid}, @code{clflush}, +@code{mwaitx}, @code{clzero}, @code{lwp}, @code{fma4}, @@ -1112,7 +1113,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16} -@item @samp{.padlock} @tab @samp{.clzero} +@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @end multitable Apart from the warning, there are only two other effects on diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index e7ab1cf..47df78a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2015-06-30 Amit Pawar <Amit.Pawar@amd.com> + + * gas/i386/i386.exp: Add new mwaitx test cases. + * gas/i386/mwaitx.s: New. + * gas/i386/mwaitx-bdver4.d: New. + * gas/i386/x86-64-mwaitx.s: New. + * gas/i386/x86-64-mwaitx-bdver4.d: New. + * gas/i386/mwaitx-reg.s: New. + * gas/i386/mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.l: New. + * gas/i386/x86-64-mwaitx-reg.s: New. + * gas/i386/arch-13.s: Updated. + * gas/i386/arch-13.d: Updated. + * gas/i386/arch-13-znver1.d: Updated. + * gas/i386/x86-64-arch-3.s: Updated. + * gas/i386/x86-64-arch-3.d: Updated. + * gas/i386/x86-64-arch-3-znver1.d: Updated. + 2015-06-27 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/psn.d: Updated. diff --git a/gas/testsuite/gas/i386/arch-13-znver1.d b/gas/testsuite/gas/i386/arch-13-znver1.d index bafe606..b76cfab 100644 --- a/gas/testsuite/gas/i386/arch-13-znver1.d +++ b/gas/testsuite/gas/i386/arch-13-znver1.d @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.d b/gas/testsuite/gas/i386/arch-13.d index 370e641..6296ab7 100644 --- a/gas/testsuite/gas/i386/arch-13.d +++ b/gas/testsuite/gas/i386/arch-13.d @@ -1,4 +1,4 @@ -#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt +#as: -march=i686+smap+adx+rdseed+clzero+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: i386 arch 13 @@ -16,4 +16,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f c7 21 xsavec \(%ecx\) [ ]*[a-f0-9]+: 0f c7 29 xsaves \(%ecx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%ecx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx #pass diff --git a/gas/testsuite/gas/i386/arch-13.s b/gas/testsuite/gas/i386/arch-13.s index 5e1969f..4e82ff6 100644 --- a/gas/testsuite/gas/i386/arch-13.s +++ b/gas/testsuite/gas/i386/arch-13.s @@ -16,4 +16,8 @@ xsavec (%ecx) xsaves (%ecx) #CLFLUSHOPT clflushopt (%ecx) - +monitorx %eax, %ecx, %edx +monitorx %ax, %ecx, %edx +monitorx +mwaitx %eax, %ecx, %ebx +mwaitx diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 9ff38d3..d36d5c6 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -340,6 +340,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "avx512vbmi_vl-intel" run_dump_test "clzero" run_dump_test "disassem" + run_dump_test "mwaitx-bdver4" + run_list_test "mwaitx-reg" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. @@ -721,6 +723,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-avx512vbmi_vl" run_dump_test "x86-64-avx512vbmi_vl-intel" run_dump_test "x86-64-clzero" + run_dump_test "x86-64-mwaitx-bdver4" + run_list_test "x86-64-mwaitx-reg" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/mwaitx-bdver4.d b/gas/testsuite/gas/i386/mwaitx-bdver4.d new file mode 100644 index 0000000..7a09db6 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: i386 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +00000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %ax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %eax,%ecx,%edx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx +#pass diff --git a/gas/testsuite/gas/i386/mwaitx-reg.l b/gas/testsuite/gas/i386/mwaitx-reg.l new file mode 100644 index 0000000..68ea6e9 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.l @@ -0,0 +1,59 @@ +#as: -march=mwaitx +.*: Assembler messages: +#eax +.*:[0-9]*: Error: .*eax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*eax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*eax.* 3 .*mwaitx.* + +#ebx +.*:[0-9]*: Error: .*ebx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebx.* 2 .*mwaitx.* + +#ecx +.*:[0-9]*: Error: .*ecx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ecx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ecx.* 3 .*mwaitx.* + +#edx +.*:[0-9]*: Error: .*edx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edx.* 3 .*mwaitx.* + +#esp +.*:[0-9]*: Error: .*esp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esp.* 3 .*mwaitx.* + +#ebp +.*:[0-9]*: Error: .*ebp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*ebp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*ebp.* 3 .*mwaitx.* + +#esi +.*:[0-9]*: Error: .*esi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*esi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*esi.* 3 .*mwaitx.* + +#edi +.*:[0-9]*: Error: .*edi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*edi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*edi.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/mwaitx-reg.s b/gas/testsuite/gas/i386/mwaitx-reg.s new file mode 100644 index 0000000..aa2e229 --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di + monitorx %e\reg, %ecx, %edx + monitorx %eax, %e\reg, %edx + monitorx %eax, %ecx, %e\reg + mwaitx %e\reg, %ecx, %ebx + mwaitx %eax, %e\reg, %ebx + mwaitx %eax, %ecx, %e\reg +.endr diff --git a/gas/testsuite/gas/i386/mwaitx.s b/gas/testsuite/gas/i386/mwaitx.s new file mode 100644 index 0000000..7bd7a3a --- /dev/null +++ b/gas/testsuite/gas/i386/mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %eax, %ecx, %edx + monitorx %ax, %ecx, %edx + monitorx + mwaitx %eax, %ecx, %ebx + mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d index 9066855..2fc0a1f 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3-znver1.d @@ -18,4 +18,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.d b/gas/testsuite/gas/i386/x86-64-arch-3.d index 7b0792a..6a7fb00 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.d +++ b/gas/testsuite/gas/i386/x86-64-arch-3.d @@ -1,4 +1,4 @@ -#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt +#as: -march=generic64+smap+adx+rdseed+clzero+sha+xsavec+xsaves+clflushopt+mwaitx #objdump: -dw #name: x86-64 arch 3 @@ -17,4 +17,9 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\) [ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\) [ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\) +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx #pass diff --git a/gas/testsuite/gas/i386/x86-64-arch-3.s b/gas/testsuite/gas/i386/x86-64-arch-3.s index 76c4226..2096efc 100644 --- a/gas/testsuite/gas/i386/x86-64-arch-3.s +++ b/gas/testsuite/gas/i386/x86-64-arch-3.s @@ -18,4 +18,8 @@ xsavec64 (%rcx) xsaves64 (%rcx) #CLFLUSHOPT clflushopt (%rcx) - +monitorx %rax,%rcx,%rdx +monitorx %eax,%rcx,%rdx +monitorx +mwaitx %rax,%rcx,%rbx +mwaitx diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d new file mode 100644 index 0000000..f35ad11 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-bdver4.d @@ -0,0 +1,17 @@ +#source: x86-64-mwaitx.s +#as: -march=bdver4 +#objdump: -dw +#name: x86_64 monitorx and mwaitx insn + +.*: +file format .* + + +Disassembly of section \.text: + +0000000000000000 <_start>: +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx +#pass diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l new file mode 100644 index 0000000..ea1fef0 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.l @@ -0,0 +1,123 @@ +#as: -march=mwaitx +.*: Assembler messages: +#rax +.*:[0-9]*: Error: .*rax.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rax.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rax.* 3 .*mwaitx.* + +#rbx +.*:[0-9]*: Error: .*rbx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbx.* 2 .*mwaitx.* + +#rcx +.*:[0-9]*: Error: .*rcx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rcx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rcx.* 3 .*mwaitx.* + +#rdx +.*:[0-9]*: Error: .*rdx.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdx.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdx.* 3 .*mwaitx.* + +#rsp +.*:[0-9]*: Error: .*rsp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsp.* 3 .*mwaitx.* + +#rbp +.*:[0-9]*: Error: .*rbp.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rbp.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rbp.* 3 .*mwaitx.* + +#rsi +.*:[0-9]*: Error: .*rsi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rsi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rsi.* 3 .*mwaitx.* + +#rdi +.*:[0-9]*: Error: .*rdi.* 1 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 2 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 3 .*monitorx.* +.*:[0-9]*: Error: .*rdi.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*rdi.* 3 .*mwaitx.* + +#r8 +.*:[0-9]*: Error: .*r8.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r8.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r8.* 3 .*mwaitx.* + +#r9 +.*:[0-9]*: Error: .*r9.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r9.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r9.* 3 .*mwaitx.* + +#r10 +.*:[0-9]*: Error: .*r10.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r10.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r10.* 3 .*mwaitx.* + +#r11 +.*:[0-9]*: Error: .*r11.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r11.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r11.* 3 .*mwaitx.* + +#r12 +.*:[0-9]*: Error: .*r12.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r12.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r12.* 3 .*mwaitx.* + +#r13 +.*:[0-9]*: Error: .*r13.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r13.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r13.* 3 .*mwaitx.* + +#r14 +.*:[0-9]*: Error: .*r14.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r14.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r14.* 3 .*mwaitx.* + +#r15 +.*:[0-9]*: Error: .*r15.* 1 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 2 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 3 .*monitorx.* +.*:[0-9]*: Error: .*r15.* 1 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 2 .*mwaitx.* +.*:[0-9]*: Error: .*r15.* 3 .*mwaitx.* diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s new file mode 100644 index 0000000..5df5f8c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx-reg.s @@ -0,0 +1,8 @@ +.irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15 + monitorx %r\reg, %rcx, %rdx + monitorx %rax, %r\reg, %rdx + monitorx %rax, %rcx, %r\reg + mwaitx %r\reg, %rcx, %rbx + mwaitx %rax, %r\reg, %rbx + mwaitx %rax, %rcx, %r\reg +.endr diff --git a/gas/testsuite/gas/i386/x86-64-mwaitx.s b/gas/testsuite/gas/i386/x86-64-mwaitx.s new file mode 100644 index 0000000..0f58d3c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-mwaitx.s @@ -0,0 +1,9 @@ +# Check monitorx and mwaitx instructions + + .text +_start: + monitorx %rax, %rcx, %rdx + monitorx %eax, %rcx, %rdx + monitorx + mwaitx %rax, %rcx, %rbx + mwaitx diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 84eff1e..5b5cf26 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-06-30 Amit Pawar <Amit.Pawar@amd.com> + + * i386-dis.c (rm_table): Add monitorx/mwaitx. + * i386-gen.c (cpu_flag_init): Add new CPU_MWAITX_FLAGS. + * i386-opc.h: Add CpuMWAITX. + * i386-opc.tbl: Add monitorx and mwaitx. + 2015-06-22 Peter Bergner <bergner@vnet.ibm.com> * ppc-opc.c (insert_ls): Test for invalid LS operands. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 767bab3..e768029 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -102,6 +102,7 @@ static void VPCMP_Fixup (int, int); static void OP_0f07 (int, int); static void OP_Monitor (int, int); static void OP_Mwait (int, int); +static void OP_Mwaitx (int, int); static void NOP_Fixup1 (int, int); static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); @@ -12072,8 +12073,8 @@ static const struct dis386 rm_table[][8] = { /* RM_0F01_REG_7 */ { "swapgs", { Skip_MODRM }, 0 }, { "rdtscp", { Skip_MODRM }, 0 }, - { Bad_Opcode }, - { Bad_Opcode }, + { "monitorx", { { OP_Monitor, 0 } }, 0 }, + { "mwaitx", { { OP_Mwaitx, 0 } }, 0 }, { "clzero", { Skip_MODRM }, 0 }, }, { @@ -16452,6 +16453,25 @@ CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) } static void +OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED, + int sizeflag ATTRIBUTE_UNUSED) +{ + /* mwaitx %eax,%ecx,%ebx */ + if (!intel_syntax) + { + const char **names = (address_mode == mode_64bit + ? names64 : names32); + strcpy (op_out[0], names[0]); + strcpy (op_out[1], names[1]); + strcpy (op_out[2], names[3]); + two_source_ops = 1; + } + /* Skip mod/rm byte. */ + MODRM_CHECK; + codep++; +} + +static void OP_Mwait (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0523936..5aca18a 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,9 +94,9 @@ static initializer cpu_flag_init[] = { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BDVER4_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", @@ -253,6 +253,8 @@ static initializer cpu_flag_init[] = "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512VBMI" }, { "CPU_CLZERO_FLAGS", "CpuCLZERO" }, + { "CPU_MWAITX_FLAGS", + "CpuMWAITX" }, }; static initializer operand_type_init[] = @@ -457,6 +459,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuMPX), BITFIELD (CpuAVX512IFMA), BITFIELD (CpuAVX512VBMI), + BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuAMD64), BITFIELD (CpuIntel64), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 62ac42a..d598ce5 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -194,6 +194,8 @@ enum CpuAVX512IFMA, /* Intel AVX-512 VBMI Instructions support required. */ CpuAVX512VBMI, + /* mwaitx instruction required */ + CpuMWAITX, /* Clzero instruction required */ CpuCLZERO, /* 64bit support required */ @@ -304,6 +306,7 @@ typedef union i386_cpu_flags unsigned int cpupcommit:1; unsigned int cpuavx512ifma:1; unsigned int cpuavx512vbmi:1; + unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpu64:1; unsigned int cpuno64:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a3bd7de..ed6fe63 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -5938,3 +5938,16 @@ clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf| // CLZERO instructions end +// MONITORX/MWAITX instructions +monitorx, 0, 0xf01, 0xfa, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "monitorx %eax/%ax,%ecx,%edx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 } +// Need to ensure only "monitorx %rax/%eax,%rcx,%rdx" is accepted. +monitorx, 3, 0xf01, 0xfa, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 } + +mwaitx, 0, 0xf01, 0xfb, 2, CpuMWAITX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 } +// Need to ensure only "mwaitx %eax,%ecx,%ebx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoAVX, { Reg32, Reg32, Reg32 } +// Need to ensure only "mwaitx %rax,%rcx,%rbx" is accepted. +mwaitx, 3, 0xf01, 0xfb, 2, CpuMWAITX|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|NoRex64|NoAVX, { Reg64, Reg64, Reg64 } +// MONITORX/MWAITX instructions end -- 1.9.1 ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-30 6:58 ` Pawar, Amit @ 2015-06-30 14:53 ` H.J. Lu 2015-06-30 15:39 ` Pawar, Amit 0 siblings, 1 reply; 27+ messages in thread From: H.J. Lu @ 2015-06-30 14:53 UTC (permalink / raw) To: Pawar, Amit; +Cc: Andreas Schwab, binutils, Jan Beulich On Mon, Jun 29, 2015 at 11:58 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA patch created using "git format-patch -1". Please commit it. > I checked it in for you after fixing up ChangeLog entries. Please provide proper ChangeLog entries next time. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-30 14:53 ` H.J. Lu @ 2015-06-30 15:39 ` Pawar, Amit 0 siblings, 0 replies; 27+ messages in thread From: Pawar, Amit @ 2015-06-30 15:39 UTC (permalink / raw) To: H.J. Lu; +Cc: Andreas Schwab, binutils, Jan Beulich Thank you and I will take care next time. Amit -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Tuesday, June 30, 2015 8:23 PM To: Pawar, Amit Cc: Andreas Schwab; binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Mon, Jun 29, 2015 at 11:58 PM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA patch created using "git format-patch -1". Please commit it. > I checked it in for you after fixing up ChangeLog entries. Please provide proper ChangeLog entries next time. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* RE: [PATH] AMD MWAITX enablement 2015-06-26 16:43 ` H.J. Lu 2015-06-26 16:52 ` Pawar, Amit @ 2015-06-26 17:06 ` Pawar, Amit 2015-06-26 17:08 ` H.J. Lu 1 sibling, 1 reply; 27+ messages in thread From: Pawar, Amit @ 2015-06-26 17:06 UTC (permalink / raw) To: H.J. Lu; +Cc: binutils, Jan Beulich Can you please apply it to the trunk ? I do have access to it. Thank you. -----Original Message----- From: H.J. Lu [mailto:hjl.tools@gmail.com] Sent: Friday, June 26, 2015 10:14 PM To: Pawar, Amit Cc: binutils@sourceware.org; Jan Beulich Subject: Re: [PATH] AMD MWAITX enablement On Fri, Jun 26, 2015 at 9:39 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > PFA MWAITX updated patch. Is it OK? > + for (x = 0; x < 2; x++) + if (register_number (i.op[x].regs) != x) + goto bad_register_operand; Please fix indentation. + + /* Check for third operand for mwaitx/monitorx insn*/ + if (register_number (i.op[2].regs) != + ( 2 + (i.tm.extension_opcode == 0xfb))) ^^ Remove extra space before 2. Please use "x" instead of "2". + { +bad_register_operand: + as_bad (_("can't use register '%s%s' as operand %d in '%s'."), + register_prefix, i.op[x].regs->reg_name, x+1, + i.tm.name); + } OK with those changes. Thanks. -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATH] AMD MWAITX enablement 2015-06-26 17:06 ` Pawar, Amit @ 2015-06-26 17:08 ` H.J. Lu 0 siblings, 0 replies; 27+ messages in thread From: H.J. Lu @ 2015-06-26 17:08 UTC (permalink / raw) To: Pawar, Amit; +Cc: binutils, Jan Beulich On Fri, Jun 26, 2015 at 10:06 AM, Pawar, Amit <Amit.Pawar@amd.com> wrote: > Can you please apply it to the trunk ? I do have access to it. Thank you. > Please generate a patch with a proper commit log using # git format-patch -- H.J. ^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2015-06-30 15:39 UTC | newest] Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2015-06-02 6:56 [PATH] AMD MWAITX enablement Pawar, Amit 2015-06-02 8:22 ` Jan Beulich 2015-06-02 13:35 ` Pawar, Amit 2015-06-08 6:16 ` Pawar, Amit 2015-06-08 7:05 ` Jan Beulich 2015-06-10 9:37 ` Pawar, Amit 2015-06-25 7:55 ` Pawar, Amit 2015-06-25 9:26 ` H.J. Lu 2015-06-26 5:46 ` Pawar, Amit 2015-06-26 10:04 ` H.J. Lu 2015-06-26 11:09 ` Pawar, Amit 2015-06-26 11:55 ` H.J. Lu 2015-06-26 15:00 ` Pawar, Amit 2015-06-26 15:04 ` H.J. Lu 2015-06-26 16:26 ` Pawar, Amit 2015-06-26 16:30 ` H.J. Lu 2015-06-26 16:33 ` Pawar, Amit 2015-06-26 16:39 ` Pawar, Amit 2015-06-26 16:43 ` H.J. Lu 2015-06-26 16:52 ` Pawar, Amit 2015-06-26 18:02 ` Andreas Schwab 2015-06-27 5:20 ` Pawar, Amit 2015-06-30 6:58 ` Pawar, Amit 2015-06-30 14:53 ` H.J. Lu 2015-06-30 15:39 ` Pawar, Amit 2015-06-26 17:06 ` Pawar, Amit 2015-06-26 17:08 ` H.J. Lu
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).