From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 10935 invoked by alias); 23 May 2006 13:34:24 -0000 Received: (qmail 10926 invoked by uid 22791); 23 May 2006 13:34:23 -0000 X-Spam-Check-By: sourceware.org Received: from intranet.codesourcery.com (HELO mail.codesourcery.com) (65.74.133.6) by sourceware.org (qpsmtpd/0.31) with ESMTP; Tue, 23 May 2006 13:34:19 +0000 Received: (qmail 14399 invoked by uid 1010); 23 May 2006 13:34:18 -0000 From: Richard Sandiford To: Thiemo Seufer Mail-Followup-To: Thiemo Seufer ,binutils@sourceware.org, richard@codesourcery.com Cc: binutils@sourceware.org Subject: Re: [PATCH] Better checking of ISA/ASE/ABI options for MIPS gas References: <20060522202627.GE30254@networkno.de> <20060523130537.GE9061@networkno.de> Date: Tue, 23 May 2006 21:01:00 -0000 In-Reply-To: <20060523130537.GE9061@networkno.de> (Thiemo Seufer's message of "Tue, 23 May 2006 14:05:37 +0100") Message-ID: <877j4cc1ba.fsf@talisman.home> User-Agent: Gnus/5.110006 (No Gnus v0.6) Emacs/21.4 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2006-05/txt/msg00413.txt.bz2 Thiemo Seufer writes: > Updated to take all comments into account, and expanded to allow also > for .set fp={23,64,default}. Thanks for agreeing to do this. The new patch looks really good to me FWIW. (There are a couple of minor documentation niggles below.) > Richard, do you care about the gcc update (if/when the release cycle > permits it)? I'm not sure what you mean here, but I'd certainly like to see gcc's & gas's option handling kept in sync, so the gcc equivalent of this patch is certainly welcome from my POV. And I'd see a long-lasting divergence between gas and gcc as a bug, so I'd be happy to use the discretion given to target maintainers and have the patch go in during stage 3. > +The @code{.set gp=32} and @code{.set fp=32} directives allow to change > +the size of registers for parts of an object. The default value is > +restored by @code{.set gp=default} and @code{.set fp=default}. > + "allow to" seems to be missing an object. "allow to" or "tell the assembler to" (as you used in later hunks). Or maybe: The @code{.set gp=32} and @code{.set fp=32} directives allow the size of registers to be changed for parts of an object. The default value is restored by @code{.set gp=default} and @code{.set fp=default}. > @item -mgp64 > -Assume that 64-bit general purpose registers are available. This is > -provided in the interests of symmetry with -gp32. > +@itemx -mfp64 > +Assume that 64-bit registers are available. This is provided in the > +interests of symmetry with @samp{-mgp32} and @samp{-mfp32}. > + > +The @code{.set gp=64} and @code{.set fp=64} directives allow to change > +the size of registers for parts of an object. The default value is > +restored by @code{.set gp=default} and @code{.set fp=default}. Same here. > -The directive @samp{.set mips16} puts the assembler into MIPS 16 mode, > -in which it will assemble instructions for the MIPS 16 processor. Use > -@samp{.set nomips16} to return to normal 32 bit mode. > +@cindex MIPS CPU override > +@kindex @code{.set arch=@var{cpu}} > +Even finer control provides the @code{.set arch=@var{cpu}} directive. "provides" -> "is provided by". Or: The @code{.set arch=@var{cpu}} directive provides even finer control. which flows better into: > +It changes the effective CPU target and allows to assemble instructions > +specific to a particular CPU. All CPUs supported by the @samp{-march} > +command line option are also selectable by this directive. The original > +value is restored by @code{.set arch=default}. Same "allows to" problem as above. The other doc bits looked fine to me. Richard