From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id ED53A3858C55 for ; Mon, 25 Jul 2022 13:34:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org ED53A3858C55 Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-106-67jYwQY-PC25T27x-MRVJQ-1; Mon, 25 Jul 2022 09:34:44 -0400 X-MC-Unique: 67jYwQY-PC25T27x-MRVJQ-1 Received: by mail-wm1-f72.google.com with SMTP id p2-20020a05600c1d8200b003a3262d9c51so8717105wms.6 for ; Mon, 25 Jul 2022 06:34:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=xZlBUJywNN7UK/dHV2M82FTqvjIsda3dJSaQjJePB7A=; b=YCrlxXvTaQBcI/R0f0EUtJJWdZsXJv0qB3fGYniXmM/eEKuZOUTnLKp5A/3sS4BHHR MiNuAYAgBCfBSdxzLSPWn/yzXU1CFqSGeN8E+rdZdXrmSHAAI/QOtjGLh75rU9ChhrBC AVkPTmypa7/uR8n/AmutomPhsFzkbo92U0GuFtayG5P2ZyiArfsny2L/Fmjq/hVNRt5I E/pUVIMOWJ+y6XKumLSeZamzUbfVI0Gf8+uvc6FxjYYQp4lB5Wnn48nL61btDABZDKVI M8YsHZeL8czvxEd4eucvPKZVHjgYLbbUD9Bx6zvnlTJzWxZBXg5MiaJ8TLSE9QvIbYoH Pcug== X-Gm-Message-State: AJIora8gie33EU1TF0eJDnk2FsuNkSdUaiQCPyTCil8HbPavUzMCcASQ ot4xxGoNhuwZpr//JGT8WvMpcuT4455sUuOXvF15+9GAXugqt1uqViTWlrDZCWTpdrxB9jvg5XO ILoE669BL0zM62daVpJEUUFaOyjhUJDKhfIKK4CbWzRc4lZaEk5FoZ0d+Fsv0k3DWhu0e0w== X-Received: by 2002:a5d:498f:0:b0:21e:4074:8c49 with SMTP id r15-20020a5d498f000000b0021e40748c49mr7959967wrq.70.1658756083032; Mon, 25 Jul 2022 06:34:43 -0700 (PDT) X-Google-Smtp-Source: AGRyM1u0/EeWAM9i2ktJwu1rBkx+UKrBKMXBG5sqVvJf++N2lG8OVkp9S0L5XhEM9k96tGbJH+bAhQ== X-Received: by 2002:a5d:498f:0:b0:21e:4074:8c49 with SMTP id r15-20020a5d498f000000b0021e40748c49mr7959951wrq.70.1658756082625; Mon, 25 Jul 2022 06:34:42 -0700 (PDT) Received: from localhost (15.72.115.87.dyn.plus.net. [87.115.72.15]) by smtp.gmail.com with ESMTPSA id n11-20020a05600c304b00b003a320b6d5eesm17082090wmh.15.2022.07.25.06.34.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Jul 2022 06:34:42 -0700 (PDT) From: Andrew Burgess To: Andrew Burgess via Binutils , binutils@sourceware.org Cc: Richard Earnshaw Subject: Re: [PATCHv5 1/2] opcodes: add new sub-mnemonic disassembler style In-Reply-To: References: Date: Mon, 25 Jul 2022 14:34:41 +0100 Message-ID: <87a68x9uz2.fsf@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-10.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Jul 2022 13:34:52 -0000 Andrew Burgess via Binutils writes: > When adding libopcodes disassembler styling support for AArch64, it > feels like the results would be improved by having a new sub-mnemonic > style. This will be used in cases like: > > add w16, w7, w1, uxtb #2 > ^^^^----- Here > > And: > > cinc w0, w1, ne > ^^----- Here > > This commit just adds the new style, and prepares objdump to handle > the style. A later commit will add AArch64 styling, and will actually > make use of the style. > > As this style is currently unused, there should be no user visible > changes after this commit. The dis_style_sub_mnemonic style has now been merged upstream as part of the ppc styling patches. The other patch in this series still needs approval. Thanks, Andrew > --- > binutils/objdump.c | 2 ++ > include/dis-asm.h | 7 +++++++ > 2 files changed, 9 insertions(+) > > diff --git a/binutils/objdump.c b/binutils/objdump.c > index 67824053527..4076587151c 100644 > --- a/binutils/objdump.c > +++ b/binutils/objdump.c > @@ -2167,6 +2167,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) > { > case dis_style_symbol: color = 32; break; > case dis_style_assembler_directive: > + case dis_style_sub_mnemonic: > case dis_style_mnemonic: color = 33; break; > case dis_style_register: color = 34; break; > case dis_style_address: > @@ -2185,6 +2186,7 @@ objdump_color_for_disassembler_style (enum disassembler_style style) > { > case dis_style_symbol: color = 40; break; > case dis_style_assembler_directive: > + case dis_style_sub_mnemonic: > case dis_style_mnemonic: color = 142; break; > case dis_style_register: color = 27; break; > case dis_style_address: > diff --git a/include/dis-asm.h b/include/dis-asm.h > index 4f91df12498..f1a83dc84e5 100644 > --- a/include/dis-asm.h > +++ b/include/dis-asm.h > @@ -62,6 +62,13 @@ enum disassembler_style > instructions. */ > dis_style_mnemonic, > > + /* Some architectures include additional mnemonic like fields within the > + instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where > + the 'lsl' is an additional piece of text that describes how the > + instruction should behave. This sub-mnemonic style can be used for > + these pieces of text. */ > + dis_style_sub_mnemonic, > + > /* For things that aren't real machine instructions, but rather > assembler directives, e.g. .byte, etc. */ > dis_style_assembler_directive, > -- > 2.25.4