Re: [PATCH] MIPS/GAS: Fix DWARF-2 with branch swapping for MIPS16 code

[Richard Sandiford <rdsandiford@googlemail.com>]

"Maciej W. Rozycki" <macro@codesourcery.com> writes:
>  BTW, I've been wondering about this construct:
>
>   return mask & ~0;
>
> you've introduced in a couple of places.

Oops.  Fixed below.

>  Also why "can not" instead of "cannot"?  My understanding of the 
> subtleties of English is this essentially means we "are allowed not to 
> swap" rather than we "are not allowed to swap".  The usual disclaimer 
> applies of course. ;)

Those comments were already there.  I just moved them around.

>  Finally I think the change below is needed as well.  We shouldn't be 
> relying on the meaning of FP_D for MIPS16 code as opcode flags are assumed 
> to have a different meaning in the MIPS16 table.  Granted, the location of 
> the FP_D bit hasn't been assigned to anything (yet), so it's guaranteed to 
> be zero and the check is harmless,

Yes.  I checked that before writing it this way.  It's guaranteed to be
harmless anyway, because "until" MIPS16 gets hardware FP support, we'd
never have any set bits.

I structured the code to be consistent with the GPR case.  If you feel
strongly about it though, feel free to move the conditions inside the
existing "!mips_opts.mips16" check.

Richard


gas/
	* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
	of register 0.

Index: gas/config/tc-mips.c
===================================================================
--- gas/config/tc-mips.c	2011-07-04 21:00:54.000000000 +0100
+++ gas/config/tc-mips.c	2011-07-04 21:01:13.000000000 +0100
@@ -2450,7 +2450,8 @@ gpr_read_mask (const struct mips_cl_insn
       if (pinfo2 & INSN2_READ_GPR_Z)
 	mask |= 1 << EXTRACT_OPERAND (RZ, *ip);
     }
-  return mask & ~0;
+  /* Don't include register 0.  */
+  return mask & ~1;
 }
 
 /* Return the mask of core registers that IP writes.  */
@@ -2492,7 +2493,8 @@ gpr_write_mask (const struct mips_cl_ins
       if (pinfo2 & INSN2_WRITE_GPR_Z)
 	mask |= 1 << EXTRACT_OPERAND (RZ, *ip);
     }
-  return mask & ~0;
+  /* Don't include register 0.  */
+  return mask & ~1;
 }
 
 /* Return the mask of floating-point registers that IP reads.  */