From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 332AA3858D32 for ; Mon, 30 Jan 2023 09:35:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 332AA3858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=redhat.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1675071303; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=QFqAkMkGIyNj9yzZsp1Zu9AbfOSxHGaLPnid9SofR+0=; b=WObZ+wcaqsBZhXZGBo2mOcAr1F2aYaPS3f6eSCkln3KaWYZARkHjm8+Eks/OGKpVWZCS/v XHzsIgEb8Q8FBsO7WtcA2tK9VM7EDN06eEQ5S6HD527Jwq0nslOh0MrOD37Ob4ofrRFTD7 883jIuHdnpnVLud253Vn0horwke0LtA= Received: from mail-qv1-f71.google.com (mail-qv1-f71.google.com [209.85.219.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_128_GCM_SHA256) id us-mta-658-FUb6Olp-PKWETay2hJ1F1g-1; Mon, 30 Jan 2023 04:35:02 -0500 X-MC-Unique: FUb6Olp-PKWETay2hJ1F1g-1 Received: by mail-qv1-f71.google.com with SMTP id px22-20020a056214051600b00537657b0449so6249965qvb.23 for ; Mon, 30 Jan 2023 01:35:02 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=mime-version:message-id:date:references:in-reply-to:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QFqAkMkGIyNj9yzZsp1Zu9AbfOSxHGaLPnid9SofR+0=; b=C98+KV+B4VahEtRxXQUMwErTPlT294AkLMlMYd8kas1Pzx9XjLDGgV88VKkfj2Iwkt Z2nqteLlwwjoiHXfag0weBYdarmfI8vqcfMEYuGJgtZ0FN2A11xhwNoYoN2t8PxXLKrd T2cKed/BH/L9Q9idW49e01D9QBCe5moG8cpJUPObXSpMjhDASg/RHAzwOWnbixqg16J7 GS7FePJdXepLDCilq093isTFUaFjIaY/vLBHk2uBYnxby+yBvB7P8tqpbljhkfuHyu5O 08Rwzx/6xsxuFQCdMKXbu8i1GG/InWxeA7eY9JFCEQLZO4nL3DBhVSnnTkVGi4JmsmSk a3+A== X-Gm-Message-State: AFqh2krUudxTZJ+P8Ay3j3IlUQeRJe1WrjLo6CiyNByP6jRxGaVcLtCM 0vw6IPgEmkwV55P5/+s1Ozcf/qBrSQ0Zuc+9+3JVqy4tGE6/m1Kr0Zbq9qRxiXMC8g2ljpR6+jb fi1cf+jAxV6A/56nX8A== X-Received: by 2002:a05:622a:5da4:b0:3b5:bd73:12bc with SMTP id fu36-20020a05622a5da400b003b5bd7312bcmr61925532qtb.42.1675071301487; Mon, 30 Jan 2023 01:35:01 -0800 (PST) X-Google-Smtp-Source: AMrXdXtNnjwcjmuIEU4eVWQGo6RwfII3p+t2ND5bI04J+cJC3jQYOOmWWkihRXHhVop/ft1rWa5RKA== X-Received: by 2002:a05:622a:5da4:b0:3b5:bd73:12bc with SMTP id fu36-20020a05622a5da400b003b5bd7312bcmr61925516qtb.42.1675071301146; Mon, 30 Jan 2023 01:35:01 -0800 (PST) Received: from localhost (95.72.115.87.dyn.plus.net. [87.115.72.95]) by smtp.gmail.com with ESMTPSA id a8-20020ae9e808000000b0071dc769d5e7sm2568297qkg.56.2023.01.30.01.35.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 01:35:00 -0800 (PST) From: Andrew Burgess To: "Maciej W. Rozycki" Cc: binutils@sourceware.org Subject: Re: [PATCH 1/2] opcodes/mips: use .word/.short for undefined instructions In-Reply-To: References: <87fscny5tr.fsf@redhat.com> <87a62hfoa5.fsf@redhat.com> Date: Mon, 30 Jan 2023 09:34:58 +0000 Message-ID: <87o7qguzzx.fsf@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: "Maciej W. Rozycki" writes: > On Tue, 17 Jan 2023, Andrew Burgess wrote: > >> Sorry for the time taken to prepare this patch. Let me know if you're >> happy for my to push the below, or if there's anything else that's >> needed. > > This is mostly OK, thank you, but see below. > >> diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp >> index 6a0ec25a06f..f43109a75b8 100644 >> --- a/binutils/testsuite/binutils-all/mips/mips.exp >> +++ b/binutils/testsuite/binutils-all/mips/mips.exp >> @@ -266,3 +266,7 @@ run_dump_test_n64 "global-local-symtab-sort-n64${tmips}" >> run_dump_test_o32 "global-local-symtab-final-o32" useld >> run_dump_test_n32 "global-local-symtab-final-n32" useld >> run_dump_test_n64 "global-local-symtab-final-n64" useld >> + >> +run_dump_test_o32 "micromips-reserved-enc" >> +run_dump_test_n32 "micromips-reserved-enc" >> +run_dump_test_n64 "micromips-reserved-enc" > > Our convention has been not to have duplicate test names, so please > create separate .d files for each of these three tests (we have no better > way at the moment, although one could envisage appending the ABI name > automatically). See e.g. global-local-symtab-sort-n32.d in the same > directory and the `source' and `dump' keywords within for how you can > avoid duplicating identical sources and dumps. > >> diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c >> index 6a513cd8946..80c35f4a5e0 100644 >> --- a/opcodes/mips-dis.c >> +++ b/opcodes/mips-dis.c >> @@ -2601,11 +2601,19 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) >> } >> >> if (length == 2) >> - infprintf (is, dis_style_assembler_directive, ".short"); >> + { >> + infprintf (is, dis_style_assembler_directive, ".short"); >> + infprintf (is, dis_style_text, "\t"); >> + infprintf (is, dis_style_immediate, "0x%x", insn); >> + } >> else >> - infprintf (is, dis_style_assembler_directive, ".word"); >> - infprintf (is, dis_style_text, "\t"); >> - infprintf (is, dis_style_immediate, "0x%x", insn); >> + { >> + infprintf (is, dis_style_assembler_directive, ".short"); >> + infprintf (is, dis_style_text, "\t"); >> + infprintf (is, dis_style_immediate, "0x%x", (insn >> 16) & 0xffff); >> + infprintf (is, dis_style_text, ", "); >> + infprintf (is, dis_style_immediate, "0x%x", (insn & 0xffff)); >> + } > > Now that I have looked at it again I've been wondering if: > > infprintf (is, dis_style_assembler_directive, ".short"); > infprintf (is, dis_style_text, "\t"); > if (length != 2) > { > infprintf (is, dis_style_immediate, "0x%x", (insn >> 16) & 0xffff); > infprintf (is, dis_style_text, ", "); > } > infprintf (is, dis_style_immediate, "0x%x", (insn & 0xffff)); > > might be more desirably avoiding some code duplication, but I'll leave it > up to you to decide if to keep your original proposal or whether to switch > to this alternative. Maciej, Thanks for your continues feedback. I've updated the patch. Let me know what you think. Thanks, Andrew --- commit fe08c994fa9431909a6e63582b0a7f4c34f6e826 Author: Andrew Burgess Date: Fri Jan 6 16:42:23 2023 +0000 opcodes/mips: disassemble unknown micromips instructions as two shorts Before commit: commit 2438b771ee07be19d5b01ea55e077dd8b7cef445 Date: Wed Nov 2 15:53:43 2022 +0000 opcodes/mips: use .word/.short for undefined instructions unknown 32-bit microMIPS instructions were disassembled as a raw 32-bit number with no '.word' directive. The above commit changed this and added a '.word' directive before the 32-bit number. It was pointed out on the mailing list, that for microMIPS it would be better to display such 32-bit instructions using a '.short' directive followed by two 16-bit values. This commit updates the mips disassembler to do this, and adds a new test that validates this output. diff --git a/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n32.d b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n32.d new file mode 100644 index 00000000000..e6608f30265 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n32.d @@ -0,0 +1,5 @@ +#PROG: objcopy +#objdump: -d --prefix-addresses --show-raw-insn +#name: microMIPS source file contains reserved encoding (n32) +#source: micromips-reserved-enc.s +#dump: micromips-reserved-enc-o32.d diff --git a/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n64.d b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n64.d new file mode 100644 index 00000000000..f892bfabbe7 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-n64.d @@ -0,0 +1,5 @@ +#PROG: objcopy +#objdump: -d --prefix-addresses --show-raw-insn +#name: microMIPS source file contains reserved encoding (n64) +#source: micromips-reserved-enc.s +#dump: micromips-reserved-enc-o32.d diff --git a/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-o32.d b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-o32.d new file mode 100644 index 00000000000..3de3989b37a --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc-o32.d @@ -0,0 +1,10 @@ +#PROG: objcopy +#objdump: -d --prefix-addresses --show-raw-insn +#name: microMIPS source file contains reserved encoding (o32) +#source: micromips-reserved-enc.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 7f6e 5d4c \.short 0x7f6e, 0x5d4c + \.\.\. diff --git a/binutils/testsuite/binutils-all/mips/micromips-reserved-enc.s b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc.s new file mode 100644 index 00000000000..59f0f763964 --- /dev/null +++ b/binutils/testsuite/binutils-all/mips/micromips-reserved-enc.s @@ -0,0 +1,4 @@ + .module micromips +foo: + .insn + .short 0x7f6e, 0x5d4c diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp index 6a0ec25a06f..91bf3274592 100644 --- a/binutils/testsuite/binutils-all/mips/mips.exp +++ b/binutils/testsuite/binutils-all/mips/mips.exp @@ -266,3 +266,7 @@ run_dump_test_n64 "global-local-symtab-sort-n64${tmips}" run_dump_test_o32 "global-local-symtab-final-o32" useld run_dump_test_n32 "global-local-symtab-final-n32" useld run_dump_test_n64 "global-local-symtab-final-n64" useld + +run_dump_test_o32 "micromips-reserved-enc-o32" +run_dump_test_n32 "micromips-reserved-enc-n32" +run_dump_test_n64 "micromips-reserved-enc-n64" diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 6a513cd8946..859d4e3806f 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -2600,12 +2600,15 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) } } - if (length == 2) - infprintf (is, dis_style_assembler_directive, ".short"); - else - infprintf (is, dis_style_assembler_directive, ".word"); + infprintf (is, dis_style_assembler_directive, ".short"); infprintf (is, dis_style_text, "\t"); - infprintf (is, dis_style_immediate, "0x%x", insn); + if (length != 2) + { + infprintf (is, dis_style_immediate, "0x%x", (insn >> 16) & 0xffff); + infprintf (is, dis_style_text, ", "); + } + infprintf (is, dis_style_immediate, "0x%x", (insn & 0xffff)); + info->insn_type = dis_noninsn; return length;