From: Richard Sandiford <rdsandiford@googlemail.com>
To: "Maciej W. Rozycki" <macro@codesourcery.com>
Cc: David Daney <ddaney@caviumnetworks.com>,
Andrew Pinski <andrew.pinski@caviumnetworks.com>,
<binutils@sourceware.org>
Subject: Re: [PATCH] MIPS: Opcode membership proposal
Date: Thu, 17 Nov 2011 18:45:00 -0000 [thread overview]
Message-ID: <87obway4f5.fsf@firetop.home> (raw)
In-Reply-To: <alpine.DEB.1.10.1110311233290.28657@tp.orcam.me.uk> (Maciej W. Rozycki's message of "Mon, 31 Oct 2011 12:46:47 +0000")
"Maciej W. Rozycki" <macro@codesourcery.com> writes:
> @@ -830,37 +833,38 @@ static const unsigned int mips_isa_table
> ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
> test, or zero if no CPU specific ISA test is desired. */
>
> -#define OPCODE_IS_MEMBER(insn, isa, cpu) \
> - (((isa & INSN_ISA_MASK) != 0 \
> - && ((insn)->membership & INSN_ISA_MASK) != 0 \
> - && ((mips_isa_table [(isa & INSN_ISA_MASK) - 1] >> \
> - (((insn)->membership & INSN_ISA_MASK) - 1)) & 1) != 0) \
> - || ((isa & ~INSN_ISA_MASK) \
> - & ((insn)->membership & ~INSN_ISA_MASK)) != 0 \
> - || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \
> - || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \
> - || (cpu == CPU_RM9000 && ((insn)->membership & INSN_4650) != 0) \
> - || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
> - || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
> - || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
> - || ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000 \
> - || cpu == CPU_R16000) \
> - && ((insn)->membership & INSN_10000) != 0) \
> - || (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \
> - || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
> - || (cpu == CPU_VR4120 && ((insn)->membership & INSN_4120) != 0) \
> - || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0) \
> - || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0) \
> - || (cpu == CPU_LOONGSON_2E \
> - && ((insn)->membership & INSN_LOONGSON_2E) != 0) \
> - || (cpu == CPU_LOONGSON_2F \
> - && ((insn)->membership & INSN_LOONGSON_2F) != 0) \
> - || (cpu == CPU_LOONGSON_3A \
> - && ((insn)->membership & INSN_LOONGSON_3A) != 0) \
> - || (cpu == CPU_OCTEON \
> - && ((insn)->membership & INSN_OCTEON) != 0) \
> - || (cpu == CPU_XLR && ((insn)->membership & INSN_XLR) != 0) \
> - || 0) /* Please keep this term for easier source merging. */
> +#define OPCODE_IS_MEMBER(insn, isa, cpu) \
> + ((((isa & INSN_ISA_MASK) != 0 \
> + && ((insn)->membership & INSN_ISA_MASK) != 0 \
> + && ((mips_isa_table [(isa & INSN_ISA_MASK) - 1] >> \
> + (((insn)->membership & INSN_ISA_MASK) - 1)) & 1) != 0) \
> + || ((isa & ~INSN_ISA_MASK) \
> + & ((insn)->membership & ~INSN_ISA_MASK)) != 0 \
> + || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \
> + || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \
> + || (cpu == CPU_RM9000 && ((insn)->membership & INSN_4650) != 0) \
> + || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
> + || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
> + || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
> + || ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000 \
> + || cpu == CPU_R16000) \
> + && ((insn)->membership & INSN_10000) != 0) \
> + || (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \
> + || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \
> + || (cpu == CPU_VR4120 && ((insn)->membership & INSN_4120) != 0) \
> + || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0) \
> + || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0) \
> + || (cpu == CPU_LOONGSON_2E \
> + && ((insn)->membership & INSN_LOONGSON_2E) != 0) \
> + || (cpu == CPU_LOONGSON_2F \
> + && ((insn)->membership & INSN_LOONGSON_2F) != 0) \
> + || (cpu == CPU_LOONGSON_3A \
> + && ((insn)->membership & INSN_LOONGSON_3A) != 0) \
> + || (cpu == CPU_OCTEON && ((insn)->membership & INSN_OCTEON) != 0) \
> + || (cpu == CPU_XLR && ((insn)->membership & INSN_XLR) != 0) \
> + || 0) /* Please keep this term for easier source merging. */ \
> + && ((cpu != CPU_OCTEON || ((insn)->exclusions & CPU_OCTEON) == 0) \
Looks like a typo for "((insn)->exclusions & INSN_OCTEON) == 0".
To help avoid this sort of thing, and to avoid making the patch
unnecessarily Octeon-specific, I think the CPU/mask test should
be split out. Specifically:
/* Return true if the given CPU is included in INSN_* mask MASK. */
static bfd_boolean
cpu_is_member (int cpu, unsigned int mask)
{
switch (cpu)
{
case CPU_R4650:
case CPU_RM7000:
case CPU_RM9000:
return (mask & INSN_4650) != 0;
case CPU_R4010:
return (mask & INSN_4010) != 0;
case CPU_VR4100:
return (mask & INSN_4100) != 0;
case CPU_R3900:
return (mask & INSN_3900) != 0;
case CPU_R10000:
case CPU_R12000:
case CPU_R14000:
case CPU_R16000:
return (mask & INSN_10000) != 0;
case CPU_SB1:
return (mask & INSN_SB1) != 0;
case CPU_R4111:
return (mask & INSN_4111) != 0;
case CPU_VR4120:
return (mask & INSN_4120) != 0;
case CPU_VR5400:
return (mask & INSN_5400) != 0;
case CPU_VR5500:
return (mask & INSN_5500) != 0;
case CPU_LOONGSON_2E:
return (mask & INSN_LOONGSON_2E) != 0;
case CPU_LOONGSON_2F:
return (mask & INSN_LOONGSON_2F) != 0;
case CPU_LOONGSON_3A:
return (mask & INSN_LOONGSON_3A) != 0;
case CPU_OCTEON:
return (mask & INSN_OCTEON) != 0;
case CPU_XLR:
return (mask & INSN_XLR) != 0;
default:
return FALSE;
}
/* Return true if instruction MO is available when assembling for
the given ISA and CPU. */
static bfd_boolean
opcode_is_member (const struct mips_opcode *mo, int isa, int cpu)
{
if (!cpu_is_member (cpu, mo->exclusions))
{
/* Test for ISA level compatibility. */
if ((isa & INSN_ISA_MASK) != 0
&& (mo->membership & INSN_ISA_MASK) != 0
&& ((mips_isa_table[(isa & INSN_ISA_MASK) - 1]
>> ((mo->membership & INSN_ISA_MASK) - 1)) & 1) != 0)
return TRUE;
/* Test for ASE compatibility. */
if (((isa & ~INSN_ISA_MASK) & (mo->membership & ~INSN_ISA_MASK)) != 0)
return TRUE;
/* Test for processor-specific extensions. */
if (cpu_is_member (cpu, mo->membership))
return TRUE;
}
return FALSE;
}
(untested, so please fix the inevitable errors).
> +NO_WFIELD = @NO_WFIELD@
I think this name loses too much information. Just call it
NO_WMISSING_FIELD_INITIALIZERS.
OK with those changes.
Richard
next prev parent reply other threads:[~2011-11-17 18:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-18 12:55 Maciej W. Rozycki
2010-12-20 18:15 ` David Daney
2010-12-20 18:33 ` Andrew Pinski
2011-10-31 12:47 ` Maciej W. Rozycki
2011-11-17 18:45 ` Richard Sandiford [this message]
2012-08-10 11:08 ` Maciej W. Rozycki
2012-08-12 18:33 ` Richard Sandiford
2012-08-13 14:56 ` Maciej W. Rozycki
2013-06-17 11:51 ` Alan Modra
2013-06-17 15:18 ` Maciej W. Rozycki
2013-06-17 19:53 ` Richard Sandiford
2013-06-17 22:30 ` Maciej W. Rozycki
2013-06-18 0:27 ` Alan Modra
2013-06-24 14:28 ` Maciej W. Rozycki
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