* Thumb32 assembler (15/69)
@ 2005-04-26 9:59 Zack Weinberg
0 siblings, 0 replies; only message in thread
From: Zack Weinberg @ 2005-04-26 9:59 UTC (permalink / raw)
To: binutils
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Tidying: enum arm_reg_type doesn't need initializers, and introduce a
prefix on the VFP register class names to indicate that they belong to
the VFP unit, like all the other coprocessor registers.
zw
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* config/tc-arm.c (enum arm_reg_type): Remove unnecessary initializers.
(REG_TYPE_SN): Rename REG_TYPE_VFS.
(REG_TYPE_DN): Rename REG_TYPE_VFD.
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
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===================================================================
Index: gas/config/tc-arm.c
--- gas/config/tc-arm.c (revision 16)
+++ gas/config/tc-arm.c (revision 17)
@@ -394,22 +394,22 @@
architecture extensions' registers. */
enum arm_reg_type
{
- REG_TYPE_RN = 0,
- REG_TYPE_CP = 1,
- REG_TYPE_CN = 2,
- REG_TYPE_FN = 3,
- REG_TYPE_SN = 4,
- REG_TYPE_DN = 5,
- REG_TYPE_MVF = 6,
- REG_TYPE_MVD = 7,
- REG_TYPE_MVFX = 8,
- REG_TYPE_MVDX = 9,
- REG_TYPE_MVAX = 10,
- REG_TYPE_DSPSC = 11,
- REG_TYPE_MMXWR = 12,
- REG_TYPE_MMXWC = 13,
- REG_TYPE_MMXWCG = 14,
- REG_TYPE_XSCALE = 15,
+ REG_TYPE_RN,
+ REG_TYPE_CP,
+ REG_TYPE_CN,
+ REG_TYPE_FN,
+ REG_TYPE_VFS,
+ REG_TYPE_VFD,
+ REG_TYPE_MVF,
+ REG_TYPE_MVD,
+ REG_TYPE_MVFX,
+ REG_TYPE_MVDX,
+ REG_TYPE_MVAX,
+ REG_TYPE_DSPSC,
+ REG_TYPE_MMXWR,
+ REG_TYPE_MMXWC,
+ REG_TYPE_MMXWCG,
+ REG_TYPE_XSCALE,
};
/* Structure for a hash table entry for a register. */
@@ -1236,7 +1236,7 @@
if (shift >= 0)
{
/* VFP SP registers require special handling. */
- if (type == REG_TYPE_SN)
+ if (type == REG_TYPE_VFS)
vfp_sp_encode_reg (reg, shift);
else
inst.instruction |= reg << shift;
@@ -1464,12 +1464,12 @@
if (dp)
{
- regtype = REG_TYPE_DN;
+ regtype = REG_TYPE_VFD;
max_regs = 16;
}
else
{
- regtype = REG_TYPE_SN;
+ regtype = REG_TYPE_VFS;
max_regs = 32;
}
@@ -4165,7 +4165,7 @@
return;
case REG_TYPE_RN: s_arm_unwind_save_core (); return;
- case REG_TYPE_DN: s_arm_unwind_save_vfp (); return;
+ case REG_TYPE_VFD: s_arm_unwind_save_vfp (); return;
case REG_TYPE_MMXWR: s_arm_unwind_save_mmxwr (); return;
case REG_TYPE_MMXWCG: s_arm_unwind_save_mmxwcg (); return;
@@ -7285,80 +7285,80 @@
static void
do_vfp_sp_monadic (char * str)
{
- reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_VFS);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_VFS);
end_of_line (str);
}
static void
do_vfp_dp_monadic (char * str)
{
- reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_VFD);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_VFD);
end_of_line (str);
}
static void
do_vfp_sp_dyadic (char * str)
{
- reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_VFS);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_VFS);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_VFS);
end_of_line (str);
}
static void
do_vfp_dp_dyadic (char * str)
{
- reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_VFD);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_VFD);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_VFD);
end_of_line (str);
}
static void
do_vfp_sp_compare_z (char * str)
{
- reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_VFS);
end_of_line (str);
}
static void
do_vfp_dp_compare_z (char * str)
{
- reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_VFD);
end_of_line (str);
}
static void
do_vfp_dp_sp_cvt (char * str)
{
- reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_VFD);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sm, REG_TYPE_VFS);
end_of_line (str);
}
static void
do_vfp_sp_dp_cvt (char * str)
{
- reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_VFS);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_VFD);
end_of_line (str);
}
@@ -7368,7 +7368,7 @@
reg_or_fail (&str, 12, REG_TYPE_RN);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_VFS);
end_of_line (str);
}
@@ -7397,7 +7397,7 @@
static void
do_vfp_sp_from_reg (char * str)
{
- reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sn, REG_TYPE_VFS);
comma_or_fail (&str);
reg_or_fail (&str, 12, REG_TYPE_RN);
@@ -7433,7 +7433,7 @@
reg_or_fail (&str, 12, REG_TYPE_RN);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_VFD);
end_of_line (str);
}
@@ -7446,14 +7446,14 @@
reg_or_fail (&str, 16, REG_TYPE_RN);
comma_or_fail (&str);
- reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_VFD);
end_of_line (str);
}
static void
do_vfp_dp_from_reg (char * str)
{
- reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dn, REG_TYPE_VFD);
comma_or_fail (&str);
reg_or_fail (&str, 12, REG_TYPE_RN);
@@ -7463,7 +7463,7 @@
static void
do_vfp_dp_from_reg2 (char * str)
{
- reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dm, REG_TYPE_VFD);
comma_or_fail (&str);
reg_or_fail (&str, 12, REG_TYPE_RN);
@@ -7499,7 +7499,7 @@
static void
do_vfp_sp_ldst (char * str)
{
- reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_SN);
+ reg_or_fail (&str, VFP_REG_Sd, REG_TYPE_VFS);
comma_or_fail (&str);
if (cp_address_required_here (&str, CP_NO_WB) == FAIL)
@@ -7511,7 +7511,7 @@
static void
do_vfp_dp_ldst (char * str)
{
- reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_DN);
+ reg_or_fail (&str, VFP_REG_Dd, REG_TYPE_VFD);
comma_or_fail (&str);
if (cp_address_required_here (&str, CP_NO_WB) == FAIL)
@@ -8991,21 +8991,20 @@
REGNUM(F,4,FN), REGNUM(F,5,FN), REGNUM(F,6,FN), REGNUM(F,7, FN),
/* VFP SP registers. */
- REGSET(s,SN),
- REGNUM(s,16,SN), REGNUM(s,17,SN), REGNUM(s,18,SN), REGNUM(s,19,SN),
- REGNUM(s,20,SN), REGNUM(s,21,SN), REGNUM(s,22,SN), REGNUM(s,23,SN),
- REGNUM(s,24,SN), REGNUM(s,25,SN), REGNUM(s,26,SN), REGNUM(s,27,SN),
- REGNUM(s,28,SN), REGNUM(s,29,SN), REGNUM(s,30,SN), REGNUM(s,31,SN),
+ REGSET(s,VFS),
+ REGNUM(s,16,VFS), REGNUM(s,17,VFS), REGNUM(s,18,VFS), REGNUM(s,19,VFS),
+ REGNUM(s,20,VFS), REGNUM(s,21,VFS), REGNUM(s,22,VFS), REGNUM(s,23,VFS),
+ REGNUM(s,24,VFS), REGNUM(s,25,VFS), REGNUM(s,26,VFS), REGNUM(s,27,VFS),
+ REGNUM(s,28,VFS), REGNUM(s,29,VFS), REGNUM(s,30,VFS), REGNUM(s,31,VFS),
- REGSET(S,SN),
- REGNUM(S,16,SN), REGNUM(S,17,SN), REGNUM(S,18,SN), REGNUM(S,19,SN),
- REGNUM(S,20,SN), REGNUM(S,21,SN), REGNUM(S,22,SN), REGNUM(S,23,SN),
- REGNUM(S,24,SN), REGNUM(S,25,SN), REGNUM(S,26,SN), REGNUM(S,27,SN),
- REGNUM(S,28,SN), REGNUM(S,29,SN), REGNUM(S,30,SN), REGNUM(S,31,SN),
+ REGSET(S,VFS),
+ REGNUM(S,16,VFS), REGNUM(S,17,VFS), REGNUM(S,18,VFS), REGNUM(S,19,VFS),
+ REGNUM(S,20,VFS), REGNUM(S,21,VFS), REGNUM(S,22,VFS), REGNUM(S,23,VFS),
+ REGNUM(S,24,VFS), REGNUM(S,25,VFS), REGNUM(S,26,VFS), REGNUM(S,27,VFS),
+ REGNUM(S,28,VFS), REGNUM(S,29,VFS), REGNUM(S,30,VFS), REGNUM(S,31,VFS),
/* VFP DP Registers. */
- REGSET(d,DN), REGSET(D,DN),
-
+ REGSET(d,VFD), REGSET(D,VFS),
/* Maverick DSP coprocessor registers. */
REGSET(mvf,MVF), REGSET(mvd,MVD), REGSET(mvfx,MVFX), REGSET(mvdx,MVDX),
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