public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
* [PATCH 0/1] RISC-V psABI: Add testcase for DWARF register numbers
@ 2022-09-23  8:41 Tsukasa OI
  2022-09-23  8:41 ` [PATCH 1/1] RISC-V: " Tsukasa OI
  2022-10-08  4:29 ` [PATCH v2 0/1] RISC-V psABI: Add testcase for DWARF register numbers (supplemental) Tsukasa OI
  0 siblings, 2 replies; 5+ messages in thread
From: Tsukasa OI @ 2022-09-23  8:41 UTC (permalink / raw)
  To: Tsukasa OI, Nelson Chu, Kito Cheng, Palmer Dabbelt; +Cc: binutils

Hello,

This is based on the subset of
"RISC-V psABI: Assign DWARF register numbers to vector registers"
<https://sourceware.org/pipermail/binutils/2022-September/123007.html>.

Although it had csr-dw-regnums.d to test DWARF register numbers for CSRs,
it didn't have DWARF register number test for GPRs/FPRs.
So, this patchset adds it.

The reason I split this (from vector register patchset) is these register
numbers for GPRs/FPRs are widely accepted already and adding this test first
makes possible to completely split vector register patchset and the DWARF
register number test itself.

I also made a change so that we test "fp" (alias of "x8" or "s0"; I forgot
to add this to the test).

Thanks,
Tsukasa




Tsukasa OI (1):
  RISC-V: Add testcase for DWARF register numbers

 gas/testsuite/gas/riscv/dw-regnums.d | 149 ++++++++++++++++++++++++++
 gas/testsuite/gas/riscv/dw-regnums.s | 151 +++++++++++++++++++++++++++
 2 files changed, 300 insertions(+)
 create mode 100644 gas/testsuite/gas/riscv/dw-regnums.d
 create mode 100644 gas/testsuite/gas/riscv/dw-regnums.s


base-commit: 8e037eae6823caf5b9cb5b4feb3de838abb25956
-- 
2.34.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-10-14  1:33 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-23  8:41 [PATCH 0/1] RISC-V psABI: Add testcase for DWARF register numbers Tsukasa OI
2022-09-23  8:41 ` [PATCH 1/1] RISC-V: " Tsukasa OI
2022-10-08  4:29 ` [PATCH v2 0/1] RISC-V psABI: Add testcase for DWARF register numbers (supplemental) Tsukasa OI
2022-10-08  4:29   ` [PATCH v2 1/1] RISC-V: Test DWARF register numbers for "fp" Tsukasa OI
2022-10-14  1:33   ` [PATCH v2 0/1] RISC-V psABI: Add testcase for DWARF register numbers (supplemental) Nelson Chu

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).