From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 7C39F383236D for ; Tue, 15 Nov 2022 04:32:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7C39F383236D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id D47F3300089; Tue, 15 Nov 2022 04:32:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1668486737; bh=En3NsfotIUL0pr8agX0ySS+HjpcR71GwU3XOK52/T8w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=ZOsYuvwIHbpcdvzXRRzoAXLUIPvJRjj35KSihCEekWA2IIbhN8YMYRH7jr0P4H/RO M1bE60ZN0bYSXQOVqYbhVHxbWKe3Q5KoT0li0+1Kw+RyoVO4gnQXrMT68X2u2JILv1 IbAdYi5PefLs+iLVHDUax3V/Xdj+xUINqFrm2u6s= From: Tsukasa OI To: Tsukasa OI , Nelson Chu , Kito Cheng , Palmer Dabbelt Cc: binutils@sourceware.org Subject: [PATCH v3 4/8] RISC-V: Remove unused instruction macros Date: Tue, 15 Nov 2022 04:31:25 +0000 Message-Id: <8f77aa968ed9457ce1bce0a1f6449a287d0e6a18.1668486687.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: This commit removes unused instruction macros. include/ChangeLog: * opcode/riscv-opc.h (MATCH_SLLI_RV32, MASK_SLLI_RV32, MATCH_SRLI_RV32, MASK_SRLI_RV32, MATCH_SRAI_RV32, MASK_SRAI_RV32, MATCH_VQMACCUVV, MASK_VQMACCUVV, MATCH_VQMACCUVX, MASK_VQMACCUVX, MATCH_VQMACCVV, MASK_VQMACCVV, MATCH_VQMACCVX, MASK_VQMACCVX, MATCH_VQMACCSUVV, MASK_VQMACCSUVV, MATCH_VQMACCSUVX, MASK_VQMACCSUVX, MATCH_VQMACCUSVX, MASK_VQMACCUSVX, MATCH_VDOTVV, MASK_VDOTVV, MATCH_VDOTUVV, MASK_VDOTUVV, MATCH_VFDOTVV, MASK_VFDOTVV): Removed as no longer used. --- include/opcode/riscv-opc.h | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index e40592159cd..a30a21fe596 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -21,12 +21,6 @@ #ifndef RISCV_ENCODING_H #define RISCV_ENCODING_H /* Instruction opcode macros. */ -#define MATCH_SLLI_RV32 0x1013 -#define MASK_SLLI_RV32 0xfe00707f -#define MATCH_SRLI_RV32 0x5013 -#define MASK_SRLI_RV32 0xfe00707f -#define MATCH_SRAI_RV32 0x40005013 -#define MASK_SRAI_RV32 0xfe00707f #define MATCH_FRFLAGS 0x102073 #define MASK_FRFLAGS 0xfffff07f #define MATCH_FSFLAGS 0x101073 @@ -1657,20 +1651,6 @@ #define MASK_VWMACCSUVX 0xfc00707f #define MATCH_VWMACCUSVX 0xf8006057 #define MASK_VWMACCUSVX 0xfc00707f -#define MATCH_VQMACCUVV 0xf0000057 -#define MASK_VQMACCUVV 0xfc00707f -#define MATCH_VQMACCUVX 0xf0004057 -#define MASK_VQMACCUVX 0xfc00707f -#define MATCH_VQMACCVV 0xf4000057 -#define MASK_VQMACCVV 0xfc00707f -#define MATCH_VQMACCVX 0xf4004057 -#define MASK_VQMACCVX 0xfc00707f -#define MATCH_VQMACCSUVV 0xfc000057 -#define MASK_VQMACCSUVV 0xfc00707f -#define MATCH_VQMACCSUVX 0xfc004057 -#define MASK_VQMACCSUVX 0xfc00707f -#define MATCH_VQMACCUSVX 0xf8004057 -#define MASK_VQMACCUSVX 0xfc00707f #define MATCH_VDIVVV 0x84002057 #define MASK_VDIVVV 0xfc00707f #define MATCH_VDIVVX 0x84006057 @@ -2049,12 +2029,6 @@ #define MASK_VMV4RV 0xfe0ff07f #define MATCH_VMV8RV 0x9e03b057 #define MASK_VMV8RV 0xfe0ff07f -#define MATCH_VDOTVV 0xe4000057 -#define MASK_VDOTVV 0xfc00707f -#define MATCH_VDOTUVV 0xe0000057 -#define MASK_VDOTUVV 0xfc00707f -#define MATCH_VFDOTVV 0xe4001057 -#define MASK_VFDOTVV 0xfc00707f /* Svinval instruction. */ #define MATCH_SINVAL_VMA 0x16000073 #define MASK_SINVAL_VMA 0xfe007fff @@ -2739,9 +2713,6 @@ #define CSR_VLENB 0xc22 #endif /* RISCV_ENCODING_H */ #ifdef DECLARE_INSN -DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32) -DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32) -DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32) DECLARE_INSN(frflags, MATCH_FRFLAGS, MASK_FRFLAGS) DECLARE_INSN(fsflags, MATCH_FSFLAGS, MASK_FSFLAGS) DECLARE_INSN(fsflagsi, MATCH_FSFLAGSI, MASK_FSFLAGSI) -- 2.37.2