From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id D471C3858D37 for ; Fri, 26 Jan 2024 01:43:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D471C3858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org D471C3858D37 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1706233420; cv=none; b=Qq3dh7GCQkAjZFODJ4kveJ78kvnwzEFqMpEkH6RvZcYFEPSqvYePx05vP8nUYY5c1NFidF3Ri91nEJuVSxN4iRx3qTeu9otkMr0gGR3p+F1/0BN/7WaD6sgRTknFA177fIvmxPHWdPj5FtKnTPuCfvxE+GZevUFkjbL5Xsr0d20= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1706233420; c=relaxed/simple; bh=MDDxTUbN0ZaCJZAqb8lWozUXqrgd35pgLoT6XHeadPk=; h=Subject:To:From:Message-ID:Date:MIME-Version; b=Nu4t4m+NTWbYfZ1nqIx034udNgL4d8Jy+kAmuBqDoI1xRcq+U492ER9B0U+pbNCkYjTmVq+kvAMWObVRX1Co0TP4hLHI3JYEQycBlnj9J0HUPDP2fPPCPFZc5BnsK1CmPXpQ33mmGXlVnqkMb1AV1e5D0y977mAzgv4Ds747R4Y= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.171]) by gateway (Coremail) with SMTP id _____8CxLOtFDrNlbgIGAA--.11229S3; Fri, 26 Jan 2024 09:43:33 +0800 (CST) Received: from [10.20.4.171] (unknown [10.20.4.171]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxRMxEDrNlJNsaAA--.42027S3; Fri, 26 Jan 2024 09:43:32 +0800 (CST) Subject: Re: [PATCH] LoongArch: Disallow TLS transition when a section contains TLS_IE64 or TLS_DESC64 reloc To: Xi Ruoyao , binutils@sourceware.org Cc: Nick Clifton References: <20240125134238.174841-1-xry111@xry111.site> From: mengqinggang Message-ID: <8ffdf1ab-7727-10d9-7299-698f364479b9@loongson.cn> Date: Fri, 26 Jan 2024 09:43:32 +0800 User-Agent: Mozilla/5.0 (X11; Linux mips64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20240125134238.174841-1-xry111@xry111.site> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8AxRMxEDrNlJNsaAA--.42027S3 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoW3XF13KF1fJrWkGF1UGF4DAwc_yoWxCF1kpr y3uay5Kw4rJFnruryDt3yrZrn0qan7Gr12gF9IqFnYkrs3Xr97Xrn2yr9xtFW5C3ykXryj vry0v345WF4UA3XCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUv0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_ Gr0_Gr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I 8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AK xVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41lc7I2V7IY0VAS07AlzV AYIcxG8wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jrv_JF1lIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43ZEXa7IU8czVUUU UUU== X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,MIME_CHARSET_FARAWAY,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Hi, For TLS transition, we want to change to that the instructions that can be converted must have a R_LARCH_RELAX relocation. After 32ee2b4b71c78d3dc0c0b1f87f25fe5df8786b71 commit, the gas not emit R_LARCH_RELAX for two register macros. ÔÚ 2024/1/25 ÏÂÎç9:36, Xi Ruoyao дµÀ: > We cannot do TLS transition for them without a psABI revision marking > some "key" instructions with reloc. Disallow the transition when we see > such a reloc in a section to prevent an invalid "partial" transition. > > Signed-off-by: Xi Ruoyao > --- > > To Nick: > > Sorry for another late update, but we need this for 2.42 or anything > compiled with -mcmodel=extreme and using errno will just blow up :(. > > bfd/elfnn-loongarch.c | 53 +++++++++++++++++-- > .../ld-loongarch-elf/ld-loongarch-elf.exp | 14 +++++ > .../ld-loongarch-elf/tls-ie64-notrans.d | 3 ++ > .../ld-loongarch-elf/tls-ie64-notrans.s | 7 +++ > 4 files changed, 73 insertions(+), 4 deletions(-) > create mode 100644 ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.d > create mode 100644 ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.s > > diff --git a/bfd/elfnn-loongarch.c b/bfd/elfnn-loongarch.c > index b62bb424644..b9709401f56 100644 > --- a/bfd/elfnn-loongarch.c > +++ b/bfd/elfnn-loongarch.c > @@ -717,6 +717,40 @@ loongarch_tls_transition (struct bfd_link_info *info, unsigned int r_type, > return loongarch_tls_transition_without_check (info, r_type, h); > } > > +/* For TLS IE in extreme code model: > + pcalau12i t0, %ie_pc_hi20(x) > + li.d t1, %ie_pc_lo12(x) > + lu32i.d t1, %ie64_pc_lo20(x) > + lu52i.d t1, t1, %ie64_pc_hi12(x) > + ldx.d t0, t0, t1 > + We've no idea how to remove the ldx.d instruction or turn it into a > + nop because there is no reloc on it. But we have to stop turning this > + into LE or we'll end up > + lu12i.w t0, %le_hi20(x) > + ori t1, t1, %le_lo12(x) > + lu32i.d t1, %ie64_pc_lo20(x) > + lu52i.d t1, t1, %ie64_pc_hi12(x) > + ldx.d t0, t0, t1 > + which is completely wrong. For TLS DESC it's similar: we cannot remove > + the add.d instruction but we have to stop the transition. */ > +static bool > +loongarch_elf_allow_tls_transition_p (const Elf_Internal_Rela *r_begin, > + const Elf_Internal_Rela *r_end) > +{ > + for (; r_begin != r_end; r_begin++) > + switch (ELFNN_R_TYPE (r_begin->r_info)) > + { > + case R_LARCH_TLS_IE64_PC_HI12: > + case R_LARCH_TLS_IE64_PC_LO20: > + case R_LARCH_TLS_DESC64_PC_HI12: > + case R_LARCH_TLS_DESC64_PC_LO20: > + return false; > + } > + > + return true; > +} > + > + > /* Look through the relocs for a section during the first phase, and > allocate space in the global offset table or procedure linkage > table. */ > @@ -730,6 +764,7 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, > struct elf_link_hash_entry **sym_hashes; > const Elf_Internal_Rela *rel; > asection *sreloc = NULL; > + bool allow_tls_transition; > > if (bfd_link_relocatable (info)) > return true; > @@ -741,6 +776,9 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, > if (htab->elf.dynobj == NULL) > htab->elf.dynobj = abfd; > > + allow_tls_transition = loongarch_elf_allow_tls_transition_p ( > + relocs, relocs + sec->reloc_count); > + > for (rel = relocs; rel < relocs + sec->reloc_count; rel++) > { > unsigned int r_type; > @@ -818,7 +856,8 @@ loongarch_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, > int need_dynreloc = 0; > int only_need_pcrel = 0; > > - r_type = loongarch_tls_transition (info, r_type, h, abfd, r_symndx); > + if (allow_tls_transition) > + r_type = loongarch_tls_transition (info, r_type, h, abfd, r_symndx); > switch (r_type) > { > case R_LARCH_GOT_PC_HI20: > @@ -2632,7 +2671,6 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, > asection **local_sections) > { > Elf_Internal_Rela *rel; > - Elf_Internal_Rela *relend; > bool fatal = false; > asection *sreloc = elf_section_data (input_section)->sreloc; > struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info); > @@ -2643,8 +2681,10 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, > bool is_dyn = elf_hash_table (info)->dynamic_sections_created; > asection *plt = htab->elf.splt ? htab->elf.splt : htab->elf.iplt; > asection *got = htab->elf.sgot; > + Elf_Internal_Rela *relend = relocs + input_section->reloc_count; > + bool allow_tls_transition = > + loongarch_elf_allow_tls_transition_p (relocs, relend); > > - relend = relocs + input_section->reloc_count; > for (rel = relocs; rel < relend; rel++) > { > unsigned int r_type = ELFNN_R_TYPE (rel->r_info); > @@ -2789,7 +2829,12 @@ loongarch_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, > > BFD_ASSERT (!resolved_local || defined_local); > > - relaxed_r_type = loongarch_tls_transition (info, r_type, h, input_bfd, r_symndx); > + relaxed_r_type = > + (allow_tls_transition ? loongarch_tls_transition (info, r_type, > + h, input_bfd, > + r_symndx) > + : r_type); > + > if (relaxed_r_type != r_type) > { > howto = loongarch_elf_rtype_to_howto (input_bfd, relaxed_r_type); > diff --git a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp > index 2ff06d62236..9e35940f5d6 100644 > --- a/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp > +++ b/ld/testsuite/ld-loongarch-elf/ld-loongarch-elf.exp > @@ -88,6 +88,20 @@ if [istarget "loongarch64-*-*"] { > "medium-call" \ > ] \ > ] > + > + run_ld_link_tests \ > + [list \ > + [list \ > + "disable TLS IE transition with TLS_IE64_PC reloc" \ > + "-e 0x0" "" \ > + "" \ > + {tls-ie64-notrans.s} \ > + [list \ > + [list objdump -D tls-ie64-notrans.d] \ > + ] \ > + "tls-ie64-notrans" \ > + ] \ > + ] > } > > if [istarget "loongarch64-*-*"] { > diff --git a/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.d b/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.d > new file mode 100644 > index 00000000000..47d507a0538 > --- /dev/null > +++ b/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.d > @@ -0,0 +1,3 @@ > +#... > +.*pcalau12i.* > +#pass > diff --git a/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.s b/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.s > new file mode 100644 > index 00000000000..cd8c65ff9d3 > --- /dev/null > +++ b/ld/testsuite/ld-loongarch-elf/tls-ie64-notrans.s > @@ -0,0 +1,7 @@ > +# it had segfaulted the linker due to invalid IE->LE transition > +.globl _start > +_start: > + la.tls.ie $a0, $a1, foo > + > +.section .tdata > +foo: .word 114514