From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 551DA3855592 for ; Sat, 29 Jul 2023 01:57:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 551DA3855592 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 1864D300089; Sat, 29 Jul 2023 01:57:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1690595826; bh=kMZcB2dVSof/5Y5x/NNx+vHcoVIwHcZ0EgCJe+9mwlY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=UENTLxOU+PmYL7hPgg+XXWbv/I04uElhkFhYfUG/ZIOz6Sd+2VKtsWK2w2N2jucNp 7WaSMCOIasGuuJkRAroJ75xviWTNSfHf+l+PSY3+nynZFqI6zSch5XtUZF00Qz/Qfh eCMZdkovaoAyo3DVLBDZIrEC9OVBD0XhhZ58Jpfw= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng , Jiawei Cc: binutils@sourceware.org Subject: [REVIEW ONLY 3/3] MOCK: RISC-V: Tests for 'Zce' implications Date: Sat, 29 Jul 2023 01:56:20 +0000 Message-ID: <93732f158a54f1fb3fb5fab60e1b17c72addafb9.1690595772.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,GIT_PATCH_0,KAM_MANYTO,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: From: Tsukasa OI **NEVER COMMIT THIS.** This commit is intended to be merged to the previous patch once 'Zcmp' and 'Zcmt' extensions are ready. It adds several tests related to 'Zce' implications. bfd/ChangeLog: * elfxx-riscv.c: [MOCK] Uncomment mock lines to pass the test. gas/ChangeLog: * testsuite/gas/riscv/march-imply-zce.d: New test. * testsuite/gas/riscv/march-imply-zce-f-32.d: Likewise. * testsuite/gas/riscv/march-imply-zce-f-64.d: Likewise. --- bfd/elfxx-riscv.c | 7 +++---- gas/testsuite/gas/riscv/march-imply-zce-f-32.d | 6 ++++++ gas/testsuite/gas/riscv/march-imply-zce-f-64.d | 6 ++++++ gas/testsuite/gas/riscv/march-imply-zce.d | 6 ++++++ 4 files changed, 21 insertions(+), 4 deletions(-) create mode 100644 gas/testsuite/gas/riscv/march-imply-zce-f-32.d create mode 100644 gas/testsuite/gas/riscv/march-imply-zce-f-64.d create mode 100644 gas/testsuite/gas/riscv/march-imply-zce.d diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 94487306fae5..583a10c2794b 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1346,10 +1346,9 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zcb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zcf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zcd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, - /* MOCK: uncomment those lines once ready. */ - // {"zce", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, - // {"zcmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, - // {"zcmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zce", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zcmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zcmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {NULL, 0, 0, 0, 0} }; diff --git a/gas/testsuite/gas/riscv/march-imply-zce-f-32.d b/gas/testsuite/gas/riscv/march-imply-zce-f-32.d new file mode 100644 index 000000000000..e0cca82e0a08 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-imply-zce-f-32.d @@ -0,0 +1,6 @@ +#as: -march=rv32if_zce -march-attr -misa-spec=20191213 +#readelf: -A +#source: empty.s +Attribute Section: riscv +File Attributes + Tag_RISCV_arch: "rv32i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcf1p0_zcmp1p0_zcmt1p0" diff --git a/gas/testsuite/gas/riscv/march-imply-zce-f-64.d b/gas/testsuite/gas/riscv/march-imply-zce-f-64.d new file mode 100644 index 000000000000..f0ccd7a3fce5 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-imply-zce-f-64.d @@ -0,0 +1,6 @@ +#as: -march=rv64if_zce -march-attr -misa-spec=20191213 +#readelf: -A +#source: empty.s +Attribute Section: riscv +File Attributes + Tag_RISCV_arch: "rv64i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0" diff --git a/gas/testsuite/gas/riscv/march-imply-zce.d b/gas/testsuite/gas/riscv/march-imply-zce.d new file mode 100644 index 000000000000..2a4ab4e1b639 --- /dev/null +++ b/gas/testsuite/gas/riscv/march-imply-zce.d @@ -0,0 +1,6 @@ +#as: -march=rv32i_zce -march-attr -misa-spec=20191213 +#readelf: -A +#source: empty.s +Attribute Section: riscv +File Attributes + Tag_RISCV_arch: "rv32i2p1_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0" -- 2.41.0