From: Andrew Burgess <andrew.burgess@embecosm.com>
To: gdb-patches@sourceware.org, binutils@sourceware.org
Cc: Fredrik Hederstierna <fredrik@hederstierna.com>,
Andrew Burgess <andrew.burgess@embecosm.com>
Subject: [PATCHv2 7/9] gdb/riscv: make riscv target description names global
Date: Wed, 20 Jan 2021 20:23:13 +0000 [thread overview]
Message-ID: <93b9873e8ef7eadf0ba73d901cbfb693baedd97d.1611172468.git.andrew.burgess@embecosm.com> (raw)
In-Reply-To: <cover.1611172468.git.andrew.burgess@embecosm.com>
A later commit will need the names of the RISC-V target description
features in files other than riscv-tdep.c. This commit just makes the
names global strings that can be accessed from other riscv-*.c files.
There should be no user visible changes after this commit.
gdb/ChangeLog:
* riscv-tdep.c (riscv_feature_name_csr): Define.
(riscv_feature_name_cpu): Define.
(riscv_feature_name_fpu): Define.
(riscv_feature_name_virtual): Define.
(riscv_xreg_feature): Use riscv_feature_name_cpu.
(riscv_freg_feature): Use riscv_feature_name_fpu.
(riscv_virtual_feature): Use riscv_feature_name_virtual.
(riscv_csr_feature): Use riscv_feature_name_csr.
* riscv-tdep.h (riscv_feature_name_csr): Declare.
---
gdb/ChangeLog | 12 ++++++++++++
gdb/riscv-tdep.c | 14 ++++++++++----
gdb/riscv-tdep.h | 3 +++
3 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index b16e7d78fc5..cb917247bab 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -94,6 +94,12 @@ static unsigned int riscv_debug_unwinder = 0;
static unsigned int riscv_debug_gdbarch = 0;
+/* The names of the RISC-V target description features. */
+const char *riscv_feature_name_csr = "org.gnu.gdb.riscv.csr";
+static const char *riscv_feature_name_cpu = "org.gnu.gdb.riscv.cpu";
+static const char *riscv_feature_name_fpu = "org.gnu.gdb.riscv.fpu";
+static const char *riscv_feature_name_virtual = "org.gnu.gdb.riscv.virtual";
+
/* Cached information about a frame. */
struct riscv_unwind_cache
@@ -257,7 +263,7 @@ riscv_register_feature::register_info::check
struct riscv_xreg_feature : public riscv_register_feature
{
riscv_xreg_feature ()
- : riscv_register_feature ("org.gnu.gdb.riscv.cpu")
+ : riscv_register_feature (riscv_feature_name_cpu)
{
m_registers = {
{ RISCV_ZERO_REGNUM + 0, { "zero", "x0" } },
@@ -354,7 +360,7 @@ static const struct riscv_xreg_feature riscv_xreg_feature;
struct riscv_freg_feature : public riscv_register_feature
{
riscv_freg_feature ()
- : riscv_register_feature ("org.gnu.gdb.riscv.fpu")
+ : riscv_register_feature (riscv_feature_name_fpu)
{
m_registers = {
{ RISCV_FIRST_FP_REGNUM + 0, { "ft0", "f0" } },
@@ -482,7 +488,7 @@ static const struct riscv_freg_feature riscv_freg_feature;
struct riscv_virtual_feature : public riscv_register_feature
{
riscv_virtual_feature ()
- : riscv_register_feature ("org.gnu.gdb.riscv.virtual")
+ : riscv_register_feature (riscv_feature_name_virtual)
{
m_registers = {
{ RISCV_PRIV_REGNUM, { "priv" } }
@@ -518,7 +524,7 @@ static const struct riscv_virtual_feature riscv_virtual_feature;
struct riscv_csr_feature : public riscv_register_feature
{
riscv_csr_feature ()
- : riscv_register_feature ("org.gnu.gdb.riscv.csr")
+ : riscv_register_feature (riscv_feature_name_csr)
{
m_registers = {
#define DECLARE_CSR(NAME,VALUE,CLASS,DEFINE_VER,ABORT_VER) \
diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h
index d1f1cf17ba8..154097df5d0 100644
--- a/gdb/riscv-tdep.h
+++ b/gdb/riscv-tdep.h
@@ -160,4 +160,7 @@ extern void riscv_supply_regset (const struct regset *regset,
struct regcache *regcache, int regnum,
const void *regs, size_t len);
+/* The names of the RISC-V target description features. */
+extern const char *riscv_feature_name_csr;
+
#endif /* RISCV_TDEP_H */
--
2.25.4
next prev parent reply other threads:[~2021-01-20 20:23 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-20 20:23 [PATCHv2 0/9] Bare-metal core dumps for RISC-V Andrew Burgess
2021-01-20 20:23 ` [PATCHv2 1/9] gdb: unify parts of the Linux and FreeBSD core dumping code Andrew Burgess
2021-01-22 12:01 ` Strasuns, Mihails
2021-01-22 18:50 ` Tom Tromey
2021-02-01 11:56 ` Andrew Burgess
2021-02-09 21:52 ` Andrew Burgess
2021-01-20 20:23 ` [PATCHv2 2/9] bfd/binutils: support for gdb target descriptions in the core file Andrew Burgess
2021-01-22 10:47 ` Strasuns, Mihails
2021-01-22 19:30 ` Andrew Burgess
2021-01-25 10:11 ` Strasuns, Mihails
2021-01-25 11:20 ` Andrew Burgess
2021-02-01 12:05 ` PING: " Andrew Burgess
2021-02-01 15:10 ` Strasuns, Mihails
2021-02-01 13:29 ` Luis Machado
2021-02-10 20:45 ` Jim Wilson
2021-01-20 20:23 ` [PATCHv2 3/9] gdb: write target description into " Andrew Burgess
2021-01-22 19:15 ` Tom Tromey
2021-02-01 13:37 ` Luis Machado
2021-01-20 20:23 ` [PATCHv2 4/9] bfd/riscv: prepare to handle bare metal core dump creation Andrew Burgess
2021-02-01 12:03 ` PING: " Andrew Burgess
2021-02-01 13:48 ` Luis Machado
2021-02-01 14:44 ` Andrew Burgess
2021-02-10 20:57 ` Jim Wilson
2021-01-20 20:23 ` [PATCHv2 5/9] gdb/riscv: introduce bare metal core dump support Andrew Burgess
2021-02-01 14:05 ` Luis Machado
2021-02-03 3:04 ` Palmer Dabbelt
2021-01-20 20:23 ` [PATCHv2 6/9] bfd/binutils: add support for RISC-V CSRs in core files Andrew Burgess
2021-02-01 12:00 ` Andrew Burgess
2021-02-01 14:08 ` Luis Machado
2021-02-10 21:00 ` Jim Wilson
2021-01-20 20:23 ` Andrew Burgess [this message]
2021-02-01 14:22 ` [PATCHv2 7/9] gdb/riscv: make riscv target description names global Luis Machado
2021-01-20 20:23 ` [PATCHv2 8/9] gdb/riscv: write CSRs into baremetal core dumps Andrew Burgess
2021-02-01 14:33 ` Luis Machado
2021-01-20 20:23 ` [PATCHv2 9/9] gdb/arm: add support for bare-metal " Andrew Burgess
2021-02-01 14:51 ` Luis Machado
2021-01-22 19:28 ` [PATCHv2 0/9] Bare-metal core dumps for RISC-V Tom Tromey
2021-02-07 21:48 ` PING: " Andrew Burgess
2021-02-10 21:01 ` Jim Wilson
2021-02-15 11:14 ` Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 " Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 1/9] gdb: unify parts of the Linux and FreeBSD core dumping code Andrew Burgess
2021-02-15 22:56 ` Lancelot SIX
2021-02-16 16:55 ` Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 2/9] bfd/binutils: support for gdb target descriptions in the core file Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 3/9] gdb: write target description into " Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 4/9] bfd/riscv: prepare to handle bare metal core dump creation Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 5/9] gdb/riscv: introduce bare metal core dump support Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 6/9] bfd/binutils: add support for RISC-V CSRs in core files Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 7/9] gdb/riscv: make riscv target description names global Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 8/9] gdb/riscv: write CSRs into baremetal core dumps Andrew Burgess
2021-02-15 17:29 ` [PATCHv3 9/9] gdb/arm: add support for bare-metal " Andrew Burgess
2021-03-01 10:32 ` [PATCHv3 0/9] Bare-metal core dumps for RISC-V Andrew Burgess
2021-03-01 14:45 ` Nick Clifton
2021-03-05 17:35 ` Andrew Burgess
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