From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id AEF0D3849ACE for ; Fri, 17 May 2024 15:43:07 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AEF0D3849ACE Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org AEF0D3849ACE Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715960589; cv=none; b=XLa8L/DgZyRhexpy3Wt+d5dh3VkM+EwDOiAKA28aaK4ND13Oav0BxHRru0m4AOyt4TNGBkdaqNzSZ2+u8kFS+GU3sYGjO0tjflWogGbXkXoHtid7Hob/IADmiuBuiqYWfVW1+WVvcVWNpcOOwZyEA9Y6XRcJFJwvUZXbyAOlqUI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1715960589; c=relaxed/simple; bh=FtnS97AP/ykv9Pww600Z6t3D59aBehPv5kJNBiqtSgQ=; h=Message-ID:Date:MIME-Version:Subject:To:From; b=nde6XuJbGdwxF0/FJqjtlNa9CG8dJ74urzz8BJ4YRyXbBs2l2eCRjVGilkbbkOj4EA6FWTo5dvdB925ZbN92HqAd1/JopQ6gQhsNQzDNlQAgqwejbFl8Y8A1ByQSfwPvqB874s7prcrBCCkosSoJgts4IdKALvtxXWf6SWjblYE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 20DFC1424; Fri, 17 May 2024 08:43:31 -0700 (PDT) Received: from [10.2.78.57] (e120077-lin.cambridge.arm.com [10.2.78.57]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C1A13F762; Fri, 17 May 2024 08:43:06 -0700 (PDT) Message-ID: <96b1b357-94c8-4cd9-aaa6-b149cd041250@arm.com> Date: Fri, 17 May 2024 16:43:05 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] aarch64: fp8 convert and scale - Add advsimd insn variants To: Victor Do Nascimento , binutils@sourceware.org Cc: nickc@redhat.com References: <20240410152950.1134020-1-victor.donascimento@arm.com> <20240410152950.1134020-3-victor.donascimento@arm.com> From: "Richard Earnshaw (lists)" Content-Language: en-GB In-Reply-To: <20240410152950.1134020-3-victor.donascimento@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3491.3 required=5.0 tests=BAYES_00,KAM_DMARC_NONE,KAM_DMARC_STATUS,KAM_LAZY_DOMAIN_SECURITY,SPF_HELO_NONE,SPF_NONE,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 10/04/2024 16:29, Victor Do Nascimento wrote: > @@ -6459,6 +6487,19 @@ const struct aarch64_opcode > aarch64_opcode_table[] = > SVE2p1_INSNC("st2q",0xe4600000, 0xffe0e000, sve_misc, 0, OP3 > (SME_Zt2, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0), > SVE2p1_INSNC("st3q",0xe4a00000, 0xffe0e000, sve_misc, 0, OP3 > (SME_Zt3, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0), > SVE2p1_INSNC("st4q",0xe4e00000, 0xffe0e000, sve_misc, 0, OP3 > (SME_Zt4, SVE_Pg3, SVE_ADDR_RR_LSL4), OP_SVE_QUU, 0, C_SCAN_MOVPRFX, 0), > + FP8_INSN("bf1cvtl", 0x2ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V2FP8B8H, 0), > + FP8_INSN("bf1cvtl2", 0x6ea17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V28H16B, 0), > + FP8_INSN("bf2cvtl", 0x2ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V2FP8B8H, 0), > + FP8_INSN("bf2cvtl2", 0x6ee17800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V28H16B, 0), > + FP8_INSN("f1cvtl", 0x2e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V2FP8B8H, 0), > + FP8_INSN("f1cvtl2", 0x6e217800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V28H16B, 0), > + FP8_INSN("f2cvtl", 0x2e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V2FP8B8H, 0), > + FP8_INSN("f2cvtl2", 0x6e617800, 0xfffffc00, asimdmisc, OP2 (Vd, Vn), > QL_V28H16B, 0), > + FP8_INSN("fcvtn", 0xe00f400, 0xffe0fc00, asimdmisc, OP3 (Vd, Vn, > Vm), QL_V3_BSS_LOWER, 0), Nit: The opcode in this pattern is missing the leading zero, which makes it a bit harder to verify. Please can you add that before pushing. > + FP8_INSN("fcvtn2", 0x4e00f400, 0xffe0fc00, asimdmisc, OP3 (Vd, Vn, > Vm), QL_V3_BSS_FULL, 0), > + FP8_INSN("fcvtn", 0xe40f400, 0xbfe0fc00, asimdmisc, OP3 (Vd, Vn, > Vm), QL_V3_BHH, F_SIZEQ), Same here. > + FP8_INSN("fscale", 0x2ec03c00, 0xbfe0fc00, asimdmisc, OP3 (Vd, Vn, > Vm), QL_VSHIFT_H, F_SIZEQ), > + FP8_INSN("fscale", 0x2ea0fc00, 0xbfa0fc00, asimdmisc, OP3 (Vd, Vn, > Vm), QL_V3SAMESD, F_SIZEQ), R.