[PATCH] : SH Assembler generates incorrect opcode for PCMP instructions

["Arati Dikey" <AratiD@kpit.com>]

Hi !

The SH assembler generates incorrect opcodes for the parallel PCMP
instruction.
Basically, its last nibble is a copy of the previous instruction's
second nibble
when working in Big Endian format.

For example,
test.s
	movs.w @-R5, A0
      PCMP X0,Y0

generates opcodes
	f5 70
	f8 00 84 05

 instead of
	f8 00 84 00

The following patch corrects this. I have also verified that it does not
cause any
side effect on other DSP instructions.

Regards,
Arati Dikey


Changelog 
	2002-01-17  Arati Dikey <aratid@kpit.com>

	tc-sh.c (assemble_ppi): Do not add reg_n value for PCMP
instructions



--- tc-sh.c.orig	Thu Dec  6 11:34:18 2001
+++ tc-sh.c	      Thu Jan 17 16:41:28 2002
@@ -1769,7 +1769,10 @@ assemble_ppi (op_end, opcode)
 	  if (field_b)
 	    as_bad (_("multiple parallel processing specifications"));
 	  field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] <<
8)
-		     + (reg_x << 6) + (reg_y << 4) + reg_n);
+		     + (reg_x << 6) + (reg_y << 4) );
+
+	  if (strcmp (opcode->name, "pcmp") != 0)
+	  	 field_b += reg_n;
 	  break;
 	case PDC:
 	  if (cond)





~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Free download of GNUSH tool chain for Hitachi's SH Series.
The following site also offers free support to European customers.
Read more at http://www.kpit.com/products/support.htm.
Latest version of GNUSH is released on Jan 1, 2002.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~