From: Jan Beulich <jbeulich@suse.com>
To: "Cui,Lili" <lili.cui@intel.com>
Cc: hjl.tools@gmail.com, binutils@sourceware.org
Subject: Re: [PATCH 2/2] [PATCH 2/2] Add tests for Intel AVX512_FP16 instructions
Date: Fri, 2 Jul 2021 17:44:00 +0200 [thread overview]
Message-ID: <97bf6559-ecc6-e521-cae2-93750704113e@suse.com> (raw)
In-Reply-To: <20210701074736.9534-3-lili.cui@intel.com>
On 01.07.2021 09:47, Cui,Lili wrote:
>
> Intel AVX512 FP16 instructions use maps 3, 5 and 6. Maps 5 and 6 use 3 bits
> in the EVEX.mmm field (0b101, 0b110). Map 5 is for instructions that were FP32
> in map 1 (0Fxx). Map 6 is for instructions that were FP32 in map 2 (0F38xx).
> There are some exceptions to this rule. Some things in map 1 (0Fxx) with imm8
> operands predated our current conventions; those instructions moved to map 3.
> FP32 things in map 3 (0F3Axx) found new opcodes in map3 for FP16 because map3
> is very sparsely populated. Most of the FP16 instructions share opcodes and
> prefix (EVEX.pp) bits with the related FP32 operations.
>
> Intel AVX512 FP16 instructions has new displacements scaling rules, please refer
> to the public software developer manual for detail information.
>
> gas/
>
> 2021-07-01 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
> H.J. Lu <hongjiu.lu@intel.com>
> Wei Xiao <wei3.xiao@intel.com>
> Lili Cui <lili.cui@intel.com>
>
> * gas/testsuite/gas/i386/i386.exp: Run FP16 tests.
> * gas/testsuite/gas/i386/avx512_fp16-intel.d: New test.
> * gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l: Ditto.
> * gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s: Ditto.
> * gas/testsuite/gas/i386/avx512_fp16.d: Ditto.
> * gas/testsuite/gas/i386/avx512_fp16.s: Ditto.
This, just to pick an example, has
vaddph 8128(%ecx), %zmm5, %zmm6 #AVX512_FP16 Disp8
vaddph -8192(%edx){1to32}, %zmm5, %zmm6{%k7}{z} #AVX512_FP16 Disp8 BROADCAST_EN MASK_ENABLING ZEROCTL
The former is indeed using disp8, but the latter isn't despite the
comment suggesting so. I'd consider it particularly important that
disp8-scaling be covered both without and with broadcast, yet I
don't think I've been able to spot any instance of the latter.
> * gas/testsuite/gas/i386/avx512_fp16_disp8-intel.d: Ditto.
> * gas/testsuite/gas/i386/avx512_fp16_disp8.d: Ditto.
> * gas/testsuite/gas/i386/avx512_fp16_disp8.s: Ditto.
So what are these about? Their name suggests disp8 handling, but
the produced code has no single instance of an 8-bit displacement.
Same for the 64-bit equivalents further down.
Overall this patch if of course close to impossible to review
properly.
Jan
next prev parent reply other threads:[~2021-07-02 15:44 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-01 7:47 [PATCH 0/2]Enable Intel AVX512_FP16 instructions and add tests for it Cui,Lili
2021-07-01 7:47 ` [PATCH 1/2] [PATCH 1/2] Enable Intel AVX512_FP16 instructions Cui,Lili
2021-07-02 13:42 ` Jan Beulich
2021-07-02 15:46 ` Jan Beulich
2021-07-06 12:42 ` Cui, Lili
2021-07-09 11:52 ` Cui, Lili
2021-07-13 7:25 ` Jan Beulich
2021-07-13 7:35 ` Cui, Lili
2021-07-02 15:08 ` Jan Beulich
2021-07-09 11:50 ` Cui, Lili
2021-07-05 6:30 ` Jan Beulich
2021-07-05 12:38 ` H.J. Lu
2021-07-06 12:48 ` Cui, Lili
2021-07-09 11:47 ` Cui, Lili
2021-07-09 12:16 ` Jan Beulich
2021-07-13 6:58 ` Cui, Lili
2021-07-13 7:54 ` Jan Beulich
2021-07-13 8:03 ` Cui, Lili
2021-07-13 16:25 ` Jan Beulich
[not found] ` <DM6PR11MB4009305D09B37299FC2F282C9EE39@DM6PR11MB4009.namprd11.prod.outlook.com>
2021-07-21 14:29 ` Jan Beulich
2021-07-22 7:05 ` Cui, Lili
2021-07-14 15:21 ` Jan Beulich
2021-07-20 7:08 ` FW: " Cui, Lili
2021-07-20 8:46 ` Jan Beulich
2021-07-20 11:13 ` Cui, Lili
2021-07-20 11:26 ` Cui, Lili
2021-07-20 13:02 ` Jan Beulich
2021-07-20 13:38 ` Cui, Lili
2021-07-20 14:15 ` Jan Beulich
2021-07-20 14:29 ` Cui, Lili
2021-07-21 10:32 ` Jan Beulich
2021-07-01 15:42 ` [PATCH 0/2]Enable Intel AVX512_FP16 instructions and add tests for it H.J. Lu
2021-07-01 17:46 ` H.J. Lu
2021-07-02 0:13 ` Cui, Lili
[not found] ` <20210701074736.9534-3-lili.cui@intel.com>
2021-07-02 15:44 ` Jan Beulich [this message]
[not found] ` <BY5PR11MB4008FDC77679D0F8FB9E88B39E149@BY5PR11MB4008.namprd11.prod.outlook.com>
2021-07-13 15:59 ` [PATCH 2/2] [PATCH 2/2] Add tests for Intel AVX512_FP16 instructions Jan Beulich
2021-07-14 18:01 ` H.J. Lu
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