From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 993C0385274C for ; Tue, 2 Aug 2022 05:54:37 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 993C0385274C Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 2D78930008A; Tue, 2 Aug 2022 05:54:35 +0000 (UTC) From: Tsukasa OI To: Tsukasa OI , "H . Peter Anvin" , Nelson Chu , Kito Cheng , Palmer Dabbelt Cc: binutils@sourceware.org Subject: [PATCH v2 1/4] RISC-V: Print highest address on disassembler Date: Tue, 2 Aug 2022 14:54:18 +0900 Message-Id: <9e8bae698c219a7d3fcc712a7f62416cbaa13857.1659419591.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Aug 2022 05:54:39 -0000 This patch makes possible to print the highest address (0xffffffff on RV32, 0xffffffff_ffffffff on RV64). This is particularly useful if the highest address space is used for I/O registers and corresponding symbols are defined. opcodes/ChangeLog: * riscv-dis.c (struct riscv_private_data): Add `to_print_addr' and `has_gp' to enable printing the highest address. (maybe_print_address): Utilize `to_print_addr' and `has_gp'. (riscv_disassemble_insn): Likewise. --- opcodes/riscv-dis.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 164fd209dbd..c6d80c3ba49 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -52,6 +52,8 @@ struct riscv_private_data bfd_vma gp; bfd_vma print_addr; bfd_vma hi_addr[OP_MASK_RD + 1]; + bool to_print_addr; + bool has_gp; }; /* Used for mapping symbols. */ @@ -177,10 +179,13 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset, pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset; pd->hi_addr[base_reg] = -1; } - else if (base_reg == X_GP && pd->gp != (bfd_vma)-1) + else if (base_reg == X_GP && pd->has_gp) pd->print_addr = pd->gp + offset; else if (base_reg == X_TP || base_reg == 0) pd->print_addr = offset; + else + return; + pd->to_print_addr = true; /* Sign-extend a 32-bit value to a 64-bit value. */ if (wide) @@ -595,14 +600,19 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) int i; pd = info->private_data = xcalloc (1, sizeof (struct riscv_private_data)); - pd->gp = -1; - pd->print_addr = -1; + pd->gp = 0; + pd->print_addr = 0; for (i = 0; i < (int)ARRAY_SIZE (pd->hi_addr); i++) pd->hi_addr[i] = -1; + pd->to_print_addr = false; + pd->has_gp = false; for (i = 0; i < info->symtab_size; i++) if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0) - pd->gp = bfd_asymbol_value (info->symtab[i]); + { + pd->gp = bfd_asymbol_value (info->symtab[i]); + pd->has_gp = true; + } } else pd = info->private_data; @@ -662,13 +672,13 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) print_insn_args (op->args, word, memaddr, info); /* Try to disassemble multi-instruction addressing sequences. */ - if (pd->print_addr != (bfd_vma)-1) + if (pd->to_print_addr) { info->target = pd->print_addr; (*info->fprintf_styled_func) (info->stream, dis_style_comment_start, " # "); (*info->print_address_func) (info->target, info); - pd->print_addr = -1; + pd->to_print_addr = false; } /* Finish filling out insn_info fields. */ -- 2.34.1