From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22616 invoked by alias); 22 May 2006 23:57:01 -0000 Received: (qmail 22605 invoked by uid 22791); 22 May 2006 23:57:01 -0000 X-Spam-Check-By: sourceware.org Received: from mail-out3.apple.com (HELO mail-out3.apple.com) (17.254.13.22) by sourceware.org (qpsmtpd/0.31) with ESMTP; Mon, 22 May 2006 23:56:59 +0000 Received: from relay7.apple.com (relay7.apple.com [17.128.113.37]) by mail-out3.apple.com (8.12.11/8.12.11) with ESMTP id k4MNutem001039; Mon, 22 May 2006 16:56:55 -0700 (PDT) Received: from [17.201.27.222] (unknown [17.201.27.222]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (No client certificate requested) by relay7.apple.com (Apple SCV relay) with ESMTP id 0E1B890; Mon, 22 May 2006 16:56:55 -0700 (PDT) In-Reply-To: <20060522234641.GA9061@networkno.de> References: <20060522202627.GE30254@networkno.de> <9C4668ED-B9FB-4A18-BCF4-CA7F5DFFE0E1@apple.com> <20060522234641.GA9061@networkno.de> Mime-Version: 1.0 (Apple Message framework v750) Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed Message-Id: Cc: binutils@sourceware.org Content-Transfer-Encoding: 7bit From: Eric Christopher Subject: Re: [PATCH] Better checking of ISA/ASE/ABI options for MIPS gas Date: Tue, 23 May 2006 05:01:00 -0000 To: Thiemo Seufer X-Mailer: Apple Mail (2.750) X-IsSubscribed: yes Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2006-05/txt/msg00392.txt.bz2 >> >> No. No more reading the minds of programmers. :) > > Well, for GP registers we do even as_bad(). Yup. >> And why change the table to include default extensions for the cpu? > > To handle them the same way as the ISA. This is for ASEs which are > always implemented in that particular CPU. You'll need to look through the code and make sure we aren't depending on the value not being zero somewhere then. To be honest I'd just prefer another field for "default ASEs". >>> /* End of GCC-shared inference code. */ >> >> You need to make sure that this shared code is the same logic in both >> places - preferably before committing this. > > Yes. Do you think the logic is ok (modulo the FP ABI warning)? I do. :) >>> +#if 0 /* XXX FIXME */ >>> + /* 32 bit code with 64 bit FP registers. */ >>> + if (!file_mips_fp32 && ABI_NEEDS_32BIT_REGS (mips_abi)) >>> + elf_elfheader (stdoutput)->e_flags |= ???; >>> +#endif >>> } >>> >> >> ??? > > Same like for MIPS3D, we should tell the linker this object is > (possibly) > incompatible to other O32 objects with 32bit FP regs. More comments then :) -eric