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Date: Wed, 16 Feb 2011 20:46:00 -0000
Message-ID: <AANLkTi=Y8fbQYxO=hD+0Zfun6uH+qqSr_rYd1ZpsrKBO@mail.gmail.com>
Subject: Re: x32 psABI draft version 0.2
From: "H.J. Lu" <hjl.tools@gmail.com>
To: Andrew Pinski <pinskia@gmail.com>
Cc: Chris Metcalf <cmetcalf@tilera.com>, "H. Peter Anvin" <hpa@zytor.com>, x32-abi@googlegroups.com, 	GCC Development <gcc@gcc.gnu.org>, Binutils <binutils@sourceware.org>, 	GNU C Library <libc-alpha@sourceware.org>
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On Wed, Feb 16, 2011 at 12:39 PM, Andrew Pinski <pinskia@gmail.com> wrote:
> On Wed, Feb 16, 2011 at 12:35 PM, Chris Metcalf <cmetcalf@tilera.com> wro=
te:
>> For what it's worth, the Tilera 64-bit architecture (forthcoming) includ=
es
>> support for a 32-bit compatibility layer that is similar to x32. =A0It u=
ses
>> 64-bit registers throughout (e.g. for double and long long), but 32-bit
>> addresses. =A0The addresses between 2GB and 4GB are not directly usable =
as
>> 64-bit addresses since we sign-extend all 32-bit values to make the ISA
>> more straightforward. =A0We use the "compat" layer to provide our syscall
>> table, since we don't have a traditional compatibility layer in this mode
>> (unlike x86_64 and i386).
>
> This sounds more like MIPS' n32 than x32 really.
>

Yes, x32 can access the full 4GB address space.  There are some
additional optimizations which can be done in x32, but not in x86-64
small model.

--=20
H.J.