From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15004 invoked by alias); 16 Feb 2011 20:39:30 -0000 Received: (qmail 14984 invoked by uid 22791); 16 Feb 2011 20:39:29 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-qy0-f169.google.com (HELO mail-qy0-f169.google.com) (209.85.216.169) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 16 Feb 2011 20:39:25 +0000 Received: by qyk7 with SMTP id 7so3742005qyk.0 for ; Wed, 16 Feb 2011 12:39:23 -0800 (PST) MIME-Version: 1.0 Received: by 10.224.74.75 with SMTP id t11mr1404673qaj.146.1297888762558; Wed, 16 Feb 2011 12:39:22 -0800 (PST) Received: by 10.224.11.78 with HTTP; Wed, 16 Feb 2011 12:39:22 -0800 (PST) In-Reply-To: <4D5C34F8.9060506@tilera.com> References: <4D5C2DD2.10608@zytor.com> <4D5C34F8.9060506@tilera.com> Date: Wed, 16 Feb 2011 20:39:00 -0000 Message-ID: Subject: Re: x32 psABI draft version 0.2 From: Andrew Pinski To: Chris Metcalf Cc: "H. Peter Anvin" , x32-abi@googlegroups.com, "H.J. Lu" , GCC Development , Binutils , GNU C Library Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Mailing-List: contact binutils-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: binutils-owner@sourceware.org X-SW-Source: 2011-02/txt/msg00197.txt.bz2 On Wed, Feb 16, 2011 at 12:35 PM, Chris Metcalf wrote: > For what it's worth, the Tilera 64-bit architecture (forthcoming) includes > support for a 32-bit compatibility layer that is similar to x32. =C2=A0It= uses > 64-bit registers throughout (e.g. for double and long long), but 32-bit > addresses. =C2=A0The addresses between 2GB and 4GB are not directly usabl= e as > 64-bit addresses since we sign-extend all 32-bit values to make the ISA > more straightforward. =C2=A0We use the "compat" layer to provide our sysc= all > table, since we don't have a traditional compatibility layer in this mode > (unlike x86_64 and i386). This sounds more like MIPS' n32 than x32 really. -- Pinski