Thank you for your guidance. Your comments were very helpful. As for the question you raised, I need to have a further discussion with Ms. Meng next week. I will communicate with you as soon as I get an accurate result. 发件人：Xi Ruoyao 发送日期：2023-12-02 15:14:28 收件人：changjiachen ,binutils@sourceware.org 抄送人：xuchenghua@loongson.cn,chenglulu@loongson.cn,liuzhensong@loongson.cn,i.swmail@xen0n.name,maskray@google.com,cailulu@loongson.cn,luweining@loongson.cn,wanglei@loongson.cn,hejinyang@loongson.cn,Lazy_Linux@126.com,mengqinggang@loongson.cn 主题：Re: [PATCH v2 3/5] LoongArch: opcodes: Add support for tls le relax.>On Sat, 2023-12-02 at 14:53 +0800, changjiachen wrote: >> Add new opcode for tls le relax. >> >> opcode/ChangeLog: >> >> * loongarch-opc.c: Add new loongarch opcode. >> --- >> opcodes/loongarch-opc.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c >> index 82b88bdad2a..e9ced5383e5 100644 >> --- a/opcodes/loongarch-opc.c >> +++ b/opcodes/loongarch-opc.c >> @@ -399,6 +399,7 @@ static struct loongarch_opcode loongarch_fix_opcodes[] = >> { 0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0 }, >> { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, >> { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, >> + { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5,s10:5", 0, 0, 0, 0 }, > >This is just wrong, as I've pointed out in v1. > >You can always write > >.reloc 0, R_LARCH_LE_ADD_R, a >add.d $t0, $t0, $tp > >If you think it looks nasty you can add a new pseudo instruction for >this. Anyway there is not an "add.d" instruction accepting an >immediate. Try not to puzzle people. > >(The trailing ",0" in the sc instructions is already much annoying to >me. Do not make things even worse.) > >And please make the technical discussion public, instead of sending a >private reply (unless you have a good reason). > >> { 0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, >> { 0x00118000, 0xffff8000, "sub.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, >> { 0x00120000, 0xffff8000, "slt", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, > >-- >Xi Ruoyao >School of Aerospace Science and Technology, Xidian University