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Mon, 25 Jan 2021 10:11:42 +0000 From: "Strasuns, Mihails" To: Andrew Burgess CC: "gdb-patches@sourceware.org" , "binutils@sourceware.org" , Fredrik Hederstierna Subject: RE: [PATCHv2 2/9] bfd/binutils: support for gdb target descriptions in the core file Thread-Topic: [PATCHv2 2/9] bfd/binutils: support for gdb target descriptions in the core file Thread-Index: AQHW72oyi3YXZjYIxEm2S+Cf+XbkWKoza2tAgACfuACABBJyQA== Date: Mon, 25 Jan 2021 10:11:42 +0000 Message-ID: References: <5a9bb029efd1737d81d1e9ff0e82f359d4267113.1611172468.git.andrew.burgess@embecosm.com> <20210122193004.GB265215@embecosm.com> In-Reply-To: <20210122193004.GB265215@embecosm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action x-originating-ip: [95.91.236.183] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b1420b58-260e-46fd-5ff5-08d8c1199cd7 x-ms-traffictypediagnostic: BN6PR11MB1857: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; 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charset="us-ascii" MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN6PR11MB1858.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b1420b58-260e-46fd-5ff5-08d8c1199cd7 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Jan 2021 10:11:42.1449 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rB3xNhag+r7mPjmojbf/nuQkeKXCI/vs51TIyDoJymL9EW+aAOw+FSHwhGAeTUmfvBE1bjvtU0ymE+29eo31DZdbmyxJ0LNOFwtOin1mC2E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1857 X-OriginatorOrg: intel.com Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, DKIM_INVALID, DKIM_SIGNED, KAM_DMARC_STATUS, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Jan 2021 10:11:49 -0000 > -----Original Message----- > From: Andrew Burgess > Sent: Friday, January 22, 2021 8:30 PM > To: Strasuns, Mihails > Cc: gdb-patches@sourceware.org; binutils@sourceware.org; Fredrik > Hederstierna > Subject: Re: [PATCHv2 2/9] bfd/binutils: support for gdb target descripti= ons > in the core file > = > * Strasuns, Mihails [2021-01-22 10:47:23 > +0000]: > = > > > -----Original Message----- > > > From: Gdb-patches On Behalf > Of > > > Andrew Burgess > > > Sent: Wednesday, January 20, 2021 9:23 PM > > > To: gdb-patches@sourceware.org; binutils@sourceware.org > > > Cc: Fredrik Hederstierna > > > Subject: [PATCHv2 2/9] bfd/binutils: support for gdb target > > > descriptions in the core file > > > > > > This commit lays the ground work for allowing GDB to write its > > > target description into a generated core file. > > > > > > The goal of this work is to allow a user to connect to a remote > > > target, capture a core file from within GDB, then pass the > > > executable and core file to another user and have the user be able > > > to examine the state of the machine without needing to connect to a > running target. > > > > > > Different remote targets can have different register sets and this > > > information is communicated from the target to GDB in the target > description. > > > > Why is it necessary to store a GDB target description for this? Core > > files already define machine/arch, same as executable ELFs. There > > still can be some register variation between different platform > > versions, but it would still need to be denoted somehow in a native > > core file. > > > > My concern is for making a "GDB core file" and a "native core file" > > even more different than it is currently on Linux. I guess this is > > aimed at a barebone environments where there is currently no native > > core dump support at all but even there it is not guaranteed. > = > I was following you until "... but even there it is not guaranteed." > I'm not sure what it is that is not guaranteed. I have meant that even for a barebone platform that doesn't have any native= core dump capabilities it theoretically can be added through firmware - an= d GDB would want to support that format too. >From you description below it seems impractical to worry about it right now= though. > Yes, absolutely my interest here is bare metal core dumps, but I don't see > including the target description in all core files as a big problem. > = > I'm not aware that GDB was ever aiming to create core dumps that would be > identical to kernel produced dumps, just that they should be compatible. > = > Including an extra note should be transparent to any well behaved tool (I= 'd > hope), or at worst maybe a warning about not understanding the note > = > The problem I'm trying to solve is that the RISC-V targets I'm working wi= th > have a pretty random collection of control status registers (CSRs), inclu= ded > off-spec registers. I'd like to capture these in the core dump, so the > approach I have right now is just dump all of them in target description = order. > > Anyway, back to your concerns... > = > ...would making target description inclusion optional/switchable be enough > to alleviate your concerns? Would you rather it was default off, or woul= d you > be happy with switchable default on? I don't have a strong preference here, it is probably fine as it is. GDB te= st suite covers both native core and a generated one as separate test cases= , correct? = Context: I am currently looking into core dump support for Intel GPUs and u= sing generate-core as a convenient way to quickly iterate through the diffe= rent format prototypes. However it is not affected by your patch, I was more curious/concerned abou= t a general direction here. > Thanks, > Andrew Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Gary Kershaw Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928