From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by sourceware.org (Postfix) with ESMTPS id 950FD3858D32 for ; Fri, 5 Jan 2024 07:01:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 950FD3858D32 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 950FD3858D32 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2a00:1450:4864:20::62a ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704438079; cv=none; b=aduAwQ6qNlZbcEsd6uaWGbE5HmP+PzrBaTTJZjcl5e8vBkMlv5WAlfvJ2RxTgcksDyPTr2JdUjEny0iFLa1OC1Flh8LCN47gS6PbogTztPWIsNc+MZYJ6EMHNX/1YEvVSsIbyVSl/rbU/86zc5qTZvHpStCFexhUgHEsFfyOztc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1704438079; c=relaxed/simple; bh=4GVmkbyOZnHFPRXJs8MqNJwAKr4z+PKFGeFuCQDRZcM=; h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To; b=vLr+UlCYuggDCytDgc10zYHUUxNmmasFYQSh+la9dlp8RDvgRCtv954+vIOmLnifVtca7wunxV17rbhmyeC+kY7X7QBCF1kgM5pmC0oRgZ7Z5zngR6csEasnagl42g74ksZiNfb2j4N+yJN6JOTKS+vD3DhBkyqOa5DTyGTnWzQ= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-a28b2e1a13fso142311566b.3 for ; Thu, 04 Jan 2024 23:01:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704438076; x=1705042876; darn=sourceware.org; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=qX4vA8bvNxCgMG+iOhnRizR82Rknil8R5A5ktuQaQAs=; b=KaIp3knFMoEewbkXuIu+hIfW6poVD2wsz3O0qbYnt3Mfhl6kOe35pNGld9hwOhAjWr EgZzsMwnzkO6NLPnKsuGp2VPaD/anwkprx6qcXcW3f4nCVgHGdjfAjqYFGwNUwMXsnOy 5ttDat/MhsJtxF7f1HA4bo2hPKdM2SzDyrXuzCCtbVTSTUiUjRCCDSF4OpUpJa/0QJf9 31Y7zBycETXehU9LsaRlsoX1tfKN5SpZo6e/ZKVSbNLeShrVevPIZWo6x8hb3+4ZzljP Ovxv+mnZeydzbdoMcn3qCTupeT4CalKWoTH4oAhQP0sDsXYfQzpSRDfLPyKagI5pHcex 5aBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704438076; x=1705042876; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=qX4vA8bvNxCgMG+iOhnRizR82Rknil8R5A5ktuQaQAs=; b=ip0UufmcOuvYL0NIV0YrLAFtLlW1fgn1NVunQTfkezjejtgD0YdFW+UR3+W+QshZQo ZfSKfSC3G8utBHV+IRTIYBl8u3oO3hOAyvrdkrGK3t0Qwxbp9WEpTVxUucJMCURjavK0 iHsmsIegjvTdroLlothcGG2LcA/M2si15viUaIpkIbBoaJ5aAKXkvSWO1bb2G3sHTn5J jXnz21LGyhtPbcyKl4nH4kyhBYOfVEqWmBsLuPzi6RTZML5EM9lF1ALzdR6wcoAtiyJs yXrYyvCAv6hG25rrIVBPjt3n9IoCep45wMVbcSfmUbhh1PmYeT5oGCsqxybr4+U93Sl2 XWlA== X-Gm-Message-State: AOJu0YwAQ21/FK8sbSV5LVMpb1f4VRbh7oGY9U40wQGTXgrbuYRz+C86 u6ed00Nl2y8v2Kg7mfdwtnyz6pUDTwrNUvcG9kGHW0fu1BepHkbL X-Google-Smtp-Source: AGHT+IG9mQc/uelTjDZwP0larHDIZWn6qW5m9oIOttkL25sWTjubt2V7sfUAi0+YTWVrwF4rNmaEgk2SXdQbpqcwHZo= X-Received: by 2002:a17:906:11ce:b0:a28:7bd6:444e with SMTP id o14-20020a17090611ce00b00a287bd6444emr812507eja.23.1704438076127; Thu, 04 Jan 2024 23:01:16 -0800 (PST) MIME-Version: 1.0 References: <20231120070642.1250737-1-jiawei@iscas.ac.cn> In-Reply-To: <20231120070642.1250737-1-jiawei@iscas.ac.cn> From: Kito Cheng Date: Fri, 5 Jan 2024 15:01:04 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] RISC-V: Support Zcmp push/pop instructions. To: Jiawei Cc: binutils@sourceware.org, nelson@rivosinc.com, kito.cheng@sifive.com, palmer@dabbelt.com, jbeulich@suse.com, research_trasio@irq.a4lg.com, christoph.muellner@vrull.eu, jeremy.bennett@embecosm.com, nandni.jamnadas@embecosm.com, mary.bennett@embecosm.com, charlie.keaney@embecosm.com, simon.cook@embecosm.com, sinan.lin@linux.alibaba.com, gaofei@eswincomputing.com, fujin.zhao@foxmail.com, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn, shiyulong@iscas.ac.cn, chenyixuan@iscas.ac.cn Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,GIT_PATCH_0,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: > diff --git a/bfd/elfxx-riscv.h b/bfd/elfxx-riscv.h > index abcb409bd78..6f551bb6907 100644 > --- a/bfd/elfxx-riscv.h > +++ b/bfd/elfxx-riscv.h > @@ -26,6 +26,7 @@ > #include "cpu-riscv.h" > > #define RISCV_UNKNOWN_VERSION -1 > +#define SP_ALIGNMENT 16 Rename to ZCMP_SP_ALIGNMENT, since ilp32e may not align to 16, and this macro may cause confusion . > > struct riscv_elf_params > { > diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c > index 402c46ad753..a46de00fc32 100644 > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -1246,6 +1246,125 @@ flt_lookup (float f, const float *array, size_t size, unsigned *regnop) > return false; > } > > +/* Map ra and s-register to [4,15], so that we can check if the > + reg2 in register list reg1-reg2 or single reg2 is valid or not, > + and obtain the corresponding rlist value. rlist -> reg_list > + > + ra - 4 > + s0 - 5 > + s1 - 6 > + .... > + s10 - 0 (invalid) > + s11 - 15. */ > + > +static int > +regno_to_rlist (unsigned regno) rlist -> reg_list > +{ > + if (regno == X_RA) > + return 4; > + else if (regno == X_S0 || regno == X_S1) > + return 5 + regno - X_S0; > + else if (regno >= X_S2 && regno < X_S10) > + return 7 + regno - X_S2; > + else if (regno == X_S11) > + return 15; > + > + return 0; /* invalid symbol */ > +} > + > +/* Parse register list, and the parsed rlist value is stored in rlist > + argument. > + > + If ABI register names are used (e.g. ra and s0), the register > + list could be "{ra}", "{ra, s0}", "{ra, s0-sN}", where 0 < N < 10 or > + N == 11. > + > + If numeric register names are used (e.g. x1 and x8), the register list > + could be "{x1}", "{x1,x8}", "{x1,x8-x9}", "{x1,x8-x9,x18}" and > + "{x1,x8-x9,x18-xN}", where 19 < N < 25 or N == 27. > + > + It will fail if numeric register names and ABI register names are used > + at the same time. > +*/ > + > +static bool > +reglist_lookup (char **s, unsigned *rlist) rlist -> reg_list > +{ > + unsigned regno = 0; > + unsigned regnum = 0; > + char *reglist = strdup(*s); space before (, e.g. strdup (*s); > + char *regname[3]; > + > + if (reglist == NULL) > + return false; > + > + reglist = strtok(reglist, "}"); space before ( > + for(reglist = strtok(reglist, ",");reglist;reglist = strtok(NULL, ",")){ space before ( > + regname[regnum] = reglist; > + regnum++; > + } > + > + /* Use to check if the register format is xreg. */ > + bool use_xreg = **s == 'x'; > + > + /* The first register in register list should be ra. */ in the register list > + if (!reg_lookup (s, RCLASS_GPR, ®no) > + || !(*rlist = regno_to_rlist (regno)) /* update rlist */ > + || regno != X_RA) > + return false; > + > + if (regnum == 1) > + return true; > + > + /* Do not use numeric and abi names at the same time. */ > + if ((*++*s != 'x') && use_xreg) > + return false; > + /* Reg1 should be s0 or its numeric names x8. */ > + if (!reg_lookup (s, RCLASS_GPR, ®no) > + || !(*rlist = regno_to_rlist (regno)) > + || regno != X_S0) > + return false; > + > + if(strlen(regname[1]) == 2) space before ( > + return true; > + > + if ((*++*s != 'x') && use_xreg) > + return false; > + /* Reg2 is x9 if the numeric name is used, otherwise, > + it could be any other sN register, where N > 0. */ > + if (!reg_lookup (s, RCLASS_GPR, ®no) > + || !(*rlist = regno_to_rlist (regno)) > + || regno <= X_S0 > + || (use_xreg && regno != X_S1)) > + return false; > + > + if (regnum == 2) > + return true; > + > + if(regnum == 3 && use_xreg){ space before ( and space between ) { if (regnum == 3 && use_xreg) { > + if ((*++*s != 'x') && use_xreg) > + return false; > + /* Reg3 should be s2. */ > + if (!reg_lookup (s, RCLASS_GPR, ®no) > + || !(*rlist = regno_to_rlist (regno)) > + || regno != X_S2) > + return false; > + if(strlen(regname[2]) == 3) > + return true; > + if ((*++*s != 'x') && use_xreg) > + return false; > + /* Reg4 could be any other sN register, where N > 1. */ > + if (!reg_lookup (s, RCLASS_GPR, ®no) > + || !(*rlist = regno_to_rlist (regno)) > + || regno <= X_S2) > + return false; > + return true; > + } > + > + free(reglist); space before ( > + return false; > +} > + > #define USE_BITS(mask,shift) (used_bits |= ((insn_t)(mask) << (shift))) > #define USE_IMM(n, s) \ > (used_bits |= ((insn_t)((1ull< diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h > index 710a9b73189..7b1ed47aa5d 100644 > --- a/include/opcode/riscv.h > +++ b/include/opcode/riscv.h > @@ -24,6 +24,7 @@ > #include "riscv-opc.h" > #include > #include > +#include Why include stdio.h?