From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by sourceware.org (Postfix) with ESMTPS id 7784B3856978 for ; Thu, 7 Jul 2022 03:02:18 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7784B3856978 Received: by mail-ej1-x631.google.com with SMTP id sb34so30066564ejc.11 for ; Wed, 06 Jul 2022 20:02:18 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=zf33n85pffuw+vZa9YDY9UX0oRK6zJUJDPH/u1QIyTM=; b=cFxsJevStotougZrjIQF/z/nZJOkFmJxv+QmhxxUgTEAxUC0iiJMv89AJzXKTQyBd4 nEW2CoRVKKWfSwNy/3rRcSC4+zIuD36l0ZqJlJYVLM5JsVD6qQfco4V3lxzGXZCHoY3A COkCure66qpCmGXtpynEbF3li3NIjw1cGlXzHsKNzAIKanfo24J6BbsCaQYWV3mSspCA E/BGfW4PKG4hI/LfFun3Ym1wQGobnAEM5H5sLXH/ejjQ1A2BtmlmUOPxJdz3EvlnN6pl VEaW4QWD+NjYcTMY2idgjvXCaMwnLw4YCAU7XnVLR1jVKKC3v028dSHYo74cZqvorPXh ywDQ== X-Gm-Message-State: AJIora+vP+RtGbONfYx5GWlglXUV+UEJrtVgBz1HMSsxzCW9S0t/SpQE ok36vbqlY3icI4W/6J7spP6VEWrsxXvOUAeEQQM= X-Google-Smtp-Source: AGRyM1tBlGZLkkABYuYMCVhGDVJbX9rvpVNXHG2+HRYpABkeI19UBHYVKAHM/aU9MEF/AvB1xIkoFmZYesYDzDeiiV8= X-Received: by 2002:a17:907:7daa:b0:711:d911:2691 with SMTP id oz42-20020a1709077daa00b00711d9112691mr42414802ejc.626.1657162937216; Wed, 06 Jul 2022 20:02:17 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Kito Cheng Date: Thu, 7 Jul 2022 11:02:05 +0800 Message-ID: Subject: Re: [PATCH v3 1/2] RISC-V: Fix requirement handling on Zhinx+{D,Q} To: Tsukasa OI Cc: Palmer Dabbelt , Kito Cheng , Nelson Chu , Weiwei Li , Binutils Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Jul 2022 03:02:20 -0000 LGTM On Fri, Jun 24, 2022 at 11:52 AM Tsukasa OI via Binutils wrote: > > This commit fixes how instructions are masked on Zhinx+Z{d,q}inx. > fcvt.h.d and fcvt.d.h require ((D&&Zfh)||(Zdinx&&Zhinx)) and > fcvt.h.q and fcvt.q.h require ((Q&&Zfh)||(Zqinx&&Zhinx)). > > bfd/ChangeLog: > > * elfxx-riscv.c (riscv_multi_subset_supports): Fix feature gate > on INSN_CLASS_{D,Q}_AND_ZFH_INX. > (riscv_multi_subset_supports_ext): Fix feature gate diagnostics > on INSN_CLASS_{D,Q}_AND_ZFH_INX. > > gas/ChangeLog: > > * testsuite/gas/riscv/fp-zhinx-insns.d: Add Zqinx to -march > for proper testing. > --- > bfd/elfxx-riscv.c | 30 ++++++++++++++++++++---- > gas/testsuite/gas/riscv/fp-zhinx-insns.d | 2 +- > 2 files changed, 26 insertions(+), 6 deletions(-) > > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index f920e0ce9ff..308516c3e60 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -2337,15 +2337,17 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, > return riscv_subset_supports (rps, "zfh"); > case INSN_CLASS_ZFH_OR_ZHINX: > return riscv_subset_supports (rps, "zfh") > - || riscv_subset_supports (rps, "zhinx"); > + || riscv_subset_supports (rps, "zhinx"); > case INSN_CLASS_D_AND_ZFH_INX: > return (riscv_subset_supports (rps, "d") > && riscv_subset_supports (rps, "zfh")) > - || riscv_subset_supports (rps, "zhinx"); > + || (riscv_subset_supports (rps, "zdinx") > + && riscv_subset_supports (rps, "zhinx")); > case INSN_CLASS_Q_AND_ZFH_INX: > return (riscv_subset_supports (rps, "q") > && riscv_subset_supports (rps, "zfh")) > - || riscv_subset_supports (rps, "zhinx"); > + || (riscv_subset_supports (rps, "zqinx") > + && riscv_subset_supports (rps, "zhinx")); > case INSN_CLASS_ZBA: > return riscv_subset_supports (rps, "zba"); > case INSN_CLASS_ZBB: > @@ -2492,9 +2494,27 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, > case INSN_CLASS_ZFH_OR_ZHINX: > return _("zfh' or 'zhinx"); > case INSN_CLASS_D_AND_ZFH_INX: > - return _("('d' and 'zfh') or 'zhinx"); > + if (riscv_subset_supports (rps, "zfh")) > + return "d"; > + else if (riscv_subset_supports (rps, "d")) > + return "zfh"; > + else if (riscv_subset_supports (rps, "zhinx")) > + return "zdinx"; > + else if (riscv_subset_supports (rps, "zdinx")) > + return "zhinx"; > + else > + return _("zfh' and `d', or `zhinx' and `zdinx"); > case INSN_CLASS_Q_AND_ZFH_INX: > - return _("('q' and 'zfh') or 'zhinx"); > + if (riscv_subset_supports (rps, "zfh")) > + return "q"; > + else if (riscv_subset_supports (rps, "q")) > + return "zfh"; > + else if (riscv_subset_supports (rps, "zhinx")) > + return "zqinx"; > + else if (riscv_subset_supports (rps, "zqinx")) > + return "zhinx"; > + else > + return _("zfh' and `q', or `zhinx' and `zqinx"); > case INSN_CLASS_H: > return _("h"); > default: > diff --git a/gas/testsuite/gas/riscv/fp-zhinx-insns.d b/gas/testsuite/gas/riscv/fp-zhinx-insns.d > index 6e1c40e65f5..2592d8c74e2 100644 > --- a/gas/testsuite/gas/riscv/fp-zhinx-insns.d > +++ b/gas/testsuite/gas/riscv/fp-zhinx-insns.d > @@ -1,4 +1,4 @@ > -#as: -march=rv64ima_zhinx > +#as: -march=rv64ima_zqinx_zhinx > #source: fp-zhinx-insns.s > #objdump: -dr > > -- > 2.34.1 >